| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 297 Register OffsetReg = MRI.createGenericVirtualRegister(s32); in getStackAddress() local
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 166 Register OffsetReg = MI.getOperand(2).getReg(); in canRemoveAddasl() local
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 567 unsigned OffsetReg = 0; in ReduceLoadStore() local
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 567 unsigned OffsetReg = 0; in ReduceLoadStore() local
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 166 Register OffsetReg = MI.getOperand(2).getReg(); in canRemoveAddasl() local
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 557 unsigned OffsetReg = 0; in ReduceLoadStore() local
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 165 unsigned OffsetReg = MI.getOperand(2).getReg(); in canRemoveAddasl() local
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 166 unsigned OffsetReg = MI.getOperand(2).getReg(); in canRemoveAddasl() local
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 558 unsigned OffsetReg = 0; in ReduceLoadStore() local
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 557 unsigned OffsetReg = 0; in ReduceLoadStore() local
|
| /dports/devel/py-keystone-engine/keystone-engine-0.9.1-3/src/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 196 unsigned OffsetReg; member
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 268 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress() local
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 267 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress() local
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 159 Register OffsetReg = MRI.createGenericVirtualRegister(s64); in getStackAddress() local
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 356 Register OffsetReg = MRI.createGenericVirtualRegister(LLT::scalar(64)); in lowerParameterPtr() local
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 268 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress() local
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 267 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress() local
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 356 Register OffsetReg = MRI.createGenericVirtualRegister(LLT::scalar(64)); in lowerParameterPtr() local
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 159 Register OffsetReg = MRI.createGenericVirtualRegister(s64); in getStackAddress() local
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 356 Register OffsetReg = MRI.createGenericVirtualRegister(LLT::scalar(64)); in lowerParameterPtr() local
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 159 Register OffsetReg = MRI.createGenericVirtualRegister(s64); in getStackAddress() local
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 268 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress() local
|
| /dports/sysutils/gnome-settings-daemon/gnome-settings-daemon-3.38.2/po/ |
| H A D | zh_TW.po | 239 msgstr "啟用此項將 Wacom 繪圖板區域設為符合輸出的長寬比。"
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 243 unsigned OffsetReg; member
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 158 auto OffsetReg = MIRBuilder.buildConstant(s64, Offset); in getStackAddress() local
|