/minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 406 bool isUncondBranchOpcode(int Opc) { in isUncondBranchOpcode() 411 bool isCondBranchOpcode(int Opc) { in isCondBranchOpcode() 416 bool isJumpTableBranchOpcode(int Opc) { in isJumpTableBranchOpcode() 422 bool isIndirectBranchOpcode(int Opc) { in isIndirectBranchOpcode() 426 static inline bool isPopOpcode(int Opc) { in isPopOpcode() 432 static inline bool isPushOpcode(int Opc) { in isPushOpcode()
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H A D | ARMISelDAGToDAG.cpp | 118 SDValue &Opc) { in SelectAddrMode2Base() 123 SDValue &Opc) { in SelectAddrMode2ShOp() 128 SDValue &Opc) { in SelectAddrMode2() 1654 static bool isVLDfixed(unsigned Opc) in isVLDfixed() 1681 static bool isVSTfixed(unsigned Opc) in isVSTfixed() 2198 unsigned Opc = Opcodes[OpcodeIndex]; in SelectVLDDup() local 2276 unsigned Opc = isSigned in SelectV6T2BitfieldExtractOp() local 2692 unsigned Opc = Subtarget->isThumb() ? in Select() local 2719 unsigned Opc = 0; in Select() local 2739 unsigned Opc = 0; in Select() local [all …]
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H A D | ARMFastISel.cpp | 478 unsigned Opc; in ARMMaterializeFP() local 602 unsigned Opc; in ARMMaterializeGV() local 966 unsigned Opc; in ARMEmitLoad() local 1584 unsigned Opc; in SelectIToFP() local 1608 unsigned Opc; in SelectFPToI() local 1762 unsigned Opc; in SelectBinaryIntOp() local 1808 unsigned Opc; in SelectBinaryFPOp() local 2625 uint32_t Opc : 16; in ARMEmitIntExt() member 2684 unsigned Opc = ITP->Opc; in ARMEmitIntExt() local 2769 unsigned Opc = ARM::MOVsr; in SelectShift() local [all …]
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H A D | ARMLoadStoreOptimizer.cpp | 330 static bool isT1i32Load(unsigned Opc) { in isT1i32Load() 334 static bool isT2i32Load(unsigned Opc) { in isT2i32Load() 338 static bool isi32Load(unsigned Opc) { in isi32Load() 342 static bool isT1i32Store(unsigned Opc) { in isT1i32Store() 346 static bool isT2i32Store(unsigned Opc) { in isT2i32Store() 350 static bool isi32Store(unsigned Opc) { in isi32Store() 354 static unsigned getImmScale(unsigned Opc) { in getImmScale() 382 unsigned Opc = MBBI->getOpcode(); in UpdateBaseRegUses() local 1006 static unsigned getUpdatingLSMultipleOpcode(unsigned Opc, in getUpdatingLSMultipleOpcode() 1171 static unsigned getPreIndexedLoadStoreOpcode(unsigned Opc, in getPreIndexedLoadStoreOpcode() [all …]
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/minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.h | 238 static inline bool isUncondBranchOpcode(int Opc) { return Opc == AArch64::B; } in isUncondBranchOpcode() 240 static inline bool isCondBranchOpcode(int Opc) { in isCondBranchOpcode() 257 static inline bool isIndirectBranchOpcode(int Opc) { return Opc == AArch64::BR; } in isIndirectBranchOpcode()
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H A D | AArch64ConditionOptimizer.cpp | 192 static int getComplementOpc(int Opc) { in getComplementOpc() 219 int Opc = CmpMI->getOpcode(); in adjustCmp() local 248 int Opc; in modifyCmp() local
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H A D | AArch64LoadStoreOptimizer.cpp | 114 static bool isUnscaledLdst(unsigned Opc) { in isUnscaledLdst() 179 static unsigned getMatchingPairOpcode(unsigned Opc) { in getMatchingPairOpcode() 216 static unsigned getPreIndexedOpcode(unsigned Opc) { in getPreIndexedOpcode() 243 static unsigned getPostIndexedOpcode(unsigned Opc) { in getPostIndexedOpcode() 393 int Opc = FirstMI->getOpcode(); in findMatchingInsn() local 838 int Opc = MI->getOpcode(); in optimizeBlock() local
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H A D | AArch64ISelDAGToDAG.cpp | 209 static bool isOpcWithIntImmediate(const SDNode *N, unsigned Opc, in isOpcWithIntImmediate() 1111 unsigned Opc) { in SelectStore() 1130 unsigned Opc) { in SelectPostStore() 1186 unsigned Opc) { in SelectLoadLane() 1231 unsigned Opc) { in SelectPostLoadLane() 1289 unsigned Opc) { in SelectStoreLane() 1322 unsigned Opc) { in SelectPostStoreLane() 1445 static bool isSeveralBitsExtractOpFromShr(SDNode *N, unsigned &Opc, in isSeveralBitsExtractOpFromShr() 1593 unsigned Opc, LSB, MSB; in SelectBitfieldExtractOp() local 1992 unsigned Opc; in SelectBitfieldInsertOp() local [all …]
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H A D | AArch64BranchRelaxation.cpp | 275 static bool isConditionalBranch(unsigned Opc) { in isConditionalBranch() 310 static unsigned getOppositeConditionOpcode(unsigned Opc) { in getOppositeConditionOpcode() 326 static unsigned getBranchDisplacementBits(unsigned Opc) { in getBranchDisplacementBits()
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H A D | AArch64InstrInfo.cpp | 315 unsigned Opc = 0; in canFoldIntoCSel() local 496 unsigned Opc = 0; in insertSelect() local 839 unsigned Opc = CmpInstr->getOpcode(); in optimizeCompareInstr() local 928 unsigned Opc = Instr.getOpcode(); in optimizeCompareInstr() local 1833 unsigned Opc = 0; in storeRegToStackSlot() local 1931 unsigned Opc = 0; in loadRegFromStackSlot() local 2037 unsigned Opc; in emitFrameOffset() local 2379 static bool isCombineInstrSettingFlag(unsigned Opc) { in isCombineInstrSettingFlag() 2436 static bool isCombineInstrCandidate(unsigned Opc) { in isCombineInstrCandidate() 2475 unsigned Opc = Root.getOpcode(); in hasPattern() local [all …]
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H A D | AArch64FastISel.cpp | 1597 unsigned Opc; in emitLogicalOp_ri() local 1644 unsigned Opc; in emitLogicalOp_rs() local 1739 unsigned Opc; in emitLoad() local 1987 unsigned Opc; in emitStore() local 2530 unsigned Opc = 0; in optimizeSelect() local 2586 unsigned Opc; in selectSelect() local 2753 unsigned Opc; in selectFPToInt() local 2796 unsigned Opc; in selectIntToFP() local 3457 unsigned Opc; in fastLowerIntrinsicCall() local 4233 unsigned Opc; in emitIntExt() local [all …]
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H A D | AArch64AdvSIMDScalarPass.cpp | 161 static int getTransformOpcode(unsigned Opc) { in getTransformOpcode() 182 int Opc = MI->getOpcode(); in isTransformable() local
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/minix/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonCFGOptimizer.cpp | 61 static bool IsConditionalBranch(int Opc) { in IsConditionalBranch() 67 static bool IsUnconditionalJump(int Opc) { in IsUnconditionalJump() 114 int Opc = MI->getOpcode(); in runOnMachineFunction() local
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H A D | HexagonExpandPredSpillCode.cpp | 85 int Opc = MI->getOpcode(); in runOnMachineFunction() local
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/minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsSEInstrInfo.cpp | 43 unsigned Opc = MI->getOpcode(); in isLoadFromStackSlot() local 65 unsigned Opc = MI->getOpcode(); in isStoreToStackSlot() local 83 unsigned Opc = 0, ZeroReg = 0; in copyPhysReg() local 188 unsigned Opc = 0; in storeRegToStack() local 229 unsigned Opc = 0; in loadRegFromStack() local 266 unsigned Opc; in expandPostRAPseudo() local 442 MipsSEInstrInfo::compareOpndSize(unsigned Opc, in compareOpndSize()
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H A D | MipsAnalyzeImmediate.h | 20 unsigned Opc, ImmOpnd; member
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H A D | Mips16InstrInfo.cpp | 65 unsigned Opc = 0; in copyPhysReg() local 102 unsigned Opc = 0; in storeRegToStack() local 120 unsigned Opc = 0; in loadRegFromStack() local 205 unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16; in makeFrame() local 235 unsigned Opc = ((FrameSize <= 128) && !SaveS2)? in restoreFrame() local
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H A D | MipsFastISel.cpp | 124 MachineInstrBuilder emitInst(unsigned Opc) { in emitInst() 127 MachineInstrBuilder emitInst(unsigned Opc, unsigned DstReg) { in emitInst() 131 MachineInstrBuilder emitInstStore(unsigned Opc, unsigned SrcReg, in emitInstStore() 135 MachineInstrBuilder emitInstLoad(unsigned Opc, unsigned DstReg, in emitInstLoad() 218 unsigned Opc = Mips::ADDiu; in materialize32BitInt() local 435 unsigned Opc, CondMovOpc; in emitCmp() local 485 unsigned Opc; in emitLoad() local 528 unsigned Opc; in emitStore() local 725 unsigned Opc; in selectFPToInt() local
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H A D | Mips16ISelDAGToDAG.cpp | 47 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, SDLoc DL, EVT Ty, in selectMULT() 261 unsigned Opc = InFlag.getOpcode(); (void)Opc; in selectNode() local
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H A D | MipsInstrInfo.cpp | 71 void MipsInstrInfo::AnalyzeCondBr(const MachineInstr *Inst, unsigned Opc, in AnalyzeCondBr() 101 unsigned Opc = Cond[0].getImm(); in BuildCondBr() local
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/minix/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 2005 unsigned Opc = Orig->getOpcode(); in reMaterialize() local 2141 unsigned Opc, leaInReg; in convertToThreeAddressWithLEA() local 2390 unsigned Opc; in convertToThreeAddress() local 2521 unsigned Opc; in commuteInstruction() local 2594 unsigned Opc; in commuteInstruction() local 2876 static const uint16_t Opc[16][2] = { in getSETFromCond() local 3312 unsigned Opc = 0; in copyPhysReg() local 4701 unsigned Opc = LoadMI.getOpcode(); in isPartialRegisterLoad() local 4880 unsigned Opc = MI->getOpcode(); in canFoldMemoryOperand() local 4917 unsigned Opc = I->second.first; in unfoldMemoryOperand() local [all …]
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H A D | X86FastISel.cpp | 327 unsigned Opc = 0; in X86FastEmitLoad() local 389 unsigned Opc = 0; in X86FastEmitStore() local 455 unsigned Opc = 0; in X86FastEmitStore() local 553 unsigned Opc = 0; in handleConstantAddresses() local 1897 unsigned Opc; in X86FastEmitPseudoSelect() local 2137 unsigned Opc; in fastLowerIntrinsicCall() local 2278 unsigned Opc; in fastLowerIntrinsicCall() local 2474 unsigned Opc; in fastLowerIntrinsicCall() local 3093 unsigned Opc = 0; in X86MaterializeInt() local 3131 unsigned Opc = 0; in X86MaterializeFP() local [all …]
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H A D | X86FrameLowering.cpp | 131 unsigned Opc = MBBI->getOpcode(); in findDeadCallerSavedReg() local 178 unsigned Opc; in emitSPUpdate() local 235 unsigned Opc = PI->getOpcode(); in mergeSPUpdatesUp() local 266 unsigned Opc = NI->getOpcode(); in mergeSPUpdatesDown() local 298 unsigned Opc = PI->getOpcode(); in mergeSPUpdates() local 1008 unsigned Opc = PI->getOpcode(); in emitEpilogue() local 1032 unsigned Opc = getLEArOpcode(Uses64BitFramePtr); in emitEpilogue() local 1348 unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r; in spillCalleeSavedRegisters() local 1407 unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r; in restoreCalleeSavedRegisters() local 2031 unsigned Opc = getADDriOpcode(IsLP64, Amount); in eliminateCallFramePseudoInstr() local [all …]
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/minix/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
H A D | SILoadStoreOptimizer.cpp | 238 unsigned Opc = (EltSize == 4) ? AMDGPU::DS_READ2_B32 : AMDGPU::DS_READ2_B64; in mergeRead2Pair() local 325 unsigned Opc = (EltSize == 4) ? AMDGPU::DS_WRITE2_B32 : AMDGPU::DS_WRITE2_B64; in mergeWrite2Pair() local 385 unsigned Opc = MI.getOpcode(); in optimizeBlock() local
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/minix/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 578 unsigned Opc; in SelectAddrSpaceCast() local 603 unsigned Opc; in SelectAddrSpaceCast() local 2633 unsigned Opc = 0; in SelectLoadParam() local 3019 unsigned Opc = 0; in SelectTextureIntrinsic() local 3544 unsigned Opc = 0; in SelectSurfaceIntrinsic() local 4920 unsigned Opc; in SelectBFE() local
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