| /dports/cad/yosys/yosys-yosys-0.12/manual/ |
| H A D | CHAPTER_Optimize.tex | 2 \chapter{Optimizations} chapter
34 \subsection{The opt\_expr pass}
86 \subsection{The opt\_muxtree pass}
103 \subsection{The opt\_reduce pass}
122 \subsection{The opt\_rmdff pass}
127 \subsection{The opt\_clean pass}
133 \subsection{The opt\_merge pass}
|
| /dports/devel/llvm70/llvm-7.0.1.src/tools/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/sysutils/vector/lucet-d4fc14a03bdb99ac83173d27fddf1aca48412a86/wasmtime/cranelift/peepmatic/ |
| H A D | README.md | 134 ### Variables
159 ### Constants
173 ### Nested Patterns
182 ### Preconditions and Unquoting
249 ### Bit Widths
|
| /dports/lang/clover/mesa-21.3.6/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/libosmesa/mesa-21.3.6/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/libosmesa-gallium/mesa-21.3.6/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/mesa-gallium-va/mesa-21.3.6/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/mesa-dri-classic/mesa-20.2.3/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
155 3.3. Assembly Language Dispatch Stubs
234 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/mesa-dri/mesa-21.3.6/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/mesa-libs/mesa-21.3.6/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/docs/ |
| H A D | dispatch.rst | 93 3.1. Dual dispatch table pointers
127 3.2. ELF TLS
161 3.3. Assembly Language Dispatch Stubs
240 3.4. Fixed-Length Dispatch Stubs
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/devel/llvm11/llvm-11.0.1.src/tools/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/devel/llvm10/llvm-10.0.1.src/tools/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/devel/llvm90/llvm-9.0.1.src/tools/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/clang/docs/ |
| H A D | ControlFlowIntegrityDesign.rst | 99 Optimizations section in Forward-Edge CFI for Virtual Calls
112 Stripping Leading/Trailing Zeros in Bit Vectors
128 Short Inline Bit Vectors
188 Virtual Table Layout
201 Alignment
254 Padding to Powers of 2
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|