| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/NXP/Include/ |
| H A D | Pcie.h | 145 #define PAB_AXI_AMAP_PEX_WIN_L(Idx) (0xba8 + 0x10 * (Idx)) macro
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pci/controller/mobiveil/ |
| H A D | pcie-mobiveil.h | 81 #define PAB_AXI_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x0ba8, win) macro
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/pci/controller/mobiveil/ |
| H A D | pcie-mobiveil.h | 81 #define PAB_AXI_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x0ba8, win) macro
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pci/controller/mobiveil/ |
| H A D | pcie-mobiveil.h | 81 #define PAB_AXI_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x0ba8, win) macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_layerscape_gen4.h | 105 #define PAB_AXI_AMAP_PEX_WIN_L(idx) (0xba8 + 0x10 * (idx)) macro
|