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Searched defs:PCI_COMMAND_MEMORY (Results 1 – 25 of 119) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/openbios/drivers/
H A Dpci.h9 #define PCI_COMMAND_MEMORY 0x02 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/openbios/drivers/
H A Dpci.h9 #define PCI_COMMAND_MEMORY 0x02 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/openbios/drivers/
H A Dpci.h9 #define PCI_COMMAND_MEMORY 0x02 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/openbios/drivers/
H A Dpci.h9 #define PCI_COMMAND_MEMORY 0x02 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/openbios/drivers/
H A Dpci.h9 #define PCI_COMMAND_MEMORY 0x02 macro
/dports/emulators/qemu/qemu-6.2.0/roms/openbios/drivers/
H A Dpci.h9 #define PCI_COMMAND_MEMORY 0x02 macro
/dports/emulators/qemu60/qemu-6.0.0/roms/openbios/drivers/
H A Dpci.h9 #define PCI_COMMAND_MEMORY 0x02 macro
/dports/emulators/bochs/bochs-2.7/bios/
H A Drombios.h242 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/sysutils/rovclock/rovclock-0.6e/
H A Dpci.h19 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/lang/gnatdroid-sysroot-x86/android-19-x86/usr/include/linux/
H A Dpci_regs.h19 #define PCI_COMMAND_MEMORY 0x2 macro
/dports/lang/gnatdroid-sysroot/android-19-arm/usr/include/linux/
H A Dpci_regs.h19 #define PCI_COMMAND_MEMORY 0x2 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/include/
H A Dpci.h38 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/include/
H A Dpci.h38 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/include/
H A Dpci.h38 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/include/
H A Dpci.h38 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/include/
H A Dpci.h38 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/include/
H A Dpci.h38 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/include/
H A Dpci.h38 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/seabios-hppa/src/hw/
H A Dpci_regs.h33 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/qemu-palcode/
H A Dpci_regs.h33 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/seabios/src/hw/
H A Dpci_regs.h33 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/qemu-palcode/
H A Dpci_regs.h33 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/seabios-hppa/src/hw/
H A Dpci_regs.h33 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/seabios/src/hw/
H A Dpci_regs.h33 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/qemu-palcode/
H A Dpci_regs.h33 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ macro

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