1 /* $NetBSD: pte.h,v 1.7 2022/08/20 23:19:09 riastradh Exp $ */ 2 3 /* 4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Christoph Egger. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _X86_PTE_H 33 #define _X86_PTE_H 34 35 #ifndef _MACHINE_PTE_H_X86 36 #error Use machine/pte.h, not x86/pte.h directly. 37 #endif 38 39 /* Cacheability bits when we are using PAT */ 40 #define PGC_WB 0 /* The default */ 41 #define PGC_WC PTE_PWT /* WT and CD is WC */ 42 #define PGC_UCMINUS PTE_PCD /* UC but mtrr can override */ 43 #define PGC_UC (PTE_PWT | PTE_PCD) /* hard UC */ 44 45 /* 46 * #PF exception bits 47 */ 48 #define PGEX_P 0x0001 /* the page was present */ 49 #define PGEX_W 0x0002 /* exception during a write cycle */ 50 #define PGEX_U 0x0004 /* exception while in user mode */ 51 #define PGEX_RSVD 0x0008 /* a reserved bit was set in the page tables */ 52 #define PGEX_I 0x0010 /* exception during instruction fetch */ 53 #define PGEX_PK 0x0020 /* access disallowed by protection key */ 54 #define PGEX_SGX 0x8000 /* violation of sgx-specific access rights */ 55 56 /* 57 * pl*_pi: index in the ptp page for a pde mapping a VA. 58 * (pl*_i below is the index in the virtual array of all pdes per level) 59 */ 60 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT) 61 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT) 62 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT) 63 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT) 64 #define pl_pi(va, lvl) \ 65 (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1]) 66 67 /* 68 * pl*_i: generate index into pde/pte arrays in virtual space 69 */ 70 #define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT) 71 #define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT) 72 #define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT) 73 #define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT) 74 75 #endif /* _X86_PTE_H */ 76