xref: /openbsd/sys/arch/alpha/include/pte.h (revision 21c23d01)
1 /* $OpenBSD: pte.h,v 1.12 2014/01/26 17:40:11 miod Exp $ */
2 /* $NetBSD: pte.h,v 1.26 1999/04/09 00:38:11 thorpej Exp $ */
3 
4 /*-
5  * Copyright (c) 1998 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10  * NASA Ames Research Center.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
36  * All rights reserved.
37  *
38  * Author: Chris G. Demetriou
39  *
40  * Permission to use, copy, modify and distribute this software and
41  * its documentation is hereby granted, provided that both the copyright
42  * notice and this permission notice appear in all copies of the
43  * software, derivative works or modified versions, and any portions
44  * thereof, and that both notices appear in supporting documentation.
45  *
46  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
47  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
48  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49  *
50  * Carnegie Mellon requests users of this software to return to
51  *
52  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
53  *  School of Computer Science
54  *  Carnegie Mellon University
55  *  Pittsburgh PA 15213-3890
56  *
57  * any improvements or extensions that they make and grant Carnegie the
58  * rights to redistribute these changes.
59  */
60 
61 #ifndef _MACHINE_PTE_H_
62 #define	_MACHINE_PTE_H_
63 
64 /*
65  * Alpha page table entry.
66  * Things which are in the VMS PALcode but not in the OSF PALcode
67  * are marked with "(VMS)".
68  *
69  * This information derived from pp. (II) 3-3 - (II) 3-6 and
70  * (III) 3-3 - (III) 3-5 of the "Alpha Architecture Reference Manual" by
71  * Richard L. Sites.
72  */
73 
74 /*
75  * Alpha Page Table Entry
76  */
77 
78 #include <machine/alpha_cpu.h>
79 
80 typedef	alpha_pt_entry_t	pt_entry_t;
81 
82 #define	PT_ENTRY_NULL	((pt_entry_t *) 0)
83 #define	PTESHIFT	3			/* pte size == 1 << PTESHIFT */
84 
85 #define	PG_V		ALPHA_PTE_VALID
86 #define	PG_NV		0
87 #define	PG_FOR		ALPHA_PTE_FAULT_ON_READ
88 #define	PG_FOW		ALPHA_PTE_FAULT_ON_WRITE
89 #define	PG_FOE		ALPHA_PTE_FAULT_ON_EXECUTE
90 #define	PG_ASM		ALPHA_PTE_ASM
91 #define	PG_GH		ALPHA_PTE_GRANULARITY
92 #define	PG_KRE		ALPHA_PTE_KR
93 #define	PG_URE		ALPHA_PTE_UR
94 #define	PG_KWE		ALPHA_PTE_KW
95 #define	PG_UWE		ALPHA_PTE_UW
96 #define	PG_PROT		(ALPHA_PTE_PROT | PG_EXEC | PG_FOE)
97 #define	PG_RSVD		0x000000000000cc80	/* Reserved for hardware */
98 #define	PG_WIRED	0x0000000000010000	/* Wired. [SOFTWARE] */
99 #define	PG_PVLIST	0x0000000000020000	/* on pv list [SOFTWARE] */
100 #define	PG_EXEC		0x0000000000040000	/* execute perms [SOFTWARE] */
101 #define	PG_FRAME	ALPHA_PTE_PFN
102 #define	PG_SHIFT	32
103 #define	PG_PFNUM(x)	ALPHA_PTE_TO_PFN(x)
104 
105 /*
106  * These are the PALcode PTE bits that we care about when checking to see
107  * if a PTE has changed in such a way as to require a TBI.
108  */
109 #define	PG_PALCODE(x)	((x) & ALPHA_PTE_PALCODE)
110 
111 #if defined(_KERNEL) || defined(__KVM_ALPHA_PRIVATE)
112 #define	NPTEPG_SHIFT	(PAGE_SHIFT - PTESHIFT)
113 #define	NPTEPG		(1L << NPTEPG_SHIFT)
114 
115 #define	PTEMASK		(NPTEPG - 1)
116 
117 #define	l3pte_index(va)	\
118 	(((vaddr_t)(va) >> PAGE_SHIFT) & PTEMASK)
119 
120 #define	l2pte_index(va)	\
121 	(((vaddr_t)(va) >> (PAGE_SHIFT + NPTEPG_SHIFT)) & PTEMASK)
122 
123 #define	l1pte_index(va) \
124 	(((vaddr_t)(va) >> (PAGE_SHIFT + 2 * NPTEPG_SHIFT)) & PTEMASK)
125 
126 #define	VPT_INDEX(va)	\
127 	(((vaddr_t)(va) >> PAGE_SHIFT) & ((1 << 3 * NPTEPG_SHIFT) - 1))
128 
129 /* Space mapped by one level 1 PTE */
130 #define	ALPHA_L1SEG_SIZE	(1L << ((2 * NPTEPG_SHIFT) + PAGE_SHIFT))
131 
132 /* Space mapped by one level 2 PTE */
133 #define	ALPHA_L2SEG_SIZE	(1L << (NPTEPG_SHIFT + PAGE_SHIFT))
134 
135 #define	alpha_trunc_l1seg(x)	(((u_long)(x)) & ~(ALPHA_L1SEG_SIZE-1))
136 #define	alpha_trunc_l2seg(x)	(((u_long)(x)) & ~(ALPHA_L2SEG_SIZE-1))
137 #endif /* _KERNEL || __KVM_ALPHA_PRIVATE */
138 
139 #ifdef _KERNEL
140 extern	pt_entry_t *kernel_lev1map;	/* kernel level 1 page table */
141 #endif /* _KERNEL */
142 
143 #endif /* ! _MACHINE_PTE_H_ */
144