1 #ifndef PLL_HARDWARE 2 #define PLL_HARDWARE 3 4 /* leaf 1 */ 5 /* edx */ 6 #define PLL_HAS_MMX 1 << 23 7 #define PLL_HAS_SSE 1 << 25 8 #define PLL_HAS_SSE2 1 << 26 9 10 /* ecx */ 11 #define PLL_HAS_SSE3 1 12 #define PLL_HAS_SSSE3 1 << 9 13 #define PLL_HAS_FMA 1 << 12 14 #define PLL_HAS_SSE41 1 << 19 15 #define PLL_HAS_SSE42 1 << 20 16 #define PLL_HAS_AVX 1 << 28 17 18 19 /* leaf 7 */ 20 /* ebx */ 21 #define PLL_HAS_AVX2 1 << 5 22 23 /* leaf 0x80000001 */ 24 /* ecx*/ 25 #define PLL_HAS_SSE4A 1 << 6 26 #define PLL_HAS_FMA4 1 << 16 27 28 typedef struct 29 { 30 int has_mmx; 31 int has_sse; 32 int has_sse2; 33 int has_sse3; 34 int has_ssse3; 35 int has_sse41; 36 int has_sse42; 37 int has_sse4a; 38 int has_avx; 39 int has_avx2; 40 int has_fma; 41 int has_fma4; 42 int cpu_sockets; 43 int cores; 44 char vendor[13]; 45 46 } pllHardwareInfo; 47 48 #endif 49