1 /* 2 * Copyright (c) 1992, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc. 7 * 8 * %sccs.include.redist.c% 9 * 10 * from: $Hdr: screg_1185.h,v 4.300 91/06/09 06:22:14 root Rel41 $ SONY 11 * 12 * @(#)screg_1185.h 8.1 (Berkeley) 06/11/93 13 */ 14 15 /* 16 * Copyright (c) 1989- by SONY Corporation. 17 */ 18 19 /* 20 * screg_1185.h ver 0.0 21 * for SCSI I/F Chip CXD1185Q 22 */ 23 24 /* 25 * SCSI I/F Chip CXD1185Q Register address assignment 26 */ 27 #ifdef mips 28 # define SCSI_BASE 0xbfe00100 29 #else 30 # define SCSI_BASE 0xe1900000 31 #endif 32 33 #ifndef U_CHAR 34 #ifdef mips 35 #define U_CHAR volatile u_char 36 #else 37 #define U_CHAR u_char 38 #endif 39 #endif 40 41 #define sc_statr *( (U_CHAR *)(SCSI_BASE + 0x0) ) 42 #define sc_comr *( (U_CHAR *)(SCSI_BASE + 0x0) ) 43 #define sc_datr *( (U_CHAR *)(SCSI_BASE + 0x1) ) 44 #define sc_intrq1 *( (U_CHAR *)(SCSI_BASE + 0x2) ) 45 #define sc_intrq2 *( (U_CHAR *)(SCSI_BASE + 0x3) ) 46 #define sc_envir *( (U_CHAR *)(SCSI_BASE + 0x3) ) 47 #define sc_cmonr *( (U_CHAR *)(SCSI_BASE + 0x4) ) 48 #define sc_timer *( (U_CHAR *)(SCSI_BASE + 0x4) ) 49 #define sc_ffstr *( (U_CHAR *)(SCSI_BASE + 0x5) ) 50 #define sc_idenr *( (U_CHAR *)(SCSI_BASE + 0x6) ) 51 #define sc_tclow *( (U_CHAR *)(SCSI_BASE + 0x7) ) 52 #define sc_tcmid *( (U_CHAR *)(SCSI_BASE + 0x8) ) 53 #define sc_tchi *( (U_CHAR *)(SCSI_BASE + 0x9) ) 54 #define sc_intok1 *( (U_CHAR *)(SCSI_BASE + 0xa) ) 55 #define sc_intok2 *( (U_CHAR *)(SCSI_BASE + 0xb) ) 56 #define sc_moder *( (U_CHAR *)(SCSI_BASE + 0xc) ) 57 #define sc_syncr *( (U_CHAR *)(SCSI_BASE + 0xd) ) 58 #define sc_busconr *( (U_CHAR *)(SCSI_BASE + 0xe) ) 59 #define sc_ioptr *( (U_CHAR *)(SCSI_BASE + 0xf) ) 60 61 /* 62 * CXD1185Q Register bit assignment 63 */ 64 65 /* sc_statr (status register) bit define 66 */ 67 #define R0_MRST 0x80 68 #define R0_MDBP 0x40 69 #define R0_INIT 0x10 70 #define R0_TARG 8 71 #define R0_TRBZ 4 72 #define R0_MIRQ 2 73 #define R0_CIP 1 74 75 /* sc_comr (command register) bit define 76 */ 77 #define R0_DMA 0x20 78 #define R0_TRBE 0x10 79 80 /* sc_intrq1 (interrupt request register 1) bit define 81 */ 82 #define R2_STO 0x10 83 #define R2_RSL 8 84 #define R2_SWA 4 85 #define R2_SWOA 2 86 #define R2_ARBF 1 87 88 /* sc_intrq2 (interrupt request register 2) bit define 89 */ 90 #define R3_FNC 0x80 91 #define R3_DCNT 0x40 92 #define R3_SRST 0x20 93 #define R3_PHC 0x10 94 #define R3_DATN 8 95 #define R3_DPE 4 96 #define R3_SPE 2 97 #define R3_RMSG 1 98 99 /* sc_envir (environment register) bit define 100 */ 101 #define R3_DIFE 0x80 102 #define R3_SDPM 0x40 103 #define R3_DPEN 0x20 104 #define R3_SIRM 0x10 105 #define R3_FS_MASK 3 106 107 /* sc_cmonr (scsi control monitor register) bit define 108 */ 109 #define R4_MBSY 0x80 110 #define R4_MSEL 0x40 111 #define R4_MMSG 0x20 112 #define R4_MCD 0x10 113 #define R4_MIO 8 114 #define R4_MREQ 4 115 #define R4_MACK 2 116 #define R4_MATN 1 117 118 /* sc_ffstr (FIFO status register) bit define 119 */ 120 #define R5_FIE 0x80 121 #define R5_FIF 0x10 122 #define R5_FIFOREM 0x1f 123 124 /* sc_idenr (scsi identify register) bit define 125 */ 126 #define R6_OID_MASK 0x07 127 #define R6_SID_MASK 0xe0 128 #define R6_TID_MASK 0xe0 129 130 /* sc_intok1 (interrupt enable register 1) bit define 131 */ 132 #define Ra_STO 0x10 133 #define Ra_RSL 8 134 #define Ra_SWA 4 135 #define Ra_SWOA 2 136 #define Ra_ARBF 1 137 138 /* sc_intok2 (interrupt enable register 2) bit define 139 */ 140 #define Rb_FNC 0x80 141 #define Rb_DCNT 0x40 142 #define Rb_SRST 0x20 143 #define Rb_PHC 0x10 144 #define Rb_DATN 8 145 #define Rb_DPE 4 146 #define Rb_SPE 2 147 #define Rb_RMSG 1 148 149 /* sc_moder (mode register) bit define 150 */ 151 #define Rc_HDPE 0x80 152 #define Rc_HSPE 0x40 153 #define Rc_HATN 0x20 154 #define Rc_TMSL 0x10 155 #define Rc_SPHI 8 156 #define Rc_BDMA 1 157 158 /* sc_syncr (synchronous transfer control register) bit define 159 */ 160 #define Rd_TPD_MASK 0xf0 161 #define Rd_TOF_MASK 0x0f 162 #define MIN_TP 62 /* minimum transfer period 4ns * 25 */ 163 #define MAX_OFFSET 15 164 165 /* sc_busconr (scsi bus control register) bit define 166 */ 167 #define Re_ABSY 0x80 168 #define Re_ASEL 0x40 169 #define Re_AMSG 0x20 170 #define Re_ACD 0x10 171 #define Re_AIO 8 172 #define Re_AREQ 4 173 #define Re_AACK 2 174 #define Re_AATN 1 175 176 /* sc_ioptr (I/O port) bit define 177 */ 178 #define Rf_PCN_MASK 0xf0 179 # define Rf_PCN3 0x80 180 # define Rf_PCN2 0x40 181 # define Rf_PCN1 0x20 182 # define Rf_PCN0 0x10 183 #define Rf_PRT_MASK 0x0f 184 # define Rf_PRT3 8 185 # define Rf_PRT2 4 186 # define Rf_PRT1 2 187 # define Rf_PRT0 1 188 189 190 /* 191 * CXD1185Q commands 192 */ 193 /* category 0 194 */ 195 #define SCMD_NOP 0x00 196 #define SCMD_CHIP_RST 0x01 197 #define SCMD_AST_RST 0x02 198 #define SCMD_FLSH_FIFO 0x03 199 #define SCMD_AST_CTRL 0x04 200 #define SCMD_NGT_CTRL 0x05 201 #define SCMD_AST_DATA 0x06 202 #define SCMD_NGT_DATA 0x07 203 204 /* category 1 205 */ 206 #define SCMD_RESEL 0x40 207 #define SCMD_SEL 0x41 208 #define SCMD_SEL_ATN 0x42 209 #define SCMD_ENB_SEL 0x43 210 #define SCMD_DIS_SEL 0x44 211 212 /* category 2 213 */ 214 #define SCMD_SEND_MES 0x80 215 #define SCMD_SEND_STAT 0x81 216 #define SCMD_SEND_DATA 0x82 217 #define SCMD_DISCONNECT 0x83 218 #define SCMD_RCV_MOUT 0x84 219 #define SCMD_RCV_CMD 0x85 220 #define SCMD_RCV_DATA 0x86 221 222 /* category 3 223 */ 224 #define SCMD_TR_INFO 0xc0 225 #define SCMD_TR_PAD 0xc1 226 #define SCMD_NGT_ACK 0xc2 227 #define SCMD_AST_ATN 0xc3 228 #define SCMD_NGT_ATN 0xc4 229 230 231 /* 232 * scsi parameter definition 233 */ 234 /* SCSI bus ID 235 */ 236 #define SC_OWNID 0x7 237 #define SC_TG_SHIFT 5 238 239 /* scsi bus phase 240 */ 241 #define SC_PMASK (R4_MMSG|R4_MCD|R4_MIO) 242 # define DAT_OUT 0 243 # define DAT_IN R4_MIO 244 # define COM_OUT R4_MCD 245 # define STAT_IN (R4_MCD|R4_MIO) 246 # define MES_OUT (R4_MMSG|R4_MCD) 247 # define MES_IN (R4_MMSG|R4_MCD|R4_MIO) 248 249 /* scsi command types define 250 */ 251 #define CMD_TYPEMASK 0xe0 252 # define CMD_T0 0 /* 6 byte commands */ 253 # define CMD_T1 0x20 /* 10 byte commands */ 254 # define CMD_T5 0xa0 /* 12 byte commands */ 255 # define CMD_T6 0xc0 256 # define CMD_T7 0xe0 257 258 #define MAXNSCSI 1 259