| /dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/bfin/ |
| H A D | pr.s | 9 R4 = 0x10 define
10 R4 = R4 + R3; define
13 R4 = 0x14; define
14 R4 = R4 + R3; define
48 R4 = 0x24; define
49 R4 = R3 + R4 define
66 R4 = 0x34; define
67 R4 = R4 + R3; define
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| H A D | lmu_excpt_default.S | 54 R4 = 0;R5 = 0;R6 = 0;R7 = 0; // Exception handler will set these, reset them first define
73 R4 = 0;R5 = 0;R6 = 0;R7 = 0; // Exception handler will set these, reset them first define
144 R4 = 0;R5 = 0;R6 = 0;R7 = 0; // Exception handler will set these, reset them first define
163 R4 = 0;R5 = 0;R6 = 0;R7 = 0; // Exception handler will set these, reset them first define
183 R4 = 0;R5 = 0;R6 = 0;R7 = 0; // Exception handler will set these, reset them first define
202 R4 = 0;R5 = 0;R6 = 0;R7 = 0; // Exception handler will set these, reset them first define
263 R4 = 0;R5 = 0;R6 = 0;R7 = 0; // Exception handler will set these, reset them first define
282 R4 = 0;R5 = 0;R6 = 0;R7 = 0; // Exception handler will set these, reset them first define
297 R4 = SEQSTAT; // Get exception cause define
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| H A D | s30.s | 21 R4 = A0.w; define
39 R4 = A0.w; define
57 R4 = A0.w; define
75 R4 = A0.w; define
93 R4 = A0.w; define
111 R4 = A0.w; define
129 R4 = A0.w; define
147 R4 = A0.w; define
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| H A D | a23.s | 14 R4 = A0.w; define
25 R4 = A0.w; define
36 R4 = A0.w; define
47 R4 = A0.w; define
58 R4 = A1.w; define
74 R4 = A0.w; define
79 R4 = A1.w; define
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| H A D | c_ldst_ld_d_p_ppmm_hbx.s | 19 R4 = W [ P4 ++ ] (Z); define
39 R4 = W [ P2 ++ ] (Z); define
50 R4 = W [ P1 ++ ] (Z); define
61 R4 = W [ P5 ++ ] (X); define
101 R4 = W [ FP ++ ] (X); define
112 R4 = W [ P4 -- ] (Z); define
132 R4 = W [ P2 -- ] (Z); define
143 R4 = W [ P1 -- ] (Z); define
154 R4 = W [ P5 -- ] (X); define
194 R4 = W [ FP -- ] (X); define
[all …]
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| H A D | c_ldst_st_p_d.s | 32 R4 = [ P5 ]; define
57 R4 = [ P5 ]; define
82 R4 = [ P5 ]; define
107 R4 = [ P5 ]; define
132 R4 = [ P5 ]; define
157 R4 = [ P5 ]; define
182 R4 = [ P5 ]; define
207 R4 = [ P5 ]; define
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| H A D | c_ldst_st_p_d_b.s | 33 R4 = [ P5 ]; define
58 R4 = [ P5 ]; define
83 R4 = [ P5 ]; define
108 R4 = [ P5 ]; define
133 R4 = [ P5 ]; define
158 R4 = [ P5 ]; define
183 R4 = [ P5 ]; define
208 R4 = [ P5 ]; define
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| H A D | m17.s | 21 R4 = 0; define
33 R4 = 0; define
37 R4 = A0; define
45 R4 = 0; define
55 R4 = 0; define
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| H A D | vit_max2.s | 19 R4 = W[P0]; define
28 R4 = W[P0]; define
36 R4 = W[P0]; define
44 R4 = W[P0]; define
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| H A D | a22.s | 14 R4 = A0.w; define
24 R4 = A0.w; define
35 R4 = A0.w; define
45 R4 = A0.w; define
63 R4 = A0.w; define
68 R4 = A1.w; define
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| H A D | c_ldst_st_p_d_h.s | 33 R4 = [ P5 ]; define
58 R4 = [ P5 ]; define
83 R4 = [ P5 ]; define
108 R4 = [ P5 ]; define
139 R4 = [ P5 ]; define
164 R4 = [ P5 ]; define
189 R4 = [ P5 ]; define
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| H A D | c_dsp32shift_rot.s | 23 R4 = ROT R3 BY R0.L; define
48 R4 = ROT R2 BY R1.L; define
73 R4 = ROT R1 BY R2.L; define
98 R4 = ROT R0 BY R3.L; define
128 R4 = ROT R4 BY R4.L; define
156 R4 = ROT R6 BY R5.L; define
181 R4 = ROT R5 BY R6.L; define
206 R4 = ROT R4 BY R7.L; define
232 R4 = ROT R4 BY R0.L; define
258 R4 = ROT R4 BY R1.L; define
[all …]
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| H A D | c_pushpopmultiple_dreg.s | 17 R4 = 0x05; define
26 R4 = 0; define
43 R4 = 0x15; define
51 R4 = 0; define
67 R4 = 0x25; define
74 R4 = 0; define
89 R4 = 0x35; define
95 R4 = 0; define
109 R4 = 0x45 (X); define
114 R4 = 0; define
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| H A D | c_dsp32shift_rot_mix.s | 23 R4 = ROT R3 BY R0.L; define
59 R4 = ROT R2 BY R1.L; define
84 R4 = ROT R1 BY R2.L; define
109 R4 = ROT R0 BY R3.L; define
139 R4 = ROT R4 BY R4.L; define
167 R4 = ROT R6 BY R5.L; define
192 R4 = ROT R5 BY R6.L; define
217 R4 = ROT R4 BY R7.L; define
243 R4 = ROT R4 BY R0.L; define
269 R4 = ROT R4 BY R1.L; define
[all …]
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| H A D | c_regmv_dr_acc_acc.s | 25 R4 = A0.x; define
39 R4 = A0.x; define
59 R4 = A0.x; define
95 R4 = A0.w; define
110 R4 = A0.x; define
143 R4 = A0.w; define
167 R4 = A0.w; define
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| H A D | c_dsp32alu_mix.s | 67 R4 = R0 -|+ R1 (SCO); /* 0x8000DDDE)*/ define
75 R4 = R0 +|- R1 , R5 = R0 -|+ R1 (CO); /* 0x */ define
86 R4 = MIN ( R0 , R1 ); /* 0x456789AB */ define
92 R4 = MIN ( R0 , R1 ) (V); /* 0x456789AB */ define
124 R4 = ( A0 += A1 ); /* 0x */ define
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| H A D | c_dsp32shift_af.s | 19 R4 = ASHIFT R0 BY R0.L; define
40 R4 = ASHIFT R3 BY R1.L; define
57 R4 = ASHIFT R2 BY R2.L; define
76 R4 = ASHIFT R3 BY R3.L; define
96 R4 = ASHIFT R5 BY R4.L; define
123 R4 = ASHIFT R6 BY R5.L; define
173 R4 = ASHIFT R4 BY R7.L; define
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| H A D | c_ldst_ld_d_p.s | 19 R4 = [ P5 ]; define
30 R4 = [ P5 ]; define
40 R4 = [ P5 ]; define
52 R4 = [ P5 ]; define
62 R4 = [ P5 ]; define
90 R4 = [ FP ]; define
102 R4 = [ FP ]; define
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| H A D | c_dsp32shift_af_s.s | 19 R4 = ASHIFT R0 BY R0.L (S); define
40 R4 = ASHIFT R3 BY R1.L (S); define
57 R4 = ASHIFT R2 BY R2.L (S); define
76 R4 = ASHIFT R3 BY R3.L (S); define
96 R4 = ASHIFT R5 BY R4.L; define
123 R4 = ASHIFT R6 BY R5.L (S); define
173 R4 = ASHIFT R4 BY R7.L (S); define
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| H A D | c_dsp32alu_rrpmmp_sft.s | 24 R4 = R0 +|- R4 , R3 = R0 -|+ R4 (ASR); define
49 R4 = R1 +|- R4 , R3 = R1 -|+ R4 (ASR); define
74 R4 = R2 +|- R4 , R3 = R2 -|+ R4 (ASR); define
99 R4 = R3 +|- R4 , R3 = R3 -|+ R4 (ASR); define
124 R4 = R4 +|- R4 , R3 = R4 -|+ R4 (ASR); define
149 R4 = R5 +|- R4 , R3 = R5 -|+ R4 (ASR); define
174 R4 = R6 +|- R4 , R3 = R6 -|+ R4 (ASR); define
199 R4 = R7 +|- R4 , R3 = R7 -|+ R4 (ASL); define
220 R4 = R2 +|- R5 , R3 = R2 -|+ R5 (ASR); define
245 R4 = R3 +|- R3 , R5 = R3 -|+ R3 (ASR); define
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| H A D | c_dsp32alu_rrppmm_sft.s | 23 R4 = R0 +|+ R4, R3 = R0 -|- R4 (ASL); define
48 R4 = R1 +|+ R4, R3 = R1 -|- R4 (ASR); define
73 R4 = R2 +|+ R4, R3 = R2 -|- R4 (ASR); define
98 R4 = R3 +|+ R4, R3 = R3 -|- R4 (ASL); define
123 R4 = R4 +|+ R4, R3 = R4 -|- R4 (ASR); define
148 R4 = R5 +|+ R4, R3 = R5 -|- R4 (ASR); define
173 R4 = R6 +|+ R4, R3 = R6 -|- R4 (ASR); define
198 R4 = R7 +|+ R4, R3 = R7 -|- R4 (ASL); define
219 R4 = R2 +|+ R5, R3 = R2 -|- R5 (ASR); define
244 R4 = R3 +|+ R3, R5 = R3 -|- R3 (ASR); define
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| H A D | c_dsp32alu_rrppmm_sft_x.s | 23 R4 = R0 +|+ R4, R3 = R0 -|- R4 (CO , ASL); define
48 R4 = R1 +|+ R4, R3 = R1 -|- R4 (CO , ASR); define
73 R4 = R2 +|+ R4, R3 = R2 -|- R4 (CO , ASR); define
98 R4 = R3 +|+ R4, R3 = R3 -|- R4 (CO , ASL); define
123 R4 = R4 +|+ R4, R3 = R4 -|- R4 (CO , ASR); define
148 R4 = R5 +|+ R4, R3 = R5 -|- R4 (CO , ASR); define
173 R4 = R6 +|+ R4, R3 = R6 -|- R4 (CO , ASR); define
198 R4 = R7 +|+ R4, R3 = R7 -|- R4 (CO , ASL); define
219 R4 = R2 +|+ R5, R3 = R2 -|- R5 (CO , ASR); define
244 R4 = R3 +|+ R3, R5 = R3 -|- R3 (CO , ASR); define
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| H A D | c_dsp32alu_rrpmmp_sft_x.s | 23 R4 = R0 +|- R4 , R3 = R0 -|+ R4 (CO , ASR); define
48 R4 = R1 +|- R4 , R3 = R1 -|+ R4 (CO , ASR); define
73 R4 = R2 +|- R4 , R3 = R2 -|+ R4 (CO , ASR); define
98 R4 = R3 +|- R4 , R3 = R3 -|+ R4 (CO , ASR); define
123 R4 = R4 +|- R4 , R3 = R4 -|+ R4 (CO , ASR); define
148 R4 = R5 +|- R4 , R3 = R5 -|+ R4 (CO , ASR); define
173 R4 = R6 +|- R4 , R3 = R6 -|+ R4 (CO , ASR); define
198 R4 = R7 +|- R4 , R3 = R7 -|+ R4 (CO , ASL); define
219 R4 = R2 +|- R5 , R3 = R2 -|+ R5 (CO , ASR); define
244 R4 = R3 +|- R3 , R5 = R3 -|+ R3 (CO , ASR); define
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| H A D | c_ldst_st_p_d_pp.s | 115 R4 = [ P5 ++ ]; define
130 R4 = [ P4 ++ ]; define
145 R4 = [ P3 ++ ]; define
160 R4 = [ P2 ++ ]; define
175 R4 = [ P1 ++ ]; define
213 R4 = [ SP ++ ]; define
228 R4 = [ FP ++ ]; define
336 R4 = [ P5 -- ]; define
351 R4 = [ P4 -- ]; define
366 R4 = [ P3 -- ]; define
[all …]
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| /dports/sysutils/xvidcap/xvidcap-1.1.7/ffmpeg/libavcodec/bfin/ |
| H A D | pixels_bfin.S | 26 R4 = 0; define
56 R4 = 0; define
252 R4 = BYTEOP2P (R3:2,R1:0) (RNDL) || R0 = [I0++] || R2 =[I1++]; define
270 R4 = BYTEOP2P (R3:2,R1:0) (RNDH) || R0 = [I0++] || R2 =[I1++]; define
272 R4 = R4 +|+ R6 || R7 = [I3--]; define
277 R4 = R4 +|+ R6 || R7 = [I3--]; define
310 R4 = BYTEOP2P (R3:2,R1:0) (TL) || R0 = [I0++] || R2 =[I1++]; define
328 R4 = BYTEOP2P (R3:2,R1:0) (TH) || R0 = [I0++] || R2 =[I1++]; define
330 R4 = R4 +|+ R6 || R7 = [I3--]; define
335 R4 = R4 +|+ R6 || R7 = [I3--]; define
[all …]
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