1 /* radare - LGPL - Copyright 2016 - bobby.smiles32@gmail.com */
2 #ifndef R_ASM_ARCH_RSP_RSP_IDEC_H
3 #define R_ASM_ARCH_RSP_RSP_IDEC_H
4
5 #include <r_types.h>
6
7
8 extern const char* rsp_gp_reg_soft_names[];
9 extern const char* rsp_c0_reg_soft_names[];
10 extern const char* rsp_gp_reg_names[];
11 extern const char* rsp_c0_reg_names[];
12 extern const char* rsp_c2_creg_names[];
13 extern const char* rsp_c2_accu_names[];
14 extern const char* rsp_c2_vreg_names[];
15 extern const char* rsp_c2_vreg_element_names[];
16
17
18 enum {
19 RSP_DMEM_OFFSET = 0x0000,
20 RSP_IMEM_OFFSET = 0x1000
21 };
22
23 /* restrict address inside rsp MEM */
rsp_mem_addr(ut64 addr,ut64 base)24 static inline ut64 rsp_mem_addr(ut64 addr, ut64 base) { addr &= 0xfff; addr |= base; return addr; }
25
26
27 typedef enum {
28 RSP_OP_INVALID,
29 RSP_OP_NOP,
30 RSP_OP_SLL,
31 RSP_OP_SRL,
32 RSP_OP_SRA,
33 RSP_OP_SLLV,
34 RSP_OP_SRLV,
35 RSP_OP_SRAV,
36 RSP_OP_JR,
37 RSP_OP_BREAK,
38 RSP_OP_ADD,
39 RSP_OP_ADDU,
40 RSP_OP_SUB,
41 RSP_OP_SUBU,
42 RSP_OP_AND,
43 RSP_OP_OR,
44 RSP_OP_XOR,
45 RSP_OP_NOR,
46 RSP_OP_SLT,
47 RSP_OP_SLTU,
48 RSP_OP_BLTZ,
49 RSP_OP_BGEZ,
50 RSP_OP_BLTZAL,
51 RSP_OP_BGEZAL,
52 RSP_OP_MFC0,
53 RSP_OP_MTC0,
54 RSP_OP_MFC2,
55 RSP_OP_MTC2,
56 RSP_OP_CFC2,
57 RSP_OP_CTC2,
58 RSP_OP_VMULF,
59 RSP_OP_VMULU,
60 RSP_OP_VMUDL,
61 RSP_OP_VMUDM,
62 RSP_OP_VMUDN,
63 RSP_OP_VMUDH,
64 RSP_OP_VMACF,
65 RSP_OP_VMACU,
66 RSP_OP_VMADL,
67 RSP_OP_VMADM,
68 RSP_OP_VMADN,
69 RSP_OP_VMADH,
70 RSP_OP_VADD,
71 RSP_OP_VSUB,
72 RSP_OP_VABS,
73 RSP_OP_VADDC,
74 RSP_OP_VSUBC,
75 RSP_OP_VSAR,
76 RSP_OP_VLT,
77 RSP_OP_VEQ,
78 RSP_OP_VNE,
79 RSP_OP_VGE,
80 RSP_OP_VCL,
81 RSP_OP_VCH,
82 RSP_OP_VCR,
83 RSP_OP_VMRG,
84 RSP_OP_VAND,
85 RSP_OP_VNAND,
86 RSP_OP_VOR,
87 RSP_OP_VNOR,
88 RSP_OP_VXOR,
89 RSP_OP_VNXOR,
90 RSP_OP_VRCP,
91 RSP_OP_VRCPL,
92 RSP_OP_VRCPH,
93 RSP_OP_VMOV,
94 RSP_OP_VRSQ,
95 RSP_OP_VRSQL,
96 RSP_OP_VRSQH,
97 RSP_OP_VNOP,
98 RSP_OP_LBV,
99 RSP_OP_LSV,
100 RSP_OP_LLV,
101 RSP_OP_LDV,
102 RSP_OP_LQV,
103 RSP_OP_LRV,
104 RSP_OP_LPV,
105 RSP_OP_LUV,
106 RSP_OP_LHV,
107 RSP_OP_LFV,
108 RSP_OP_LTV,
109 RSP_OP_SBV,
110 RSP_OP_SSV,
111 RSP_OP_SLV,
112 RSP_OP_SDV,
113 RSP_OP_SQV,
114 RSP_OP_SRV,
115 RSP_OP_SPV,
116 RSP_OP_SUV,
117 RSP_OP_SHV,
118 RSP_OP_SFV,
119 RSP_OP_SWV,
120 RSP_OP_STV,
121 RSP_OP_J,
122 RSP_OP_JAL,
123 RSP_OP_BEQ,
124 RSP_OP_BNE,
125 RSP_OP_BLEZ,
126 RSP_OP_BGTZ,
127 RSP_OP_ADDI,
128 RSP_OP_ADDIU,
129 RSP_OP_SLTI,
130 RSP_OP_SLTIU,
131 RSP_OP_ANDI,
132 RSP_OP_ORI,
133 RSP_OP_XORI,
134 RSP_OP_LUI,
135 RSP_OP_LB,
136 RSP_OP_LH,
137 RSP_OP_LW,
138 RSP_OP_LBU,
139 RSP_OP_LHU,
140 RSP_OP_SB,
141 RSP_OP_SH,
142 RSP_OP_SW
143 } rsp_opcode;
144
145 typedef enum {
146 RSP_OPND_GP_REG, /* u=reg_num */
147 RSP_OPND_TARGET, /* u=imem_address */
148 RSP_OPND_OFFSET, /* u=imem_address, s=offset */
149 RSP_OPND_ZIMM, /* u=zero-extended imm */
150 RSP_OPND_SIMM, /* s=sign extended imm */
151 RSP_OPND_SHIFT_AMOUNT, /* u=shift amount */
152 RSP_OPND_BASE_OFFSET, /* u=reg_numm, s=offset */
153 RSP_OPND_C0_REG, /* u=reg_num */
154 RSP_OPND_C2_CREG, /* u=reg_num */
155 RSP_OPND_C2_ACCU, /* u=reg_num */
156 RSP_OPND_C2_VREG, /* u=reg_num */
157 RSP_OPND_C2_VREG_BYTE, /* u=reg_num, s=byte element (0-15) */
158 RSP_OPND_C2_VREG_SCALAR, /* u=reg_num, s=scalar element (0-7) */
159 RSP_OPND_C2_VREG_ELEMENT /* u=reg_num, s=element (0-15) */
160 } rsp_operand_type;
161
162 typedef struct {
163 rsp_operand_type type;
164 ut64 u;
165 st64 s;
166 } rsp_operand;
167
168 enum { RSP_MAX_OPNDS = 3 };
169
170 typedef struct {
171 const char* mnemonic;
172 rsp_opcode opcode;
173 int noperands;
174 rsp_operand operands[RSP_MAX_OPNDS];
175 } rsp_instruction;
176
177 rsp_instruction rsp_instruction_decode(ut64 pc, ut32 iw);
178
179 #endif
180