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Searched defs:SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h1291 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h1485 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
H A Dsdma0_4_2_sh_mask.h1493 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
H A Dsdma0_4_2_2_sh_mask.h1503 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1168 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
H A Doss_2_4_sh_mask.h1288 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
H A Doss_3_0_1_sh_mask.h1736 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
H A Doss_3_0_sh_mask.h2052 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h1287 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h1275 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h1304 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro