1 /********** 2 STAG version 2.7 3 Copyright 2000 owned by the United Kingdom Secretary of State for Defence 4 acting through the Defence Evaluation and Research Agency. 5 Developed by : Jim Benson, 6 Department of Electronics and Computer Science, 7 University of Southampton, 8 United Kingdom. 9 With help from : Nele D'Halleweyn, Ketan Mistry, Bill Redman-White, 10 and Craig Easson. 11 12 Based on STAG version 2.1 13 Developed by : Mike Lee, 14 With help from : Bernard Tenbroek, Bill Redman-White, Mike Uren, Chris Edwards 15 and John Bunyan. 16 Acknowledgements : Rupert Howes and Pete Mole. 17 **********/ 18 19 /********** 20 Modified by Paolo Nenzi 2002 21 ngspice integration 22 **********/ 23 24 #ifndef SOI3 25 #define SOI3 26 27 #include "ngspice/ifsim.h" 28 #include "ngspice/cktdefs.h" 29 #include "ngspice/gendefs.h" 30 #include "ngspice/complex.h" 31 #include "ngspice/noisedef.h" 32 33 34 /* declarations for SOI3 MOSFETs */ 35 36 /* indices to the array of SOI(3) noise sources */ 37 38 enum { 39 SOI3RDNOIZ = 0, 40 SOI3RSNOIZ, 41 SOI3IDNOIZ, 42 SOI3FLNOIZ, 43 SOI3TOTNOIZ, 44 /* finally, the number of noise sources */ 45 SOI3NSRCS 46 }; 47 48 /* information needed for each instance */ 49 50 typedef struct sSOI3instance { 51 52 struct GENinstance gen; 53 54 #define SOI3modPtr(inst) ((struct sSOI3model *)((inst)->gen.GENmodPtr)) 55 #define SOI3nextInstance(inst) ((struct sSOI3instance *)((inst)->gen.GENnextInstance)) 56 #define SOI3name gen.GENname 57 #define SOI3states gen.GENstate 58 59 const int SOI3dNode; /* number of the drain node of the mosfet */ 60 const int SOI3gfNode; /* number of the front gate node of the mosfet */ 61 const int SOI3sNode; /* number of the source node of the mosfet */ 62 const int SOI3gbNode; /* number of the back gate node of the mosfet */ 63 const int SOI3bNode; /* number of the bulk node of the mosfet */ 64 const int SOI3toutNode; /* number of thermal output node (tout) */ 65 66 int SOI3branch; /* branch number for zero voltage source if no thermal */ 67 68 int SOI3dNodePrime; /* number of the internal drain node of the mosfet */ 69 int SOI3sNodePrime; /* number of the internal source node of the mosfet */ 70 71 72 int SOI3tout1Node; /* first internal thermal node */ 73 int SOI3tout2Node; /* second internal thermal node */ 74 int SOI3tout3Node; /* third internal thermal node */ 75 int SOI3tout4Node; /* fourth internal thermal node */ 76 77 double SOI3l; /* the length of the channel region */ 78 double SOI3w; /* the width of the channel region */ 79 double SOI3m; /* the parallel multiplier parameter */ 80 81 double SOI3as; /* Area of source region */ 82 double SOI3ad; /* Area of drain region */ 83 double SOI3ab; /* Area of body region */ 84 85 double SOI3drainSquares; /* the length of the drain in squares */ 86 double SOI3sourceSquares; /* the length of the source in squares */ 87 88 double SOI3sourceConductance; /*conductance of source(or 0):set in setup*/ 89 double SOI3drainConductance; /*conductance of drain(or 0):set in setup*/ 90 double SOI3temp; /* operating temperature of this instance */ 91 double SOI3rt; /* Thermal resistance */ 92 double SOI3ct; /* Thermal capacitance */ 93 double SOI3rt1; /* 1st internal Thermal resistance */ 94 double SOI3ct1; /* 1st internal Thermal capacitance */ 95 double SOI3rt2; /* 2nd internal Thermal resistance */ 96 double SOI3ct2; /* 2nd internal Thermal capacitance */ 97 double SOI3rt3; /* 3rd internal Thermal resistance */ 98 double SOI3ct3; /* 3rd internal Thermal capacitance */ 99 double SOI3rt4; /* 4th internal Thermal resistance */ 100 double SOI3ct4; /* 4th internal Thermal capacitance */ 101 102 double SOI3tTransconductance; /* temperature corrected transconductance (KP param) */ 103 double SOI3ueff; /* passed on to noise model */ 104 double SOI3tSurfMob; /* temperature corrected surface mobility */ 105 double SOI3tPhi; /* temperature corrected Phi */ 106 double SOI3tVto; /* temperature corrected Vto */ 107 double SOI3tVfbF; /* temperature corrected Vfb */ 108 double SOI3tVfbB; /* temperature corrected Vfb (back gate) */ 109 double SOI3tSatCur; /* temperature corrected jnct saturation Cur. */ 110 double SOI3tSatCur1; /* temperature corrected jnct saturation Cur. */ 111 double SOI3tSatCurDens; /* temperature corrected jnct saturation Cur. density */ 112 double SOI3tSatCurDens1; /* temperature corrected jnct saturation Cur. density */ 113 double SOI3tCbd; /* temperature corrected B-D Capacitance */ 114 double SOI3tCbs; /* temperature corrected B-S Capacitance */ 115 double SOI3tCjsw; /* temperature corrected Bulk side Capacitance */ 116 double SOI3tBulkPot; /* temperature corrected Bulk potential */ 117 double SOI3tDepCap; /* temperature adjusted transition point in */ 118 /* the curve matching Fc * Vj */ 119 double SOI3tVbi; /* temperature adjusted Vbi diode built-in voltage */ 120 121 double SOI3icVBS; /* initial condition B-S voltage */ 122 double SOI3icVDS; /* initial condition D-S voltage */ 123 double SOI3icVGFS; /* initial condition GF-S voltage */ 124 double SOI3icVGBS; /* initial condition GB-S voltage */ 125 double SOI3von; 126 double SOI3vdsat; 127 double SOI3sourceVcrit; /* Vcrit for pos. vds */ 128 double SOI3drainVcrit; /* Vcrit for pos. vds */ 129 double SOI3id; /* DC drain current */ 130 double SOI3ibs; /* bulk source current */ 131 double SOI3ibd; /* bulk drain current */ 132 double SOI3iMdb; /* drain bulk impact ionisation current */ 133 double SOI3iMsb; /* source bulk impact ionisation cur. (rev mode) */ 134 double SOI3iPt; /* heat 'current' in thermal circuit */ 135 double SOI3gmbs; 136 double SOI3gmf; 137 double SOI3gmb; 138 double SOI3gds; 139 double SOI3gt; /* change of channel current wrt deltaT */ 140 double SOI3gdsnotherm; /* gds0 at elevated temp - ac use only) */ 141 double SOI3gMmbs; 142 double SOI3gMmf; 143 double SOI3gMmb; 144 double SOI3gMd; 145 double SOI3gMdeltaT; 146 double SOI3iBJTdb; 147 double SOI3gBJTdb_bs; 148 double SOI3gBJTdb_deltaT; 149 double SOI3iBJTsb; 150 double SOI3gBJTsb_bd; 151 double SOI3gBJTsb_deltaT; 152 double SOI3gPmf; /* change of Pt wrt vgfs */ 153 double SOI3gPmb; /* change of Pt wrt vgbs */ 154 double SOI3gPmbs; /* change of Pt wrt vbs */ 155 double SOI3gPds; /* change of Pt wrt vds */ 156 double SOI3gPdT; /* change of Pt wrt deltaT */ 157 double SOI3gbd; /* for body drain current */ 158 double SOI3gbdT; /* for body drain current */ 159 double SOI3gbs; /* for body source current */ 160 double SOI3gbsT; /* for body source current */ 161 double SOI3capbd; 162 double SOI3capbs; 163 double SOI3Cbd; 164 double SOI3Cbs; 165 double SOI3f2d; 166 double SOI3f3d; 167 double SOI3f4d; 168 double SOI3f2s; 169 double SOI3f3s; 170 double SOI3f4s; 171 double SOI3dDT_dVds; /* sm-sig gT term */ 172 double SOI3dId_dDT; /* sm-sig source term */ 173 /*debug stuff*/ 174 double SOI3debug1; 175 double SOI3debug2; 176 double SOI3debug3; 177 double SOI3debug4; 178 double SOI3debug5; 179 double SOI3debug6; 180 /* extra stuff for newer model - msll Jan96 */ 181 182 /* 183 * naming convention: 184 * x = vgs 185 * y = vbs 186 * z = vds 187 * cdr = cdrain 188 */ 189 int SOI3mode; /* device mode : 1 = normal, -1 = inverse */ 190 int SOI3backstate; /* indicates charge condition of back surface */ 191 int SOI3numThermalNodes; /* Number of thermal nodes required */ 192 193 unsigned SOI3off:1; /* non-zero to indicate device is off for dc analysis*/ 194 unsigned SOI3tempGiven :1; /* instance temperature specified */ 195 unsigned SOI3lGiven :1; 196 unsigned SOI3wGiven :1; 197 unsigned SOI3mGiven :1; 198 unsigned SOI3asGiven:1; 199 unsigned SOI3adGiven:1; 200 unsigned SOI3abGiven:1; 201 unsigned SOI3drainSquaresGiven :1; 202 unsigned SOI3sourceSquaresGiven :1; 203 unsigned SOI3dNodePrimeSet :1; 204 unsigned SOI3sNodePrimeSet :1; 205 unsigned SOI3icVBSGiven :1; 206 unsigned SOI3icVDSGiven :1; 207 unsigned SOI3icVGFSGiven:1; 208 unsigned SOI3icVGBSGiven:1; 209 unsigned SOI3rtGiven:1; 210 unsigned SOI3ctGiven:1; 211 unsigned SOI3rt1Given:1; 212 unsigned SOI3ct1Given:1; 213 unsigned SOI3rt2Given:1; 214 unsigned SOI3ct2Given:1; 215 unsigned SOI3rt3Given:1; 216 unsigned SOI3ct3Given:1; 217 unsigned SOI3rt4Given:1; 218 unsigned SOI3ct4Given:1; 219 unsigned SOI3vonGiven :1; 220 unsigned SOI3vdsatGiven :1; 221 unsigned SOI3modeGiven :1; 222 223 224 double *SOI3D_dPtr; /* pointer to sparse matrix element at 225 * (Drain node,drain node) */ 226 double *SOI3D_dpPtr; /* pointer to sparse matrix element at 227 * (drain node,drain prime node) */ 228 double *SOI3DP_dPtr; /* pointer to sparse matrix element at 229 * (drain prime node,drain node) */ 230 double *SOI3S_sPtr; /* pointer to sparse matrix element at 231 * (source node,source node) */ 232 double *SOI3S_spPtr; /* pointer to sparse matrix element at 233 * (source node,source prime node) */ 234 double *SOI3SP_sPtr; /* pointer to sparse matrix element at 235 * (source prime node,source node) */ 236 double *SOI3GF_gfPtr; /* pointer to sparse matrix element at 237 * (front gate node,front gate node) */ 238 double *SOI3GF_gbPtr; /* pointer to sparse matrix element at 239 * (front gate node,back gate node) */ 240 double *SOI3GF_dpPtr; /* pointer to sparse matrix element at 241 * (front gate node,drain prime node) */ 242 double *SOI3GF_spPtr; /* pointer to sparse matrix element at 243 * (front gate node,source prime node) */ 244 double *SOI3GF_bPtr; /* pointer to sparse matrix element at 245 * (front gate node,bulk node) */ 246 double *SOI3GB_gfPtr; /* pointer to sparse matrix element at 247 * (back gate node,front gate node) */ 248 double *SOI3GB_gbPtr; /* pointer to sparse matrix element at 249 * (back gate node,back gate node) */ 250 double *SOI3GB_dpPtr; /* pointer to sparse matrix element at 251 * (back gate node,drain prime node) */ 252 double *SOI3GB_spPtr; /* pointer to sparse matrix element at 253 * (back gate node,source prime node) */ 254 double *SOI3GB_bPtr; /* pointer to sparse matrix element at 255 * (back gate node,bulk node) */ 256 double *SOI3DP_gfPtr; /* pointer to sparse matrix element at 257 * (drain prime node,front gate node) */ 258 double *SOI3DP_gbPtr; /* pointer to sparse matrix element at 259 * (drain prime node,back gate node) */ 260 double *SOI3DP_dpPtr; /* pointer to sparse matrix element at 261 * (drain prime node,drain prime node) */ 262 double *SOI3DP_spPtr; /* pointer to sparse matrix element at 263 * (drain prime node,source prime node) */ 264 double *SOI3DP_bPtr; /* pointer to sparse matrix element at 265 * (drain prime node,bulk node) */ 266 double *SOI3SP_gfPtr; /* pointer to sparse matrix element at 267 * (source prime node,front gate node) */ 268 double *SOI3SP_gbPtr; /* pointer to sparse matrix element at 269 * (source prime node,back gate node) */ 270 double *SOI3SP_dpPtr; /* pointer to sparse matrix element at 271 * (source prime node,drain prime node) */ 272 double *SOI3SP_spPtr; /* pointer to sparse matrix element at 273 * (source prime node,source prime node) */ 274 double *SOI3SP_bPtr; /* pointer to sparse matrix element at 275 * (source prime node,bulk node) */ 276 double *SOI3B_gfPtr; /* pointer to sparse matrix element at 277 * (bulk node,front gate node) */ 278 double *SOI3B_gbPtr; /* pointer to sparse matrix element at 279 * (bulk node,back gate node) */ 280 double *SOI3B_dpPtr; /* pointer to sparse matrix element at 281 * (bulk node,drain prime node) */ 282 double *SOI3B_spPtr; /* pointer to sparse matrix element at 283 * (bulk node,source prime node) */ 284 double *SOI3B_bPtr; /* pointer to sparse matrix element at 285 * (bulk node,bulk node) */ 286 287 /** Now for Thermal Node **/ 288 289 double *SOI3TOUT_toutPtr; 290 double *SOI3TOUT_dpPtr; 291 double *SOI3TOUT_gfPtr; 292 double *SOI3TOUT_gbPtr; 293 double *SOI3TOUT_bPtr; 294 double *SOI3TOUT_spPtr; 295 296 double *SOI3GF_toutPtr; 297 double *SOI3GB_toutPtr; 298 double *SOI3DP_toutPtr; 299 double *SOI3SP_toutPtr; 300 301 double *SOI3TOUT_ibrPtr; /* these are for zero voltage source should */ 302 double *SOI3IBR_toutPtr; /* no thermal behaviour be specified */ 303 304 double *SOI3B_toutPtr; /* for impact ionisation current source */ 305 306 double *SOI3TOUT_tout1Ptr; 307 double *SOI3TOUT1_toutPtr; 308 double *SOI3TOUT1_tout1Ptr; 309 double *SOI3TOUT1_tout2Ptr; 310 double *SOI3TOUT2_tout1Ptr; 311 double *SOI3TOUT2_tout2Ptr; 312 double *SOI3TOUT2_tout3Ptr; 313 double *SOI3TOUT3_tout2Ptr; 314 double *SOI3TOUT3_tout3Ptr; 315 double *SOI3TOUT3_tout4Ptr; 316 double *SOI3TOUT4_tout3Ptr; 317 double *SOI3TOUT4_tout4Ptr; 318 319 #ifndef NONOISE 320 double SOI3nVar[NSTATVARS][SOI3NSRCS]; 321 #else /* NONOISE */ 322 double **SOI3nVar; 323 #endif /* NONOISE */ 324 325 } SOI3instance ; 326 327 #define SOI3vbd SOI3states+ 0 /* bulk-drain voltage */ 328 #define SOI3vbs SOI3states+ 1 /* bulk-source voltage */ 329 #define SOI3vgfs SOI3states+ 2 /* front gate-source voltage */ 330 #define SOI3vgbs SOI3states+ 3 /* back gate-source voltage */ 331 #define SOI3vds SOI3states+ 4 /* drain-source voltage */ 332 #define SOI3deltaT SOI3states+ 5 /* final temperature difference */ 333 334 #define SOI3qgf SOI3states + 6 /* front gate charge */ 335 #define SOI3iqgf SOI3states +7 /* front gate current */ 336 337 #define SOI3qgb SOI3states+ 8 /* back gate charge */ 338 #define SOI3iqgb SOI3states+ 9 /* back gate current */ 339 340 #define SOI3qd SOI3states+ 10 /* drain charge */ 341 #define SOI3iqd SOI3states+ 11 /* drain current */ 342 343 #define SOI3qs SOI3states+ 14 /* body charge */ 344 #define SOI3iqs SOI3states+ 15 /* body current */ 345 346 #define SOI3cgfgf SOI3states+ 16 347 #define SOI3cgfd SOI3states+ 17 348 #define SOI3cgfs SOI3states+ 18 349 #define SOI3cgfdeltaT SOI3states+ 19 350 #define SOI3cgfgb SOI3states+ 20 351 352 #define SOI3cdgf SOI3states+ 21 353 #define SOI3cdd SOI3states+ 22 354 #define SOI3cds SOI3states+ 23 355 #define SOI3cddeltaT SOI3states+ 24 356 #define SOI3cdgb SOI3states+ 25 357 358 #define SOI3csgf SOI3states+ 26 359 #define SOI3csd SOI3states+ 27 360 #define SOI3css SOI3states+ 28 361 #define SOI3csdeltaT SOI3states+ 29 362 #define SOI3csgb SOI3states+ 30 363 364 #define SOI3cgbgf SOI3states + 31 365 #define SOI3cgbd SOI3states + 32 366 #define SOI3cgbs SOI3states + 33 367 #define SOI3cgbdeltaT SOI3states+ 34 368 #define SOI3cgbgb SOI3states + 35 369 370 #define SOI3qbd SOI3states+ 36 /* body-drain capacitor charge */ 371 #define SOI3iqbd SOI3states+ 37 /* body-drain capacitor current */ 372 373 #define SOI3qbs SOI3states+ 38 /* body-source capacitor charge */ 374 #define SOI3iqbs SOI3states+ 39 /* body-source capacitor current */ 375 376 #define SOI3qt SOI3states+ 40 /* Energy or 'charge' associated with ct */ 377 #define SOI3iqt SOI3states+ 41 /* equiv current source for ct */ 378 #define SOI3qt1 SOI3states+ 42 /* Energy or 'charge' associated with ct */ 379 #define SOI3iqt1 SOI3states+ 43 /* equiv current source for ct */ 380 #define SOI3qt2 SOI3states+ 44 /* Energy or 'charge' associated with ct */ 381 #define SOI3iqt2 SOI3states+ 45 /* equiv current source for ct */ 382 #define SOI3qt3 SOI3states+ 46 /* Energy or 'charge' associated with ct */ 383 #define SOI3iqt3 SOI3states+ 47 /* equiv current source for ct */ 384 #define SOI3qt4 SOI3states+ 48 /* Energy or 'charge' associated with ct */ 385 #define SOI3iqt4 SOI3states+ 49 /* equiv current source for ct */ 386 387 #define SOI3qBJTbs SOI3states+ 50 388 #define SOI3iqBJTbs SOI3states+ 51 389 390 #define SOI3qBJTbd SOI3states+ 52 391 #define SOI3iqBJTbd SOI3states+ 53 392 393 #define SOI3cBJTbsbs SOI3states+ 54 394 #define SOI3cBJTbsdeltaT SOI3states+ 55 395 396 #define SOI3cBJTbdbd SOI3states+ 56 397 #define SOI3cBJTbddeltaT SOI3states+ 57 398 399 #define SOI3idrain SOI3states+ 58 /* final drain current at timepoint (no define) */ 400 401 #define SOI3deltaT1 SOI3states+ 59 /* final temperature difference */ 402 #define SOI3deltaT2 SOI3states+ 60 /* final temperature difference */ 403 #define SOI3deltaT3 SOI3states+ 61 /* final temperature difference */ 404 #define SOI3deltaT4 SOI3states+ 62 /* final temperature difference */ 405 #define SOI3deltaT5 SOI3states+ 63 /* final temperature difference */ 406 407 #define SOI3numStates 64 408 409 /* per model data */ 410 411 /* NOTE: parameters marked 'input - use xxxx' are paramters for 412 * which a temperature correction is applied in SOI3temp, thus 413 * the SOI3xxxx value in the per-instance structure should be used 414 * instead in all calculations 415 */ 416 417 418 typedef struct sSOI3model { /* model structure for an SOI3 MOSFET */ 419 420 struct GENmodel gen; 421 422 #define SOI3modType gen.GENmodType 423 #define SOI3nextModel(inst) ((struct sSOI3model *)((inst)->gen.GENnextModel)) 424 #define SOI3instances(inst) ((SOI3instance *)((inst)->gen.GENinstances)) 425 #define SOI3modName gen.GENmodName 426 427 int SOI3type; /* device type : 1 = nsoi, -1 = psoi */ 428 double SOI3tnom; /* temperature at which parameters measured */ 429 double SOI3latDiff; 430 double SOI3jctSatCurDensity; /* input - use tSatCurDens (jnct)*/ 431 double SOI3jctSatCurDensity1; /* input - use tSatCurDens1 (jnct)*/ 432 double SOI3jctSatCur; /* input - use tSatCur (jnct Is)*/ 433 double SOI3jctSatCur1; /* input - use tSatCur1 (jnct Is)*/ 434 double SOI3drainResistance; 435 double SOI3sourceResistance; 436 double SOI3sheetResistance; 437 double SOI3transconductance; /* (KP) input - use tTransconductance */ 438 double SOI3frontGateSourceOverlapCapFactor; 439 double SOI3frontGateDrainOverlapCapFactor; 440 double SOI3frontGateBulkOverlapCapFactor; 441 double SOI3backGateSourceOverlapCapAreaFactor; 442 double SOI3backGateDrainOverlapCapAreaFactor; 443 double SOI3backGateBulkOverlapCapAreaFactor; 444 double SOI3frontOxideCapFactor; /* Cof NO DEFINES */ 445 double SOI3backOxideCapFactor; /* Cob OR */ 446 double SOI3bodyCapFactor; /* Cb FLAGS */ 447 double SOI3C_bb; /* Cb in series with Cob */ 448 double SOI3C_fb; /* Cb in series with Cof */ 449 double SOI3C_ssf; /* q*NQFF */ 450 double SOI3C_ssb; /* q*NQFB */ 451 double SOI3C_fac; /* C_ob/(C_ob+C_b+C_ssb) */ 452 double SOI3vt0; /* input - use tVto */ 453 double SOI3vfbF; /* flat-band voltage. input - use tVfbF */ 454 double SOI3vfbB; /* back flat-band voltage. input - use tVfbB */ 455 double SOI3gamma; /* gamma */ 456 double SOI3gammaB; /* back gamma */ 457 double SOI3capBD; /* input - use tCbd */ 458 double SOI3capBS; /* input - use tCbs */ 459 double SOI3sideWallCapFactor; /* input - use tCjsw */ 460 double SOI3bulkJctPotential; /* input - use tBulkPot */ 461 double SOI3bulkJctSideGradingCoeff; /* MJSW */ 462 double SOI3fwdCapDepCoeff; /* FC */ 463 double SOI3phi; /* input - use tPhi */ 464 double SOI3vbi; /* input - use tVbi */ 465 double SOI3lambda; 466 double SOI3theta; 467 double SOI3substrateDoping; /* Nsub */ 468 double SOI3substrateCharge; /* Qb - no define/flag */ 469 int SOI3gateType; /* +1=same, -1=different, 0=Al */ 470 double SOI3frontFixedChargeDensity; 471 double SOI3backFixedChargeDensity; 472 double SOI3frontSurfaceStateDensity; 473 double SOI3backSurfaceStateDensity; 474 double SOI3frontOxideThickness; 475 double SOI3backOxideThickness; 476 double SOI3bodyThickness; 477 double SOI3surfaceMobility; /* input - use tSurfMob */ 478 double SOI3oxideThermalConductivity; 479 double SOI3siliconSpecificHeat; 480 double SOI3siliconDensity; 481 double SOI3fNcoef; 482 double SOI3fNexp; 483 /* new stuff for newer model - msll Jan96 */ 484 double SOI3sigma; /* DIBL factor */ 485 double SOI3chiFB; /* temperature coeff of flatband voltage */ 486 double SOI3chiPHI; /* temperature coeff of PHI */ 487 double SOI3deltaW; /* narrow width effect factor */ 488 double SOI3deltaL; /* short channel effect factor */ 489 double SOI3vsat; /* input - saturation velocity, use tVsat */ 490 double SOI3TVF0; /* internal use - precalculation of exp to save time */ 491 double SOI3k; /* thermal exponent for mobility factor */ 492 double SOI3lx; /* channel length modulation factor */ 493 double SOI3vp; /* channel length modulation empirical voltage */ 494 double SOI3eta; /* Imp. ion. field adjustment factor */ 495 double SOI3alpha0; /* 1st impact ionisation coeff */ 496 double SOI3beta0; /* 2nd impact ionisation coeff */ 497 double SOI3lm; /* impact ion. drain region length cf LX */ 498 double SOI3lm1; /* impact ion. drain region coeff */ 499 double SOI3lm2; /* impact ion. drain region coeff */ 500 double SOI3etad; /* diode ideality factor */ 501 double SOI3etad1; /* 2nd diode ideality factor */ 502 double SOI3chibeta; /* temp coeff of BETA0 */ 503 double SOI3chid; /* temp factor for junction 1 */ 504 double SOI3chid1; /* temp factor for junction 2 */ 505 int SOI3dvt; /* switch for temp dependence of vt in diodes */ 506 int SOI3nLev; /* level switch for noise model */ 507 double SOI3betaBJT; /* beta for Eber Moll BJT model */ 508 double SOI3tauFBJT; /* forward BJT transit time */ 509 double SOI3tauRBJT; /* reverse BJT transit time */ 510 double SOI3betaEXP; 511 double SOI3tauEXP; 512 double SOI3rsw; /* source resistance width scaling factor */ 513 double SOI3rdw; /* drain resistance width scaling factor */ 514 double SOI3minimumFeatureSize; /* minimum feature size of simulated process technology */ 515 double SOI3vtex; /* Extracted threshold voltage */ 516 double SOI3vdex; /* Drain bias at which vtex extracted */ 517 double SOI3delta0; /* Surface potential factor for vtex conversion */ 518 double SOI3satChargeShareFactor; /* Saturation region charge sharing factor */ 519 double SOI3nplusDoping; /* Doping concentration of N+ or P+ regions */ 520 double SOI3rta; /* thermal resistance area scaling factor */ 521 double SOI3cta; /* thermal capacitance area scaling factor */ 522 double SOI3mexp; /* exponent for CLM smoothing */ 523 524 unsigned SOI3typeGiven :1; 525 unsigned SOI3latDiffGiven :1; 526 unsigned SOI3jctSatCurDensityGiven :1; 527 unsigned SOI3jctSatCurDensity1Given :1; 528 unsigned SOI3jctSatCurGiven :1; 529 unsigned SOI3jctSatCur1Given :1; 530 unsigned SOI3drainResistanceGiven :1; 531 unsigned SOI3sourceResistanceGiven :1; 532 unsigned SOI3sheetResistanceGiven :1; 533 unsigned SOI3transconductanceGiven :1; 534 unsigned SOI3frontGateSourceOverlapCapFactorGiven :1; 535 unsigned SOI3frontGateDrainOverlapCapFactorGiven :1; 536 unsigned SOI3frontGateBulkOverlapCapFactorGiven :1; 537 unsigned SOI3backGateSourceOverlapCapAreaFactorGiven :1; 538 unsigned SOI3backGateDrainOverlapCapAreaFactorGiven :1; 539 unsigned SOI3backGateBulkOverlapCapAreaFactorGiven :1; 540 unsigned SOI3subsBiasFactorGiven :1; 541 unsigned SOI3bodyFactorGiven :1; 542 unsigned SOI3vt0Given :1; 543 unsigned SOI3vfbFGiven :1; 544 unsigned SOI3vfbBGiven :1; 545 unsigned SOI3gammaGiven :1; 546 unsigned SOI3gammaBGiven :1; 547 unsigned SOI3capBDGiven :1; 548 unsigned SOI3capBSGiven :1; 549 unsigned SOI3sideWallCapFactorGiven :1; 550 unsigned SOI3bulkJctPotentialGiven :1; 551 unsigned SOI3bulkJctSideGradingCoeffGiven :1; 552 unsigned SOI3fwdCapDepCoeffGiven :1; 553 unsigned SOI3phiGiven :1; 554 unsigned SOI3lambdaGiven :1; 555 unsigned SOI3thetaGiven :1; 556 unsigned SOI3substrateDopingGiven :1; 557 unsigned SOI3gateTypeGiven :1; 558 unsigned SOI3frontFixedChargeDensityGiven :1; 559 unsigned SOI3backFixedChargeDensityGiven :1; 560 unsigned SOI3frontSurfaceStateDensityGiven :1; 561 unsigned SOI3backSurfaceStateDensityGiven :1; 562 unsigned SOI3frontOxideThicknessGiven :1; 563 unsigned SOI3backOxideThicknessGiven :1; 564 unsigned SOI3bodyThicknessGiven :1; 565 unsigned SOI3surfaceMobilityGiven :1; 566 unsigned SOI3tnomGiven :1; 567 unsigned SOI3oxideThermalConductivityGiven :1; 568 unsigned SOI3siliconSpecificHeatGiven :1; 569 unsigned SOI3siliconDensityGiven :1; 570 unsigned SOI3fNcoefGiven :1; 571 unsigned SOI3fNexpGiven :1; 572 /* extra stuff for newer model - msll Jan96 */ 573 unsigned SOI3sigmaGiven :1; 574 unsigned SOI3chiFBGiven :1; 575 unsigned SOI3chiPHIGiven :1; 576 unsigned SOI3deltaWGiven :1; 577 unsigned SOI3deltaLGiven :1; 578 unsigned SOI3vsatGiven :1; 579 unsigned SOI3kGiven :1; 580 unsigned SOI3lxGiven :1; 581 unsigned SOI3vpGiven :1; 582 unsigned SOI3useLAMBDA :1; 583 unsigned SOI3etaGiven :1; 584 unsigned SOI3alpha0Given :1; 585 unsigned SOI3beta0Given :1; 586 unsigned SOI3lmGiven :1; 587 unsigned SOI3lm1Given :1; 588 unsigned SOI3lm2Given :1; 589 unsigned SOI3etadGiven :1; 590 unsigned SOI3etad1Given :1; 591 unsigned SOI3chibetaGiven :1; 592 unsigned SOI3chidGiven :1; 593 unsigned SOI3chid1Given :1; 594 unsigned SOI3dvtGiven :1; 595 unsigned SOI3nLevGiven :1; 596 unsigned SOI3betaBJTGiven :1; 597 unsigned SOI3tauFBJTGiven :1; 598 unsigned SOI3tauRBJTGiven :1; 599 unsigned SOI3betaEXPGiven :1; 600 unsigned SOI3tauEXPGiven :1; 601 unsigned SOI3rswGiven :1; 602 unsigned SOI3rdwGiven :1; 603 unsigned SOI3minimumFeatureSizeGiven :1; 604 unsigned SOI3vtexGiven :1; 605 unsigned SOI3vdexGiven :1; 606 unsigned SOI3delta0Given :1; 607 unsigned SOI3satChargeShareFactorGiven :1; 608 unsigned SOI3nplusDopingGiven :1; 609 unsigned SOI3rtaGiven :1; 610 unsigned SOI3ctaGiven :1; 611 unsigned SOI3mexpGiven :1; 612 613 } SOI3model; 614 615 #ifndef NSOI3 616 #define NSOI3 1 617 #define PSOI3 -1 618 #endif /*NSOI3*/ 619 620 /* device parameters */ 621 #define SOI3_W 1 622 #define SOI3_L 2 623 #define SOI3_M 25 624 enum { 625 SOI3_AS = 3, 626 SOI3_AD, 627 SOI3_AB, 628 SOI3_PS, 629 SOI3_PD, 630 SOI3_PB, 631 SOI3_NRS, 632 SOI3_NRD, 633 SOI3_OFF, 634 SOI3_IC, 635 SOI3_IC_VBS, 636 SOI3_IC_VDS, 637 SOI3_IC_VGFS, 638 SOI3_IC_VGBS, 639 SOI3_W_SENS, 640 SOI3_L_SENS, 641 SOI3_IB, 642 SOI3_IGF, 643 SOI3_IGB, 644 SOI3_IS, 645 SOI3_POWER, 646 SOI3_TEMP, 647 }; 648 649 /* model parameters */ 650 #define SOI3_MOD_VTO 101 651 #define SOI3_MOD_VFBF 149 652 enum { 653 SOI3_MOD_KP = 102, 654 SOI3_MOD_GAMMA, 655 SOI3_MOD_PHI, 656 SOI3_MOD_LAMBDA, 657 }; 658 659 #define SOI3_MOD_THETA 139 660 enum { 661 SOI3_MOD_RD = 106, 662 SOI3_MOD_RS, 663 SOI3_MOD_CBD, 664 SOI3_MOD_CBS, 665 SOI3_MOD_IS, 666 SOI3_MOD_PB, 667 SOI3_MOD_CGFSO, 668 SOI3_MOD_CGFDO, 669 SOI3_MOD_CGFBO, 670 }; 671 672 enum { 673 SOI3_MOD_CGBSO = 144, 674 SOI3_MOD_CGBDO, 675 SOI3_MOD_CGBBO, 676 }; 677 678 enum { 679 SOI3_MOD_CJ = 115, 680 SOI3_MOD_MJ, 681 SOI3_MOD_CJSW, 682 SOI3_MOD_MJSW, 683 SOI3_MOD_JS, 684 SOI3_MOD_TOF, 685 }; 686 687 #define SOI3_MOD_TOB 133 688 #define SOI3_MOD_TB 134 689 enum { 690 SOI3_MOD_LD = 121, 691 SOI3_MOD_RSH, 692 SOI3_MOD_U0, 693 SOI3_MOD_FC, 694 SOI3_MOD_NSUB, 695 SOI3_MOD_TPG, 696 }; 697 698 #define SOI3_MOD_NQFF 147 699 #define SOI3_MOD_NQFB 148 700 #define SOI3_MOD_NSSF 127 701 #define SOI3_MOD_NSSB 135 702 enum { 703 SOI3_MOD_NSOI3 = 128, 704 SOI3_MOD_PSOI3, 705 SOI3_MOD_TNOM, 706 SOI3_MOD_KF, 707 SOI3_MOD_AF, 708 }; 709 710 #define SOI3_MOD_KOX 142 711 #define SOI3_MOD_SHSI 143 712 /* extra stuff for newer model - msll Jan96 */ 713 enum { 714 SOI3_MOD_SIGMA = 150, 715 SOI3_MOD_CHIFB, 716 SOI3_MOD_CHIPHI, 717 SOI3_MOD_DELTAW, 718 SOI3_MOD_DELTAL, 719 SOI3_MOD_VSAT, 720 SOI3_MOD_K, 721 SOI3_MOD_LX, 722 SOI3_MOD_VP, 723 SOI3_MOD_ETA, 724 }; 725 726 #define SOI3_MOD_ALPHA0 140 727 #define SOI3_MOD_BETA0 141 728 enum { 729 SOI3_MOD_LM = 160, 730 SOI3_MOD_LM1, 731 SOI3_MOD_LM2, 732 SOI3_MOD_ETAD, 733 SOI3_MOD_ETAD1, 734 SOI3_MOD_IS1, 735 SOI3_MOD_JS1, 736 SOI3_MOD_CHIBETA, 737 SOI3_MOD_VFBB, 738 SOI3_MOD_GAMMAB, 739 SOI3_MOD_CHID, 740 SOI3_MOD_CHID1, 741 SOI3_MOD_DVT, 742 SOI3_MOD_NLEV, 743 SOI3_MOD_BETABJT, 744 }; 745 746 enum { 747 SOI3_MOD_TAUFBJT = 176, 748 SOI3_MOD_TAURBJT, 749 SOI3_MOD_BETAEXP, 750 SOI3_MOD_TAUEXP, 751 SOI3_MOD_RSW, 752 SOI3_MOD_RDW, 753 }; 754 755 enum { 756 SOI3_MOD_FMIN = 382, 757 SOI3_MOD_VTEX, 758 SOI3_MOD_VDEX, 759 SOI3_MOD_DELTA0, 760 SOI3_MOD_CSF, 761 SOI3_MOD_DSI, 762 SOI3_MOD_NPLUS, 763 SOI3_MOD_RTA, 764 SOI3_MOD_CTA, 765 SOI3_MOD_MEXP, 766 }; 767 768 /* device questions */ 769 enum { 770 SOI3_DNODE = 201, 771 SOI3_GFNODE, 772 SOI3_SNODE, 773 SOI3_GBNODE, 774 SOI3_BNODE, 775 SOI3_DNODEPRIME, 776 SOI3_SNODEPRIME, 777 SOI3_TNODE, 778 SOI3_BRANCH, 779 SOI3_SOURCECONDUCT, 780 SOI3_DRAINCONDUCT, 781 SOI3_VON, 782 SOI3_VFBF, 783 SOI3_VDSAT, 784 SOI3_SOURCEVCRIT, 785 SOI3_DRAINVCRIT, 786 SOI3_ID, 787 SOI3_IBS, 788 SOI3_IBD, 789 SOI3_GMBS, 790 SOI3_GMF, 791 SOI3_GMB, 792 SOI3_GDS, 793 SOI3_GBD, 794 SOI3_GBS, 795 SOI3_CAPBD, 796 SOI3_CAPBS, 797 SOI3_CAPZEROBIASBD, 798 SOI3_CAPZEROBIASBDSW, 799 SOI3_CAPZEROBIASBS, 800 SOI3_CAPZEROBIASBSSW, 801 SOI3_VBD, 802 SOI3_VBS, 803 SOI3_VGFS, 804 SOI3_VGBS, 805 SOI3_VDS, 806 SOI3_QGF, 807 SOI3_IQGF, 808 SOI3_QGB, 809 SOI3_IQGB, 810 SOI3_QD, 811 SOI3_IQD, 812 SOI3_QS, 813 SOI3_IQS, 814 SOI3_QBD, 815 SOI3_IQBD, 816 SOI3_QBS, 817 SOI3_IQBS, 818 SOI3_CGFGF, 819 SOI3_CGFD, 820 SOI3_CGFS, 821 SOI3_CGFDELTAT, 822 SOI3_CGFGB, 823 SOI3_CDGF, 824 SOI3_CDD, 825 SOI3_CDS, 826 SOI3_CDDELTAT, 827 SOI3_CDGB, 828 SOI3_CSGF, 829 SOI3_CSD, 830 SOI3_CSS, 831 SOI3_CSDELTAT, 832 SOI3_CSGB, 833 SOI3_CGBGF, 834 SOI3_CGBD, 835 SOI3_CGBS, 836 SOI3_CGBDELTAT, 837 SOI3_CGBGB, 838 SOI3_L_SENS_REAL, 839 SOI3_L_SENS_IMAG, 840 SOI3_L_SENS_MAG, 841 SOI3_L_SENS_PH, 842 SOI3_L_SENS_CPLX, 843 SOI3_W_SENS_REAL, 844 SOI3_W_SENS_IMAG, 845 SOI3_W_SENS_MAG, 846 SOI3_W_SENS_PH, 847 SOI3_W_SENS_CPLX, 848 SOI3_L_SENS_DC, 849 SOI3_W_SENS_DC, 850 SOI3_RT, 851 SOI3_CT, 852 SOI3_VFBB, 853 SOI3_RT1, 854 SOI3_CT1, 855 SOI3_RT2, 856 SOI3_CT2, 857 SOI3_RT3, 858 SOI3_CT3, 859 SOI3_RT4, 860 SOI3_CT4, 861 SOI3_ITOT, 862 }; 863 864 /* model questions */ 865 866 #include "soi3ext.h" 867 868 #endif /*SOI3*/ 869 870