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Searched defs:SPI0_CTL (Results 1 – 25 of 58) sorted by relevance

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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/drivers/spi/
H A Dbfin_spi.c97 # define SPI0_CTL SPI_CTL in spi_setup_slave() macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/drivers/spi/
H A Dbfin_spi.c97 # define SPI0_CTL SPI_CTL in spi_setup_slave() macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/drivers/spi/
H A Dbfin_spi.c97 # define SPI0_CTL SPI_CTL in spi_setup_slave() macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/drivers/spi/
H A Dbfin_spi.c97 # define SPI0_CTL SPI_CTL in spi_setup_slave() macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/drivers/spi/
H A Dbfin_spi.c97 # define SPI0_CTL SPI_CTL in spi_setup_slave() macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/drivers/spi/
H A Dbfin_spi.c97 # define SPI0_CTL SPI_CTL in spi_setup_slave() macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/drivers/spi/
H A Dbfin_spi.c97 # define SPI0_CTL SPI_CTL in spi_setup_slave() macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/spi/
H A Dbfin_spi.c106 # define SPI0_CTL SPI_CTL macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf518/
H A DBF512_def.h54 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/bfin/include/
H A DdefBF59x_base.h89 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
H A DdefBF535.h339 #define SPI0_CTL 0xFFC03000 /* SPI0 Control Register */ macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf506/
H A DBF504_def.h49 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf538/
H A DBF538_def.h75 #define SPI0_CTL 0xFFC00500 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/
H A DADSP-EDN-BF547-extended_def.h854 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
H A DADSP-EDN-BF542-extended_def.h1165 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/
H A DADSP-EDN-BF547-extended_def.h854 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
H A DADSP-EDN-BF542-extended_def.h1165 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/
H A DADSP-EDN-BF547-extended_def.h854 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
H A DADSP-EDN-BF542-extended_def.h1165 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/
H A DADSP-EDN-BF547-extended_def.h854 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/
H A DADSP-EDN-BF547-extended_def.h854 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
H A DADSP-EDN-BF542-extended_def.h1165 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/
H A DADSP-EDN-BF547-extended_def.h854 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf548/
H A DADSP-EDN-BF547-extended_def.h850 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/
H A DADSP-EDN-BF547-extended_def.h854 #define SPI0_CTL 0xFFC00500 /* SPI0 Control Register */ macro

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