Home
last modified time | relevance | path

Searched defs:SRL (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiAluCode.h35 SRL = 0x27, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h163 SRL, enumerator
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h707 SRL, enumerator
/freebsd/contrib/llvm-project/llvm/include/llvm/TableGen/
H A DRecord.h909 SRL, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp2747 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); in lowerLOAD() local
/freebsd/sys/dev/mrsas/
H A Dmrsas.h885 u_int8_t SRL; member
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp11190 SDValue SRL = DAG.getNode(X86ISD::VSRLI, DL, RotateVT, V1, in lowerShuffleAsBitRotate() local
29020 SDValue SRL = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ShiftVT, R, in LowerShiftByScalarImmediate() local
30077 SDValue SRL = DAG.getNode(IsROTL ? ISD::SRL : ISD::SHL, DL, VT, R, AmtR); in LowerRotate() local
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp14457 SDValue SRL = OR->getOperand(0); in PerformORCombineToSMULWBT() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp14255 SDValue SRL = Opc == ISD::SRL ? SDValue(N, 0) : N0; in reduceLoadWidth() local