| /minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 40 MCCodeEmitter *Emitter, const MCSubtargetInfo &STI) in MipsNaClELFStreamer()
94 const MCSubtargetInfo &STI) { in emitMask()
105 void sandboxIndirectJump(const MCInst &MI, const MCSubtargetInfo &STI) { in sandboxIndirectJump()
117 const MCSubtargetInfo &STI, bool MaskBefore, in sandboxLoadStoreStackChange()
139 const MCSubtargetInfo &STI) override { in EmitInstruction()
257 const MCSubtargetInfo &STI, in createMipsNaClELFStreamer()
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| H A D | MipsELFStreamer.cpp | 19 const MCSubtargetInfo &STI) { in EmitInstruction()
75 const MCSubtargetInfo &STI, in createMipsELFStreamer()
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| H A D | MipsELFStreamer.h | 37 MCCodeEmitter *Emitter, const MCSubtargetInfo &STI) in MipsELFStreamer()
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| H A D | MipsMCTargetDesc.cpp | 105 const MCSubtargetInfo &STI) { in createMipsMCInstPrinter()
112 const MCSubtargetInfo &STI, bool RelaxAll) { in createMCStreamer()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/R600/MCTargetDesc/ |
| H A D | AMDGPUMCCodeEmitter.h | 37 const MCSubtargetInfo &STI) const { in getMachineOpValue()
43 const MCSubtargetInfo &STI) const { in getSOPPBrEncoding()
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| H A D | AMDGPUMCTargetDesc.cpp | 71 const MCSubtargetInfo &STI) { in createAMDGPUMCInstPrinter()
77 const MCSubtargetInfo &STI, in createAMDGPUMCCodeEmitter()
89 const MCSubtargetInfo &STI, bool RelaxAll) { in createMCStreamer()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackend.h | 22 const MCSubtargetInfo *STI; variable
30 ~ARMAsmBackend() override { delete STI; } in ~ARMAsmBackend() local
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| H A D | ARMMCTargetDesc.cpp | 34 static bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, in getMCRDeprecationInfo()
66 static bool getITDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, in getITDeprecationInfo()
78 static bool getARMStoreDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, in getARMStoreDeprecationInfo()
95 static bool getARMLoadDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, in getARMLoadDeprecationInfo()
302 const MCSubtargetInfo &STI, bool RelaxAll) { in createMCStreamer()
326 const MCSubtargetInfo &STI) { in createARMMCInstPrinter()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 112 const MCSubtargetInfo &STI) in EmitCall()
122 const MCSubtargetInfo &STI) in EmitSETHI()
133 const MCSubtargetInfo &STI) in EmitBinary()
145 const MCSubtargetInfo &STI) { in EmitOR()
151 const MCSubtargetInfo &STI) { in EmitADD()
157 const MCSubtargetInfo &STI) { in EmitSHL()
167 const MCSubtargetInfo &STI) { in EmitHiLo()
176 const MCSubtargetInfo &STI) in LowerGETPCXAndEmitMCInsts()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsOptionRecord.h | 40 const MCSubtargetInfo &STI) in MipsRegInfoRecord()
64 const MCSubtargetInfo &STI; variable
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| /minix/sys/arch/i386/include/ |
| H A D | frameasm.h | 13 #define STI(reg) sti macro
23 #define STI(reg) movl CPUVAR(VCPU),reg ; \ macro
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.h | 26 AArch64Disassembler(const MCSubtargetInfo &STI, MCContext &Ctx) in AArch64Disassembler()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Sparc/InstPrinter/ |
| H A D | SparcInstPrinter.h | 25 const MCSubtargetInfo &STI; variable
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.h | 31 const AArch64Subtarget *STI; member
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| /minix/external/bsd/llvm/dist/llvm/tools/llvm-mc/ |
| H A D | Disassembler.cpp | 38 const MCSubtargetInfo &STI) { in PrintInsts()
135 MCSubtargetInfo &STI, in disassemble()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmInstrumentation.h | 59 const MCSubtargetInfo &STI; variable
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| /minix/external/bsd/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCDisassembler.h | 57 MCDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) in MCDisassembler()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 117 const MCSubtargetInfo &STI) { in createAArch64MCInstPrinter()
129 const MCSubtargetInfo &STI, bool RelaxAll) { in createMCStreamer()
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| /minix/external/bsd/llvm/dist/llvm/lib/MC/MCDisassembler/ |
| H A D | Disassembler.cpp | 59 const MCSubtargetInfo *STI = TheTarget->createMCSubtargetInfo(Triple, CPU, in LLVMCreateDisasmCPUFeatures() local
166 const MCSubtargetInfo *STI = DC->getSubtargetInfo(); in getItineraryLatency() local
185 const MCSubtargetInfo *STI = DC->getSubtargetInfo(); in getLatency() local
315 const MCSubtargetInfo *STI = DC->getSubtargetInfo(); in LLVMSetDisasmOptions() local
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCTargetDesc.cpp | 82 MCSubtargetInfo const &STI, bool RelaxAll) { in createMCStreamer()
103 const MCSubtargetInfo &STI) { in createHexagonMCInstPrinter()
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| /minix/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | LLVMTargetMachine.cpp | 174 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>(); in addPassesToEmitFile() local
256 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>(); in addPassesToEmitMC() local
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCTargetDesc.cpp | 180 const MCSubtargetInfo &STI) { in createSystemZMCInstPrinter()
188 const MCSubtargetInfo &STI, bool RelaxAll) { in createSystemZMCObjectStreamer()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 40 HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx) in HexagonDisassembler()
153 MCSubtargetInfo const &STI, in createHexagonDisassembler()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXFrameLowering.cpp | 29 NVPTXFrameLowering::NVPTXFrameLowering(NVPTXSubtarget &STI) in NVPTXFrameLowering()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCTargetDesc.cpp | 128 const MCSubtargetInfo &STI, bool RelaxAll) { in createMCStreamer()
151 const MCSubtargetInfo &STI) { in createSparcMCInstPrinter()
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