1-- Annotations for interpreted simulation 2-- Copyright (C) 2014 Tristan Gingold 3-- 4-- This program is free software: you can redistribute it and/or modify 5-- it under the terms of the GNU General Public License as published by 6-- the Free Software Foundation, either version 2 of the License, or 7-- (at your option) any later version. 8-- 9-- This program is distributed in the hope that it will be useful, 10-- but WITHOUT ANY WARRANTY; without even the implied warranty of 11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12-- GNU General Public License for more details. 13-- 14-- You should have received a copy of the GNU General Public License 15-- along with this program. If not, see <gnu.org/licenses>. 16 17with Types; use Types; 18with Vhdl.Nodes; use Vhdl.Nodes; 19 20package Vhdl.Annotations is 21 -- If True, annotate for synthesis. 22 Flag_Synthesis : Boolean := False; 23 24 type Object_Slot_Type is new Natural; 25 26 -- This slot is not used. 27 Invalid_Object_Slot : constant Object_Slot_Type := 0; 28 29 type Block_Instance_Id is new Natural; 30 No_Block_Instance_Id : constant Block_Instance_Id := 0; 31 32 -- For Kind_Extra: a number. Kind_Extra is not used by annotations, and 33 -- is free for another pass like preelab. 34 type Extra_Slot_Type is new Natural; 35 36 -- The annotation depends on the kind of the node. 37 type Sim_Info_Kind is 38 ( 39 Kind_Block, Kind_Process, Kind_Frame, Kind_Protected, Kind_Package, 40 Kind_Bit_Type, Kind_Log_Type, 41 Kind_E8_Type, Kind_E32_Type, Kind_I64_Type, Kind_F64_Type, 42 Kind_File_Type, 43 Kind_Type, 44 Kind_Object, Kind_Signal, 45 Kind_File, 46 Kind_Terminal, Kind_Quantity, 47 Kind_PSL, 48 Kind_Extra 49 ); 50 51 subtype Kind_Scalar_Types is Sim_Info_Kind range 52 Kind_Bit_Type .. 53 --Kind_Log_Type 54 --Kind_E8_Type 55 --Kind_E32_Type 56 --Kind_I64_Type 57 Kind_F64_Type; 58 59 subtype Kind_Discrete_Types is Sim_Info_Kind range 60 Kind_Bit_Type .. 61 --Kind_Log_Type 62 --Kind_E8_Type 63 --Kind_E32_Type 64 Kind_I64_Type; 65 66 subtype Kind_Enum_Types is Sim_Info_Kind range 67 Kind_Bit_Type .. 68 --Kind_Log_Type 69 --Kind_E8_Type 70 Kind_E32_Type; 71 72 type Instance_Slot_Type is new Integer; 73 Invalid_Instance_Slot : constant Instance_Slot_Type := -1; 74 75 type Sim_Info_Type (Kind : Sim_Info_Kind); 76 type Sim_Info_Acc is access all Sim_Info_Type; 77 78 -- Annotation for an iir node in order to be able to simulate it. 79 type Sim_Info_Type (Kind: Sim_Info_Kind) is record 80 -- Redundant, to be used only for debugging. 81 Ref : Iir; 82 83 case Kind is 84 when Kind_Block 85 | Kind_Frame 86 | Kind_Protected 87 | Kind_Process 88 | Kind_Package => 89 -- Number of objects/signals. 90 Nbr_Objects : Object_Slot_Type; 91 92 case Kind is 93 when Kind_Block => 94 -- Slot number in the parent (for blocks). 95 Inst_Slot : Instance_Slot_Type; 96 97 -- Number of children (blocks, generate, instantiation). 98 Nbr_Instances : Instance_Slot_Type; 99 100 when Kind_Package => 101 Pkg_Slot : Object_Slot_Type; 102 Pkg_Parent : Sim_Info_Acc; 103 104 when others => 105 null; 106 end case; 107 108 when Kind_Object 109 | Kind_Signal 110 | Kind_File 111 | Kind_Terminal 112 | Kind_Quantity 113 | Kind_PSL 114 | Kind_Type => 115 -- Block in which this object is declared in. 116 Obj_Scope : Sim_Info_Acc; 117 118 -- Variable index in the block. 119 Slot: Object_Slot_Type; 120 121 when Kind_Bit_Type 122 | Kind_Log_Type 123 | Kind_E8_Type 124 | Kind_E32_Type 125 | Kind_I64_Type 126 | Kind_F64_Type => 127 Width : Uns32; 128 129 when Kind_File_Type => 130 File_Signature : String_Acc; 131 132 when Kind_Extra => 133 Extra_Slot : Extra_Slot_Type; 134 end case; 135 end record; 136 137 -- The first initialization is done automatically, but must be done again 138 -- after finalization. 139 procedure Initialize_Annotate; 140 procedure Finalize_Annotate; 141 142 -- Decorate the tree in order to be usable with the internal simulator. 143 procedure Annotate (Unit : Iir_Design_Unit); 144 145 -- Disp annotations for an iir node. 146 procedure Disp_Vhdl_Info (Node : Iir); 147 procedure Disp_Tree_Info (Node : Iir); 148 149 Global_Info : Sim_Info_Acc; 150 151 -- Annotations are used to collect informations for elaboration and to 152 -- locate iir_value_literal for signals, variables or constants. 153 154 -- Get/Set annotation fied from/to an iir. 155 procedure Set_Info (Target : Iir; Info : Sim_Info_Acc); 156 pragma Inline (Set_Info); 157 function Get_Info (Target : Iir) return Sim_Info_Acc; 158 pragma Inline (Get_Info); 159 160 -- Expand the annotation table. This is automatically done by Annotate, 161 -- to be used only by debugger. 162 procedure Annotate_Expand_Table; 163end Vhdl.Annotations; 164