1 /** @file 2 Header file for GpioPrivateLib. 3 All function in this library is available for PEI, DXE, and SMM, 4 5 Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 **/ 8 #ifndef _GPIO_PRIVATE_LIB_H_ 9 #define _GPIO_PRIVATE_LIB_H_ 10 11 #include <Uefi/UefiBaseType.h> 12 #include <Library/GpioConfig.h> 13 #include <Library/PchPcrLib.h> 14 #include <TcssPeiConfig.h> 15 16 /** 17 GPIO Standby State configuration 18 Standby State options for GPIO Pads 19 **/ 20 typedef enum { 21 GpioIosStateDefault = 0x0, 22 GpioIosStateLatchLastValue = (0x0 << 1) | 0x01, ///< Latch last value driven on TX, TX Enable and RX Enable 23 GpioIosStateTx0Rx0RxDis = (0x1 << 1) | 0x01, ///< TX: 0, RX: 0 (internally), RX disabled 24 GpioIosStateTx0Rx1RxDis = (0x2 << 1) | 0x01, ///< TX: 0, RX: 1 (internally), RX disabled 25 GpioIosStateTx1Rx0RxDis = (0x3 << 1) | 0x01, ///< TX: 1, RX: 0 (internally), RX disabled 26 GpioIosStateTx1Rx1RxDis = (0x4 << 1) | 0x01, ///< TX: 1, RX: 1 (internally), RX disabled 27 GpioIosStateTx0RxEn = (0x5 << 1) | 0x01, ///< TX: 0, RX enabled 28 GpioIosStateTx1RxEn = (0x6 << 1) | 0x01, ///< TX: 1, RX enabled 29 GpioIosStateHizRx0 = (0x7 << 1) | 0x01, ///< Hi-Z, RX: 0 (internally) 30 GpioIosStateHizRx1 = (0x8 << 1) | 0x01, ///< Hi-Z, RX: 1 (internally) 31 GpioIosStateTxDisRxEn = (0x9 << 1) | 0x01, ///< TX Disabled and RX Enabled (i.e. wake or interrupt) 32 GpioIosStateMasked = (0xF << 1) | 0x01 ///< IO Standby signal is masked for this pad. In this mode, a pad operates as if IOStandby has not been asserted. 33 } GPIO_IOSTANDBY_STATE; 34 35 /** 36 GPIO Standby Term configuration 37 Standby Termination options for GPIO Pads 38 **/ 39 typedef enum { 40 GpioIosTermDefault = 0x00, 41 GpioIosTermSame = (0x00 << 1) | 0x01, ///< Same as state specified in Term 42 GpioIosTermPuDisPdDis = (0x01 << 1) | 0x01, ///< Disable Pullup and Pulldown 43 GpioIosTermPuDisPdEn = (0x02 << 1) | 0x01, ///< Enable Pulldown 44 GpioIosTermPuEnPdDis = (0x03 << 1) | 0x01 ///< Enable Pullup 45 } GPIO_IOSTANDBY_TERM; 46 47 // 48 // Structure for native pin data 49 // 50 typedef struct { 51 GPIO_PAD Pad; 52 GPIO_PAD_MODE Mode; 53 GPIO_IOSTANDBY_STATE IosState; 54 GPIO_IOSTANDBY_TERM IosTerm; 55 } GPIO_PAD_NATIVE_FUNCTION; 56 57 // 58 // Structure for Serial GPIO pin definition 59 // 60 typedef struct { 61 GPIO_PAD_NATIVE_FUNCTION Sclock; 62 GPIO_PAD_NATIVE_FUNCTION Sload; 63 GPIO_PAD_NATIVE_FUNCTION Sdataout; 64 } SGPIO_PINS; 65 66 // 67 // Structure for USB Virtual Wire OverCurrent Pad Mode group 68 // 69 typedef struct { 70 GPIO_PAD OcRxPad; 71 GPIO_PAD OcTxPad; 72 } GPIO_VWOC_FUNCTION; 73 74 // 75 // Below defines are based on GPIO_CONFIG structure fields 76 // 77 #define B_GPIO_PAD_MODE_MASK 0xF 78 #define N_GPIO_PAD_MODE_BIT_POS 0 79 #define B_GPIO_HOSTSW_OWN_MASK 0x3 80 #define N_GPIO_HOSTSW_OWN_BIT_POS 0 81 #define B_GPIO_DIRECTION_MASK 0x1F 82 #define B_GPIO_DIRECTION_DIR_MASK 0x7 83 #define N_GPIO_DIRECTION_DIR_BIT_POS 0 84 #define B_GPIO_DIRECTION_INV_MASK 0x18 85 #define N_GPIO_DIRECTION_INV_BIT_POS 3 86 #define B_GPIO_OUTPUT_MASK 0x3 87 #define N_GPIO_OUTPUT_BIT_POS 0 88 #define N_GPIO_INT_CONFIG_INT_SOURCE_BIT_POS 0 89 #define N_GPIO_INT_CONFIG_INT_TYPE_BIT_POS 5 90 #define B_GPIO_RESET_CONFIG_RESET_MASK 0x3F 91 #define N_GPIO_RESET_CONFIG_OLD_RESET_TYPE BIT1 92 #define B_GPIO_RESET_CONFIG_OLD_RESET_MASK 0xF 93 #define N_GPIO_RESET_CONFIG_RESET_BIT_POS 0 94 #define B_GPIO_RESET_CONFIG_GPD_RESET_MASK (BIT5 | BIT4) 95 #define B_GPIO_RESET_CONFIG_GPP_RESET_MASK (BIT3 | BIT2) 96 #define N_GPIO_ELECTRICAL_CONFIG_TERMINATION_BIT_POS 0 97 #define N_GPIO_OTHER_CONFIG_RXRAW_BIT_POS 0 98 #define B_GPIO_GPIO_IOSTANDBY_STATE_MASK ((0xF << 1) | 0x01) 99 #define B_GPIO_GPIO_IOSTANDBY_STATE_POS 0 100 #define B_GPIO_GPIO_IOSTANDBY_TERM_MASK ((0x2 << 1) | 0x01) 101 #define B_GPIO_GPIO_IOSTANDBY_TERM_POS 0 102 103 // 104 // Structure for storing information about registers offset, community, 105 // maximal pad number for available groups 106 // 107 typedef struct { 108 PCH_SBI_PID Community; 109 UINT16 PadOwnOffset; 110 UINT16 HostOwnOffset; 111 UINT16 GpiIsOffset; 112 UINT16 GpiIeOffset; 113 UINT16 GpiGpeStsOffset; 114 UINT16 GpiGpeEnOffset; 115 UINT16 SmiStsOffset; 116 UINT16 SmiEnOffset; 117 UINT16 NmiStsOffset; 118 UINT16 NmiEnOffset; 119 UINT16 PadCfgLockOffset; 120 UINT16 PadCfgLockTxOffset; 121 UINT16 PadCfgOffset; 122 UINT16 PadPerGroup; 123 } GPIO_GROUP_INFO; 124 125 // 126 // If in GPIO_GROUP_INFO structure certain register doesn't exist 127 // it will have value equal to NO_REGISTER_FOR_PROPERTY 128 // 129 #define NO_REGISTER_FOR_PROPERTY 0xFFFF 130 131 #define GPIO_PAD_DEF(Group,Pad) (UINT32)(((Group) << 16) + (Pad)) 132 #define GPIO_GROUP_DEF(GroupIndex,ChipsetId) ((GroupIndex) | ((ChipsetId) << 8)) 133 #define GPIO_GET_GROUP_INDEX(Group) ((Group) & 0x1F) 134 #define GPIO_GET_GROUP_FROM_PAD(GpioPad) (((GpioPad) & 0x0F1F0000) >> 16) 135 #define GPIO_GET_GROUP_INDEX_FROM_PAD(GpioPad) GPIO_GET_GROUP_INDEX (GPIO_GET_GROUP_FROM_PAD(GpioPad)) 136 #define GPIO_GET_PAD_NUMBER(GpioPad) ((GpioPad) & 0x1FF) 137 #define GPIO_GET_CHIPSET_ID(GpioPad) (((GpioPad) >> 24) & 0xF) 138 139 #define GPIO_GET_PAD_POSITION(PadNumber) ((PadNumber) % 32) 140 #define GPIO_GET_DW_NUM(PadNumber) ((PadNumber) / 32u) 141 142 /** 143 This procedure will retrieve address and length of GPIO info table 144 145 @param[out] GpioGroupInfoTableLength Length of GPIO group table 146 147 @retval Pointer to GPIO group table 148 **/ 149 CONST GPIO_GROUP_INFO* 150 GpioGetGroupInfoTable ( 151 OUT UINT32 *GpioGroupInfoTableLength 152 ); 153 154 typedef struct { 155 CONST CHAR8* GpioGroupPrefix; 156 CONST GPIO_PAD FirstUniqueGpio; 157 CONST CHAR8** GroupUniqueNames; 158 CONST UINT32 UniqueNamesTableSize; 159 } GPIO_GROUP_NAME_INFO; 160 161 // 162 // Helper macros for initializing GPIO_GROUP_NAME_INFO structures 163 // 164 #define GPIO_GROUP_NAME(GroupName,FirstUniqueGpio,GroupUniqueNamesTable) \ 165 {GroupName, FirstUniqueGpio, GroupUniqueNamesTable, ARRAY_SIZE (GroupUniqueNamesTable)} 166 167 #define GPIO_GROUP_NAME_BASIC(GroupName) \ 168 {GroupName, 0, NULL, 0} 169 170 /** 171 Returns GPIO_GROUP_NAME_INFO corresponding to the give GpioPad 172 173 @param[in] GroupIndex Group index 174 175 @retval GPIO_GROUP_NAME_INFO* Pointer to the GPIO_GROUP_NAME_INFO 176 @retval NULL If no group descriptor was found 177 **/ 178 CONST 179 GPIO_GROUP_NAME_INFO* 180 GpioGetGroupNameInfo ( 181 IN UINT32 GroupIndex 182 ); 183 184 /** 185 Get GPIO Chipset ID specific to PCH generation and series 186 **/ 187 UINT32 188 GpioGetThisChipsetId ( 189 VOID 190 ); 191 192 /** 193 This procedure is used to check if GpioPad is valid for certain chipset 194 195 @param[in] GpioPad GPIO pad 196 197 @retval TRUE This pin is valid on this chipset 198 FALSE Incorrect pin 199 **/ 200 BOOLEAN 201 GpioIsCorrectPadForThisChipset ( 202 IN GPIO_PAD GpioPad 203 ); 204 205 /** 206 Generates GPIO name from GpioPad 207 This function returns pointer to the static buffer. 208 209 @param[in] GpioPad GpioPad 210 211 @retval CHAR8* Pointer to the GPIO name 212 **/ 213 CHAR8* 214 GpioName ( 215 IN GPIO_PAD GpioPad 216 ); 217 218 /** 219 Generates GPIO name from GpioNativePad 220 This function returns pointer to the static buffer. 221 222 @param[in] GpioNativePad GpioNativePad 223 224 @retval CHAR8* Pointer to the GPIO name 225 **/ 226 CHAR8* 227 GpioPinMuxName ( 228 IN GPIO_NATIVE_PAD GpioNativePad 229 ); 230 231 /** 232 Generates GPIO Pad Termination string 233 This function returns pointer to the static buffer. 234 235 @param[in] GpioPadTermination GPIO Pad Termination 236 237 @retval CHAR8* Painter to the pad termianation string 238 **/ 239 CHAR8* 240 GpioGetPadTerminationString ( 241 IN GPIO_ELECTRICAL_CONFIG PadTermination 242 ); 243 244 /** 245 This procedure will get value of selected gpio register 246 247 @param[in] Group GPIO group number 248 @param[in] Offset GPIO register offset 249 @param[out] RegVal Value of gpio register 250 251 @retval EFI_SUCCESS The function completed successfully 252 @retval EFI_INVALID_PARAMETER Invalid group or pad number 253 **/ 254 EFI_STATUS 255 GpioGetReg ( 256 IN GPIO_GROUP Group, 257 IN UINT32 Offset, 258 OUT UINT32 *RegVal 259 ); 260 261 /** 262 This procedure will set value of selected gpio register 263 264 @param[in] Group GPIO group number 265 @param[in] Offset GPIO register offset 266 @param[in] RegVal Value of gpio register 267 268 @retval EFI_SUCCESS The function completed successfully 269 @retval EFI_INVALID_PARAMETER Invalid group or pad number 270 **/ 271 EFI_STATUS 272 GpioSetReg ( 273 IN GPIO_GROUP Group, 274 IN UINT32 Offset, 275 IN UINT32 RegVal 276 ); 277 278 /** 279 This procedure is used by PchSmiDispatcher and will return information 280 needed to register GPI SMI. 281 282 @param[in] Index GPI SMI number 283 @param[out] GpioPin GPIO pin 284 @param[out] GpiSmiBitOffset GPI SMI bit position within GpiSmi Registers 285 @param[out] GpiHostSwOwnRegAddress Address of HOSTSW_OWN register 286 @param[out] GpiSmiStsRegAddress Address of GPI SMI status register 287 288 @retval EFI_SUCCESS The function completed successfully 289 @retval EFI_INVALID_PARAMETER Invalid group or pad number 290 **/ 291 EFI_STATUS 292 GpioGetPadAndSmiRegs ( 293 IN UINT32 Index, 294 OUT GPIO_PAD *GpioPin, 295 OUT UINT8 *GpiSmiBitOffset, 296 OUT UINT32 *GpiHostSwOwnRegAddress, 297 OUT UINT32 *GpiSmiStsRegAddress 298 ); 299 300 /** 301 This procedure will set GPIO Driver IRQ number 302 303 @param[in] Irq Irq number 304 305 @retval EFI_SUCCESS The function completed successfully 306 @retval EFI_INVALID_PARAMETER Invalid IRQ number 307 **/ 308 EFI_STATUS 309 GpioSetIrq ( 310 IN UINT8 Irq 311 ); 312 313 /** 314 This function provides GPIO Community PortIDs 315 316 @param[out] NativePinsTable Table with GPIO COMMx SBI PortIDs 317 318 @retval Number of communities 319 **/ 320 UINT32 321 GpioGetComSbiPortIds ( 322 OUT PCH_SBI_PID **GpioComSbiIds 323 ); 324 325 /** 326 This function provides list of GPIO for which IO Standby State configuration 327 has to be set as 'Masked' 328 329 @param[out] GpioPadsList Table with pads 330 331 @retval Number of pads 332 **/ 333 UINT32 334 GpioGetIoStandbyStateConfigurationPadsList ( 335 OUT GPIO_PAD_NATIVE_FUNCTION **GpioPadsList 336 ); 337 338 339 /** 340 This procedure will perform special handling of GPP_A_12. 341 342 @param[in] None 343 344 @retval None 345 **/ 346 VOID 347 GpioA12SpecialHandling ( 348 VOID 349 ); 350 351 // 352 // Structure which stores information needed to map GPIO Group 353 // to 1-Tier GPE. Configuration is needed both in PMC and GPIO IP. 354 // Because GPE_DWx can handle only 32 pins only single double word can 355 // be mapped at a time. Each DW for a group has different configuration in PMC and GPIO 356 // 357 typedef struct { 358 GPIO_GROUP Group; 359 UINT8 GroupDw; 360 UINT8 PmcGpeDwxVal; 361 } GPIO_GROUP_TO_GPE_MAPPING; 362 363 /** 364 Get information for GPIO Group required to program GPIO and PMC for desired 1-Tier GPE mapping 365 366 @param[out] GpioGroupToGpeMapping Table with GPIO Group to GPE mapping 367 @param[out] GpioGroupToGpeMappingLength GPIO Group to GPE mapping table length 368 **/ 369 VOID 370 GpioGetGroupToGpeMapping ( 371 OUT GPIO_GROUP_TO_GPE_MAPPING **GpioGroupToGpeMapping, 372 OUT UINT32 *GpioGroupToGpeMappingLength 373 ); 374 375 /** 376 This procedure will return Port ID of GPIO Community from GpioPad 377 378 @param[in] GpioPad GpioPad 379 380 @retval GpioCommunityPortId Port ID of GPIO Community 381 **/ 382 UINT8 383 GpioGetGpioCommunityPortIdFromGpioPad ( 384 IN GPIO_PAD GpioPad 385 ); 386 387 /** 388 This procedure will return PadCfg address from GpioPad 389 390 @param[in] GpioPad GpioPad 391 392 @retval GpioPadCfgAddress PadCfg Address of GpioPad 393 **/ 394 UINT32 395 GpioGetGpioPadCfgAddressFromGpioPad ( 396 IN GPIO_PAD GpioPad 397 ); 398 399 /** 400 This procedure is used to unlock all GPIO pads. 401 This function can only be called when platform is still in HOSTIA_BOOT_SAI. 402 **/ 403 VOID 404 GpioUnlockAllPads ( 405 VOID 406 ); 407 408 /** 409 This procedure will check if GpioPad is owned by host. 410 411 @param[in] GpioPad GPIO pad 412 413 @retval TRUE GPIO pad is owned by host 414 @retval FALSE GPIO pad is not owned by host and should not be used with GPIO lib API 415 **/ 416 BOOLEAN 417 GpioIsPadHostOwned ( 418 IN GPIO_PAD GpioPad 419 ); 420 421 422 /** 423 This procedure will check if GpioPad argument is valid. 424 Function will check below conditions: 425 - GpioPad represents a pad for current PCH 426 - GpioPad belongs to valid GpioGroup 427 - GPIO PadNumber is not greater than number of pads for this group 428 429 @param[in] GpioPad GPIO pad 430 431 @retval TRUE GPIO pad is valid and can be used with GPIO lib API 432 @retval FALSE GPIO pad is invalid and cannot be used with GPIO lib API 433 **/ 434 BOOLEAN 435 GpioIsPadValid ( 436 IN GPIO_PAD GpioPad 437 ); 438 439 /** 440 This procedure will read GPIO Pad Configuration register 441 442 @param[in] GpioPad GPIO pad 443 @param[in] DwReg Choose PADCFG register: 0:DW0, 1:DW1 444 445 @retval PadCfgRegValue PADCFG_DWx value 446 **/ 447 UINT32 448 GpioReadPadCfgReg ( 449 IN GPIO_PAD GpioPad, 450 IN UINT8 DwReg 451 ); 452 453 /** 454 This procedure will write or read GPIO Pad Configuration register 455 456 @param[in] GpioPad GPIO pad 457 @param[in] DwReg Choose PADCFG register: 0:DW0, 1:DW1 458 @param[in] PadCfgAndMask Mask to be AND'ed with PADCFG reg value 459 @param[in] PadCfgOrMask Mask to be OR'ed with PADCFG reg value 460 461 @retval none 462 **/ 463 VOID 464 GpioWritePadCfgReg ( 465 IN GPIO_PAD GpioPad, 466 IN UINT8 DwReg, 467 IN UINT32 PadCfgAndMask, 468 IN UINT32 PadCfgOrMask 469 ); 470 471 /** 472 This procedure will Enable USB Virtual Wire Overcurrent pin 473 474 @param[in] GpioPad GPIO Pad 475 476 @retval EFI_SUCCESS 477 **/ 478 EFI_STATUS 479 GpioSetVwOverCurrentPin ( 480 IN GPIO_VWOC_FUNCTION GpioPad 481 ); 482 483 /** 484 This procedure will set Native Function IOSF-SB Virtual Wire Message Generation bit 485 in DW0 of requested GPIO Pad 486 487 @param[in] GPIO_PAD GpioPad 488 **/ 489 VOID 490 GpioSetNafVweBit ( 491 IN CONST GPIO_PAD PadCfg 492 ); 493 494 /** 495 This procedure will set GPIO mode 496 497 @param[in] GpioPad GPIO pad 498 @param[in] PadModeValue GPIO pad mode value 499 500 @retval EFI_SUCCESS The function completed successfully 501 @retval EFI_INVALID_PARAMETER Invalid group or pad number 502 **/ 503 EFI_STATUS 504 GpioSetPadMode ( 505 IN GPIO_PAD GpioPad, 506 IN GPIO_PAD_MODE PadModeValue 507 ); 508 509 /** 510 This procedure will set GPIO pad to native mode. 511 To be used if no other settings are to be configured when enabling native mode. 512 513 @param[in] GpioNativePad GPIO Pad with native mode information 514 515 @retval EFI_SUCCESS The function completed successfully 516 @retval EFI_INVALID_PARAMETER Invalid group or pad number 517 **/ 518 EFI_STATUS 519 GpioSetNativePad ( 520 IN GPIO_NATIVE_PAD GpioNativePad 521 ); 522 523 /** 524 This procedure will set GPIO pad to native function based on provided native function 525 and platform muxing selection (if needed). 526 527 @param[in] PadFunction PadMode for a specific native signal. Please refer to GpioNativePads.h 528 @param[in] PinMux GPIO Native pin mux platform config. 529 This argument is optional and needs to be 530 provided only if feature can be enabled 531 on multiple pads 532 533 @retval EFI_SUCCESS The function completed successfully 534 @retval EFI_INVALID_PARAMETER Invalid group or pad number 535 **/ 536 EFI_STATUS 537 GpioSetNativePadByFunction ( 538 IN UINT32 PadFunction, 539 IN UINT32 PinMux 540 ); 541 542 /** 543 This procedure will get GPIO mode 544 545 @param[in] GpioPad GPIO pad 546 @param[out] PadModeValue GPIO pad mode value 547 548 @retval EFI_SUCCESS The function completed successfully 549 @retval EFI_INVALID_PARAMETER Invalid group or pad number 550 **/ 551 EFI_STATUS 552 GpioGetPadMode ( 553 IN GPIO_PAD GpioPad, 554 OUT GPIO_PAD_MODE *PadModeValue 555 ); 556 557 /** 558 This procedure will check if group is within DeepSleepWell. 559 560 @param[in] Group GPIO Group 561 562 @retval GroupWell TRUE: This is DSW Group 563 FALSE: This is not DSW Group 564 **/ 565 BOOLEAN 566 GpioIsDswGroup ( 567 IN GPIO_GROUP Group 568 ); 569 570 /** 571 The function performs GPIO Power Management programming. 572 **/ 573 VOID 574 GpioConfigurePm ( 575 VOID 576 ); 577 578 /** 579 This function performs initial IO Standby State related configurations 580 **/ 581 VOID 582 GpioConfigureIoStandbyState ( 583 VOID 584 ); 585 586 /** 587 This function enables SCS SD Card controller card detect pin 588 589 @param[in] none 590 591 @retval Status 592 **/ 593 EFI_STATUS 594 GpioEnableScsSdCardDetect ( 595 VOID 596 ); 597 598 /** 599 This function sets HDA SSP interface pins into native mode 600 601 @param[in] SspInterfaceNumber SSPx interface number 602 603 @retval Status 604 **/ 605 EFI_STATUS 606 GpioEnableHdaSsp ( 607 IN UINT32 SspInterfaceNumber 608 ); 609 610 /** 611 This function sets HDA SSP Master Clock into native mode 612 613 @param[in] MclkIndex MCLK index 614 615 @retval Status 616 **/ 617 EFI_STATUS 618 GpioEnableHdaSspMasterClock ( 619 IN UINT32 MclkIndex 620 ); 621 622 /** 623 This function sets HDA SoundWire interface pins into native mode 624 625 @param[in] SndwInterfaceNumber SNDWx interface number 626 627 @retval Status 628 **/ 629 EFI_STATUS 630 GpioEnableHdaSndw ( 631 IN UINT32 SndwInterfaceNumber 632 ); 633 634 /** 635 This function provides SPI IO pin for Touch Host Controller 636 637 @param[in] SpiIndex SPI1 or SPI2 - 0 or 1 638 @param[in] IoIndex IoIndex Valid from 0 (SPI_IO_0) to 3 (SPI_IO_3) 639 640 @retval NativePin Native Pin Configuration, 0 if SpiIndex or IoIndex is invalid 641 **/ 642 GPIO_PAD_NATIVE_FUNCTION 643 GpioGetThcSpiIo ( 644 IN UINT32 SpiIndex, 645 IN UINT32 IoIndex 646 ); 647 648 /** 649 This function provides SPI ChipSelect pin for Touch Host Controller 650 651 @param[in] SpiIndex SPI1 or SPI2 - 0 or 1 652 653 @retval NativePin Native Pin Configuration, 0 if SpiIndex is invalid 654 **/ 655 GPIO_PAD_NATIVE_FUNCTION 656 GpioGetThcSpiCs ( 657 IN UINT32 SpiIndex 658 ); 659 660 /** 661 This function provides SPI Clock pin for Touch Host Controller 662 663 @param[in] SpiIndex SPI1 or SPI2 - 0 or 1 664 665 @retval NativePin Native Pin Configuration, 0 if SpiIndex is invalid 666 **/ 667 GPIO_PAD_NATIVE_FUNCTION 668 GpioGetThcSpiClk ( 669 IN UINT32 SpiIndex 670 ); 671 672 /** 673 This function provides SPI Reset pin for Touch Host Controller 674 675 @param[in] SpiIndex SPI1 or SPI2 - 0 or 1 676 677 @retval NativePin Native Pin Configuration, 0 if SpiIndex is invalid 678 **/ 679 GPIO_PAD_NATIVE_FUNCTION 680 GpioGetThcSpiReset ( 681 IN UINT32 SpiIndex 682 ); 683 684 /** 685 This function sets SMBUS controller pins into native mode 686 687 @param[in] none 688 689 @retval Status 690 **/ 691 EFI_STATUS 692 GpioEnableSmbus ( 693 VOID 694 ); 695 696 /** 697 This function sets SMBUS ALERT pins into native mode 698 699 @param[in] none 700 701 @retval Status 702 **/ 703 EFI_STATUS 704 GpioEnableSmbusAlert ( 705 VOID 706 ); 707 708 /** 709 This function provides Serial GPIO pins 710 711 @param[in] SataCtrlIndex SATA controller index 712 @param[out] SgpioPins SATA Serial GPIO pins 713 **/ 714 VOID 715 GpioGetSataSgpioPins ( 716 IN UINT32 SataCtrlIndex, 717 OUT SGPIO_PINS *SgpioPins 718 ); 719 720 /** 721 This function sets Serial GPIO pins into native mode 722 723 @param[in] SataCtrlIndex SATA controller index 724 @param[in] SataPort SATA port number 725 726 @retval Status 727 **/ 728 EFI_STATUS 729 GpioEnableSataSgpio ( 730 IN UINT32 SataCtrlIndex 731 ); 732 733 /** 734 This function enables USB OverCurrent pins by setting 735 USB2 OCB pins into native mode 736 737 @param[in] OcPinNumber USB OC pin number 738 739 @retval Status 740 **/ 741 EFI_STATUS 742 GpioEnableUsbOverCurrent ( 743 IN UINTN OcPinNumber 744 ); 745 746 /** 747 This function enables USB Virtual Wire OverCurrent pins by OcPinNumber. 748 749 @param[in] OcPinNumber USB OC pin number 750 751 @retval Status 752 **/ 753 EFI_STATUS 754 GpioEnableUsbVwOverCurrent ( 755 IN UINTN OcPinNumber 756 ); 757 758 /** 759 This function sets SATA DevSlp pins into native mode 760 761 @param[in] SataCtrlIndex SATA controller index 762 @param[in] SataPort SATA port number 763 @param[in] ResetType GPIO reset type (see GPIO_RESET_CONFIG in GpioConfig.h) 764 765 @retval Status 766 **/ 767 EFI_STATUS 768 GpioEnableSataDevSlpPin ( 769 IN UINT32 SataCtrlIndex, 770 IN UINTN SataPort, 771 IN UINT32 ResetType 772 ); 773 774 /** 775 This function checks if SataDevSlp pin is in native mode 776 777 @param[in] SataCtrlIndex SATA controller index 778 @param[in] SataPort SATA port 779 @param[out] DevSlpPad DevSlpPad 780 This is an optional parameter and may be NULL. 781 782 @retval TRUE DevSlp is in native mode 783 FALSE DevSlp is not in native mode 784 **/ 785 BOOLEAN 786 GpioIsSataDevSlpPinEnabled ( 787 IN UINT32 SataCtrlIndex, 788 IN UINTN SataPort, 789 OUT GPIO_PAD *DevSlpPad OPTIONAL 790 ); 791 792 /** 793 This function sets SATAGPx pin into native mode 794 795 @param[in] SataCtrlIndex SATA controller index 796 @param[in] SataPort SATA port number 797 798 @retval Status 799 **/ 800 EFI_STATUS 801 GpioEnableSataGpPin ( 802 IN UINT32 SataCtrlIndex, 803 IN UINTN SataPort 804 ); 805 806 /** 807 This function provides SATA GP pin data 808 809 @param[in] SataCtrlIndex SATA controller index 810 @param[in] SataPort SATA port number 811 @param[out] NativePin SATA GP pin 812 **/ 813 VOID 814 GpioGetSataGpPin ( 815 IN UINT32 SataCtrlIndex, 816 IN UINTN SataPort, 817 OUT GPIO_PAD_NATIVE_FUNCTION *NativePin 818 ); 819 820 /** 821 This function sets SATA LED pin into native mode. SATA LED indicates 822 SATA controller activity 823 824 @param[in] SataCtrlIndex SATA controller index 825 @retval Status 826 **/ 827 EFI_STATUS 828 GpioEnableSataLed ( 829 IN UINT32 SataCtrlIndex 830 ); 831 832 /** 833 Returns pad for given CLKREQ# index. 834 835 @param[in] ClkreqIndex CLKREQ# number 836 837 @return CLKREQ# pad. 838 **/ 839 GPIO_PAD 840 GpioGetClkreqPad ( 841 IN UINT32 ClkreqIndex 842 ); 843 844 /** 845 Enables CLKREQ# pad in native mode. 846 847 @param[in] ClkreqIndex CLKREQ# number 848 849 @return none 850 **/ 851 VOID 852 GpioEnableClkreq ( 853 IN UINT32 ClkreqIndex 854 ); 855 856 /** 857 This function sets PCHHOT pin into native mode 858 859 @param[in] none 860 861 @retval Status 862 **/ 863 EFI_STATUS 864 GpioEnablePchHot ( 865 VOID 866 ); 867 868 /** 869 This function sets VRALERTB pin into native mode 870 871 @param[in] none 872 873 @retval Status 874 **/ 875 EFI_STATUS 876 GpioEnableVrAlert ( 877 VOID 878 ); 879 880 /** 881 This function sets CPU GP pins into native mode 882 883 @param[in] CpuGpPinNum CPU GP pin number 884 885 @retval Status 886 **/ 887 EFI_STATUS 888 GpioEnableCpuGpPin ( 889 IN UINT32 CpuGpPinNum 890 ); 891 892 /** 893 This function sets CPU C10 Gate pins into native mode 894 895 @retval Status 896 **/ 897 EFI_STATUS 898 GpioEnableCpuC10GatePin ( 899 VOID 900 ); 901 902 // 903 // DDPx pins 904 // 905 typedef enum { 906 GpioDdp1 = 0x01, 907 GpioDdp2 = 0x02, 908 GpioDdp3 = 0x03, 909 GpioDdp4 = 0x04, 910 GpioDdpA = 0x10, 911 GpioDdpB = 0x11, 912 GpioDdpC = 0x12, 913 GpioDdpD = 0x13, 914 GpioDdpF = 0x15, 915 } GPIO_DDP; 916 917 /** 918 This function sets DDP pins into native mode 919 920 @param[in] DdpInterface DDPx interface 921 922 @retval Status 923 **/ 924 EFI_STATUS 925 GpioEnableDpInterface ( 926 IN GPIO_DDP DdpInterface 927 ); 928 929 // 930 // DDI Port TBT_LSX interface 931 // 932 typedef enum { 933 GpioTbtLsxDdi1, 934 GpioTbtLsxDdi2, 935 GpioTbtLsxDdi3, 936 GpioTbtLsxDdi4, 937 GpioTbtLsxDdi5, 938 GpioTbtLsxDdi6 939 } GPIO_TBT_LSX; 940 941 /** 942 This function sets TBT_LSx pin into native mode 943 944 @param[in] TbtLsxDdiPort TBT_LSx DDI Port Number 945 946 @retval Status 947 **/ 948 EFI_STATUS 949 GpioEnableTbtLsxInterface ( 950 IN GPIO_TBT_LSX TbtLsxDdiPort 951 ); 952 953 /** 954 This function configures GPIO connection between CNVi and CRF 955 956 @retval Status 957 **/ 958 EFI_STATUS 959 GpioConfigureCnviCrfConnection ( 960 VOID 961 ); 962 963 /** 964 This function sets CNVi Bluetooth Enable value 965 966 @param[in] Value CNVi BT enable value 967 0: Disable, 1: Enable 968 @retval Status 969 **/ 970 EFI_STATUS 971 GpioSetCnviBtEnState ( 972 IN UINT32 Value 973 ); 974 975 /** 976 This function sets CNVi Bluetooth Wireless Charging support 977 978 @param[in] BtWirelessCharging CNVi BT Wireless Charging support 979 0: Normal BT operation (no Wireless Charging support) 980 1: Enable BT Wireless Charging 981 @retval Status 982 **/ 983 EFI_STATUS 984 GpioSetCnviBtWirelessCharging ( 985 IN UINT32 BtWirelessCharging 986 ); 987 988 /** 989 This function enables and configures CNVi Bluetooth Host wake-up interrupt 990 991 @param[in] None 992 993 @retval Status 994 **/ 995 EFI_STATUS 996 GpioConfigureCnviBtHostWakeInt ( 997 VOID 998 ); 999 1000 /** 1001 This function enables IMGU CLKOUT native pin 1002 1003 @param[in] ImguClkOutPinIndex The index of IMGU CLKOUT natine pin 1004 1005 @retval Status 1006 **/ 1007 EFI_STATUS 1008 GpioEnableImguClkOut ( 1009 IN UINT8 ImguClkOutPinIndex 1010 ); 1011 1012 /** 1013 Power button debounce configuration 1014 Debounce time can be specified in microseconds. Only certain values according 1015 to below formula are supported: 1016 DebounceTime = (2 ^ PADCFG_DW2.DEBOUNCE)*(glitch filter clock period). 1017 RTC clock with f = 32 KHz is used for glitch filter. 1018 DebounceTime = (2 ^ PADCFG_DW2.DEBOUNCE)*(31.25 us). 1019 Supported DebounceTime values are following: 1020 DebounceTime = 0 -> Debounce feature disabled 1021 DebounceTime > 0 && < 250us -> Not supported 1022 DebounceTime = 250us - 1024000us -> Supported range (DebounceTime = 250us * 2^n) 1023 For values not supported by HW, they will be rounded down to closest supported one 1024 1025 @param[in] DebounceTime Debounce Time in microseconds 1026 If Debounce Time = 0, Debouncer feature will be disabled 1027 Function will set DebounceTime argument to rounded supported value 1028 **/ 1029 VOID 1030 GpioSetPwrBtnDebounceTimer ( 1031 IN UINT32 DebounceTime 1032 ); 1033 1034 1035 /** 1036 VCCIO level selection 1037 **/ 1038 typedef enum { 1039 GpioVcc3v3, 1040 GpioVcc1v8, 1041 MaxVccioSel 1042 } GPIO_VCCIO_SEL; 1043 /** 1044 The function sets VCCIOSEL 1045 1046 @param[in] GpioPad GPIO pad 1047 @param[in] VccioSel Pad voltage 1048 1049 @retval EFI_SUCCESS The function completed successfully 1050 @retval EFI_UNSUPPORTED The Pin is owned by others 1051 @retval EFI_INVALID_PARAMETER Invalid group or parameter 1052 **/ 1053 EFI_STATUS 1054 GpioSetVccLevel ( 1055 IN GPIO_PAD GpioPad, 1056 IN GPIO_VCCIO_SEL VccioSel 1057 ); 1058 1059 /** 1060 SBU (Sideband use) pins are used as auxiliary signals for Type C connector, 1061 which are hard-wired to BSSB_LS natively for debug function. 1062 when USB-C is enablde and debug not needed, disable pins (BSSB) used for debug through TypeC connector, 1063 program SBU pins to high-Z/open circuit per USB-C spec. 1064 1065 @param[in] UsbTcPortEnBitmap USB Type C port enabled bitmap 1066 1067 @retval EFI_SUCCESS The function completed successfully 1068 @retval EFI_UNSUPPORTED SBU pads are not supported 1069 @retval EFI_INVALID_PARAMETER Invalid input parameter 1070 **/ 1071 EFI_STATUS 1072 GpioDisableTypeCSbuDebug ( 1073 IN UINT32 UsbTcPortEnBitmap 1074 ); 1075 1076 /** 1077 When 2-wire DCI OOB is connected via SBU from Type C port, need set IO Standby state to masked (to operate as if no standby signal asserted) 1078 to remain connection in low power state. 1079 1080 @param[in] DciPortId DCI connection port ID 1081 1082 @retval EFI_SUCCESS The function completed successfully 1083 @retval EFI_UNSUPPORTED SBU pads are not supported 1084 @retval EFI_INVALID_PARAMETER Invalid input parameter 1085 **/ 1086 EFI_STATUS 1087 Gpio2WireDciOobSetting ( 1088 IN UINT8 DciPortId 1089 ); 1090 1091 /** 1092 This function enables the virtual wire msg bus from GPIO controller 1093 to FIA. The virtual wire is used to transfer CLKREQ assert/de-assert 1094 msg for CPU PCIe ports. Each of the PCIe ports has its dedicated VW 1095 msg. 1096 1097 @param[in] PortIndex Index of the CPU PCIe port for which VW 1098 should be enabled. 1099 1100 @retval EFI_SUCCESS The function completed successfully 1101 @retval EFI_UNSUPPORTED Failed to set native mode. 1102 **/ 1103 EFI_STATUS 1104 GpioEnableCpuPcieVwClkReqMsgBus ( 1105 IN UINT32 PortIndex 1106 ); 1107 1108 /** 1109 This function sets Time Sync Gpio into native mode 1110 1111 @param[in] Index index 1112 1113 @retval Status 1114 **/ 1115 EFI_STATUS 1116 GpioEnableTimeSync ( 1117 IN UINT32 Index 1118 ); 1119 1120 /** 1121 This function sets Tsn into native mode 1122 1123 @retval Status 1124 **/ 1125 EFI_STATUS 1126 GpioEnableTsn ( 1127 VOID 1128 ); 1129 1130 /** 1131 This function is to be used In GpioLockPads() to override a lock request by SOC code. 1132 1133 @param[in] Group GPIO group 1134 @param[in] DwNum Register number for current group (parameter applicable in accessing whole register). 1135 For group which has less then 32 pads per group DwNum must be 0. 1136 @param[out] *UnlockCfgPad DWORD bitmask for pads which are going to be left unlocked 1137 Bit position - PadNumber 1138 Bit value - 0: to be locked, 1: Leave unlocked 1139 @param[out] *UnlockTxPad DWORD bitmask for pads which are going to be left unlocked 1140 Bit position - PadNumber 1141 Bit value - 0: to be locked, 1: Leave unlocked 1142 1143 @retval EFI_SUCCESS The function completed successfully 1144 @retval EFI_INVALID_PARAMETER Invalid input parameter 1145 **/ 1146 EFI_STATUS 1147 GpioUnlockOverride ( 1148 IN GPIO_GROUP Group, 1149 IN UINT32 DwNum, 1150 OUT UINT32 *UnlockCfgPad, 1151 OUT UINT32 *UnlockTxPad 1152 ); 1153 1154 /** 1155 Check if 0x13 opcode supported for writing to GPIO lock unlock register 1156 1157 @retval TRUE It's supported 1158 @retval FALSE It's not supported 1159 **/ 1160 BOOLEAN 1161 IsGpioLockOpcodeSupported ( 1162 VOID 1163 ); 1164 1165 /** 1166 Configures IO standby related settings for the GPIO pad. 1167 1168 @param[in] GpioPad GPIO pad 1169 @param[in] IoStandbyState GPIO pad IO Standby state 1170 @param[in] IoStandbyTerm GPIO pad IO Standby termination 1171 1172 @retval EFI_SUCCESS The function completed successfully 1173 @retval EFI_INVALID_PARAMETER Invalid group or pad number 1174 **/ 1175 EFI_STATUS 1176 GpioConfigurePadIoStandby ( 1177 IN GPIO_PAD GpioPad, 1178 IN GPIO_IOSTANDBY_STATE IoStandbyState, 1179 IN GPIO_IOSTANDBY_TERM IoStandbyTerm 1180 ); 1181 1182 /** 1183 Checks if GPIO PinMux corresponds to I2C4 B 1184 1185 @param[in] SdaPinMux GPIO pad pinmux for SDA 1186 @param[in] SclPinMux GPIO pad pinmux for SCL 1187 1188 @retval TRUE PinMux corresponds to I2C4 B 1189 FALSE PinMux equals to I2C4 A 1190 **/ 1191 EFI_STATUS 1192 GpioIsSerialIoI2c4bMuxed ( 1193 IN UINT32 SdaPinMux, 1194 IN UINT32 SclPinMux 1195 ); 1196 1197 #endif // _GPIO_PRIVATE_LIB_H_ 1198