| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIFixSGPRCopies.cpp | 147 const TargetRegisterClass *SrcRC = SrcReg.isVirtual() in getCopyRegClasses() local
161 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC, in isVGPRToSGPRCopy()
168 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC, in isSGPRToVGPRCopy()
237 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence() local
268 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in foldVGPRCopyIntoRegSequence() local
589 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
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| H A D | AMDGPUInstructionSelector.cpp | 106 const TargetRegisterClass *SrcRC in constrainCopyLikeIntrin() local
139 const TargetRegisterClass *SrcRC in selectCOPY() local
483 const TargetRegisterClass *SrcRC = in selectG_EXTRACT() local
529 const TargetRegisterClass *SrcRC in selectG_MERGE_VALUES() local
558 const TargetRegisterClass *SrcRC = in selectG_UNMERGE_VALUES() local
1856 const TargetRegisterClass *SrcRC in selectG_TRUNC() local
1997 const TargetRegisterClass *SrcRC = in selectG_SZA_EXT() local
2041 const TargetRegisterClass &SrcRC = InReg && DstSize > 32 ? in selectG_SZA_EXT() local
2505 const TargetRegisterClass *SrcRC = TRI.getRegClassForTypeOnBank(Ty, *SrcRB, in selectG_PTRMASK() local
2629 const TargetRegisterClass *SrcRC = TRI.getRegClassForTypeOnBank(SrcTy, *SrcRB, in selectG_EXTRACT_VECTOR_ELT() local
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| H A D | SIRegisterInfo.cpp | 2174 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
2258 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| H A D | SIFoldOperands.cpp | 686 const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcReg); in foldOperand() local
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| H A D | SIInstrInfo.cpp | 861 const TargetRegisterClass *SrcRC = RI.getPhysRegClass(SrcReg); in copyPhysReg() local
6570 const TargetRegisterClass *SrcRC = Src.isReg() ? in splitScalar64BitBCNT() local
6857 const TargetRegisterClass *SrcRC = getOpRegClass(Inst, 1); in getDestEquivalentVGPRClass() local
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 248 const TargetRegisterClass *SrcRC = in selectCopy() local
286 const TargetRegisterClass *SrcRC = getRegClassFromGRPhysReg(SrcReg); in selectCopy() local
685 const TargetRegisterClass *SrcRC) { in canTurnIntoCOPY()
729 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcRB); in selectTruncOrPtrToInt() local
858 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcRB); in selectAnyext() local
1172 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI); in emitExtractSubreg() local
1210 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI); in emitInsertSubreg() local
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| H A D | X86RegisterInfo.cpp | 217 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| H A D | X86DomainReassignment.cpp | 66 static const TargetRegisterClass *getDstRC(const TargetRegisterClass *SrcRC, in getDstRC()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.cpp | 38 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in copyPhysReg() local
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXCopy.cpp | 99 const TargetRegisterClass *SrcRC = &PPC::VSLRCRegClass; in processBlock() local
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InstructionSelect.cpp | 225 auto SrcRC = MRI.getRegClass(SrcReg); in runOnMachineFunction() local
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.cpp | 280 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetRegisterInfo.cpp | 384 const TargetRegisterClass *SrcRC, in shareSameRegisterFile()
414 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| H A D | DetectDeadLanes.cpp | 155 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in isCrossCopy() local
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| H A D | RegisterCoalescer.cpp | 478 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src); in setRegisters() local
1881 auto SrcRC = MRI->getRegClass(CP.getSrcReg()); in joinCopy() local
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| H A D | PeepholeOptimizer.cpp | 736 const TargetRegisterClass *SrcRC = MRI->getRegClass(CurSrcPair.Reg); in findNextSource() local
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| H A D | MachineVerifier.cpp | 1704 const TargetRegisterClass *SrcRC = in visitMachineInstrBefore() local
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 855 const TargetRegisterClass *SrcRC, in shouldCoalesce()
915 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 348 const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 377 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 782 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGFast.cpp | 382 const TargetRegisterClass *SrcRC, in InsertCopiesAndMoveSuccs()
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| H A D | InstrEmitter.cpp | 159 const TargetRegisterClass *SrcRC = nullptr, *DstRC = nullptr; in EmitCopyFromReg() local
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 1024 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 864 const TargetRegisterClass *SrcRC; in selectCopy() local
2834 const TargetRegisterClass *SrcRC = in select() local
3600 const TargetRegisterClass *SrcRC = in selectVectorICmp() local
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