xref: /illumos-gate/usr/src/cmd/sgs/gprof/common/sparc.h (revision fec04708)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright (c) 1993 by Sun Microsystems, Inc.
24  */
25 
26     /*
27      *	opcodes of the call instructions
28      */
29     /*
30      *	offset (in bytes) of the code from the entry address of a routine.
31      *	(see asgnsamples for use and explanation.)
32      */
33 #define OFFSET_OF_CODE	0 /* there is no mask on a SPARC */
34 #define	UNITS_TO_CODE	(OFFSET_OF_CODE / sizeof(UNIT))
35     /*
36      * address at which text begins
37      */
38 extern size_t	textbegin;
39 #define TORIGIN (unsigned int)	textbegin
40     /*
41      *  Macros for manipulating instruction fields.  These use the
42      *  structures defined below
43      */
44 #define OP(x)		(((union instruct *) (x))->f_1.op)
45 #define DISP30(x)	(((union instruct *) (x))->f_1.disp30)
46 #define OP3(x)		(((union instruct *) (x))->f_3c.op3)
47 #define RD(x)		(((union instruct *) (x))->f_3c.rd)
48 #define IMMED(x)	(((union instruct *) (x))->f_3c.i)
49 #define SIMM13(x)	(((((union instruct *) (x))->f_3d.simm13) << 19) >> 19)
50 #define RS1(x)		(((union instruct *) (x))->f_3c.rs1)
51 #define RS2(x)		(((union instruct *) (x))->f_3c.rs2)
52     /*
53      *  a few values for operand and register fields
54      */
55 #define CALL		0x1
56 #define FMT3_0x10	0x2
57 #define JMPL		0x38
58 #define R_G0		0x0
59 #define R_O7		0xF
60 #define R_I7		0x1F
61     /*
62      *  A macro for converting from instructp to the appropriate address in
63      *  the program
64      */
65 #define PC_VAL(x)	((x) - (unsigned long) textspace + TORIGIN)
66 	/*
67 	 *	structures for decoding instructions
68 	 */
69 struct f_1 {
70     unsigned long   op:2,
71 		    disp30:30;
72 };
73 struct f_2a {
74     unsigned long   op:2,
75 		    rd:5,
76 		    op2:3,
77 		    imm22:22;
78 };
79 struct f_2b {
80     unsigned long   op:2,
81 		    a:1,
82 		    cond:4,
83 		    op2:3,
84 		    disp22:22;
85 };
86 struct f_3a {
87     unsigned long   op:2,
88 		    ign1:1,
89 		    cond:4,
90 		    op3:6,
91 		    rs1:5,
92 		    i:1,
93 		    ign2:8,
94 		    rs2:5;
95 };
96 struct f_3b {
97     unsigned long   op:2,
98 		    ign1:1,
99 		    cond:4,
100 		    op3:6,
101 		    rs1:5,
102 		    i:1,
103 		    simm13:13;
104 };
105 struct f_3c {
106     unsigned long   op:2,
107 		    rd:5,
108 		    op3:6,
109 		    rs1:5,
110 		    i:1,
111 		    asi:8,
112 		    rs2:5;
113 };
114 struct f_3d {
115     unsigned long   op:2,
116 		    rd:5,
117 		    op3:6,
118 		    rs1:5,
119 		    i:1,
120 		    simm13:13;
121 };
122 struct f_3e {
123     unsigned long   op:2,
124 		    rd:5,
125 		    op3:6,
126 		    rs1:5,
127 		    opf:9,
128 		    rs2:5;
129 };
130 
131 union instruct {
132 	struct f_1	f_1;
133 	struct f_2a	f_2a;
134 	struct f_2b	f_2b;
135 	struct f_3a	f_3a;
136 	struct f_3b	f_3b;
137 	struct f_3c	f_3c;
138 	struct f_3d	f_3d;
139 	struct f_3e	f_3e;
140 };
141