| /dports/net/wireshark/wireshark-3.6.1/epan/dissectors/ |
| H A D | packet-rfid-mifare.c | 39 #define TRANSFER 0xB0 macro
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| /dports/net/tshark/wireshark-3.6.1/epan/dissectors/ |
| H A D | packet-rfid-mifare.c | 39 #define TRANSFER 0xB0 macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/sh64/ |
| H A D | sim-main.h | 68 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/gdb761/gdb-7.6.1/sim/sh64/ |
| H A D | sim-main.h | 68 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/finance/moneymanagerex/moneymanagerex-1.2.7/src/model/ |
| H A D | Model_Checking.h | 33 enum TYPE { WITHDRAWAL = 0, DEPOSIT, TRANSFER }; enumerator
|
| H A D | Model_Billsdeposits.h | 35 enum TYPE { WITHDRAWAL = 0, DEPOSIT, TRANSFER }; enumerator
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/lm32/ |
| H A D | sim-main.h | 98 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/gdb761/gdb-7.6.1/sim/lm32/ |
| H A D | sim-main.h | 98 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/i960/ |
| H A D | sim-main.h | 62 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/iq2000/ |
| H A D | sim-main.h | 72 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/gdb761/gdb-7.6.1/sim/iq2000/ |
| H A D | sim-main.h | 72 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/i960/ |
| H A D | sim-main.h | 62 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/mn10300/ |
| H A D | sim-main.h | 55 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/mn10300/ |
| H A D | sim-main.h | 54 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/gdb761/gdb-7.6.1/sim/mn10300/ |
| H A D | sim-main.h | 54 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/mn10300/ |
| H A D | sim-main.h | 55 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
| H A D | sim-main.h | 83 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/m32r/ |
| H A D | sim-main.h | 83 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/gdb761/gdb-7.6.1/sim/m32r/ |
| H A D | sim-main.h | 83 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
| H A D | sim-main.h | 83 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ argument
|
| /dports/comms/flmsg/flmsg-4.0.19/src/include/ |
| H A D | flmsg.h | 44 WXHC, SEVEREWX, STORMREP, CAP105, CAP110, TRANSFER, CUSTOM_TRANSFER }; enumerator
|
| /dports/mail/thunderbird/thunderbird-91.8.0/third_party/rust/gfx-hal/src/pso/ |
| H A D | mod.rs | 76 const TRANSFER = 0x1000; const
|
| /dports/www/firefox-esr/firefox-91.8.0/third_party/rust/gfx-hal/src/pso/ |
| H A D | mod.rs | 76 const TRANSFER = 0x1000; const
|
| /dports/games/cataclysm-dda-tiles/Cataclysm-DDA-0.F/src/ |
| H A D | avatar.h | 367 TRANSFER, enumerator
|
| /dports/games/cataclysm-dda/Cataclysm-DDA-0.F/src/ |
| H A D | avatar.h | 367 TRANSFER, enumerator
|