/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCInstructionSelector.cpp | 316 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local 333 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local 364 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local 392 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local 408 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local 439 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local 463 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local 490 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local 514 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local 536 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() local [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/VE/ |
H A D | VERegisterInfo.cpp | 300 Register TmpReg = VE::SX16; in processSTVM() local 337 unsigned TmpReg = VE::SX16; in processLDVM() local 380 Register TmpReg = VE::SX16; in processSTVM512() local 425 Register TmpReg = VE::SX16; in processLDVM512() local
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H A D | VEInstrInfo.cpp | 376 Register TmpReg = VE::SX16; in copyPhysReg() local
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 152 Register TmpReg = createResultReg(ToRC); in copyRegToRegClass() local 1022 Register TmpReg = createResultReg(&PPC::G8RCRegClass); in PPCMoveToFPReg() local 1117 Register TmpReg = createResultReg(&PPC::G8RCRegClass); in SelectIToFP() local 1444 Register TmpReg = createResultReg(RC); in processCallArgs() local 1456 Register TmpReg = createResultReg(RC); in processCallArgs() local 1770 Register TmpReg = createResultReg(RC); in SelectRet() local 1779 Register TmpReg = createResultReg(RC); in SelectRet() local 2020 Register TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCMaterializeFP() local 2132 Register TmpReg = createResultReg(RC); in PPCMaterialize32BitInt() local
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H A D | PPCMIPeephole.cpp | 884 Register TmpReg = in simplifyCode() local
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/openbsd/gnu/llvm/llvm/lib/Target/LoongArch/AsmParser/ |
H A D | LoongArchAsmParser.cpp | 757 void LoongArchAsmParser::emitLAInstSeq(MCRegister DestReg, MCRegister TmpReg, in emitLAInstSeq() 879 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressPcrelLarge() local 925 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressGotLarge() local 989 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressTLSIELarge() local 1035 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressTLSLDLarge() local 1081 MCRegister TmpReg = Inst.getOperand(1).getReg(); in emitLoadAddressTLSGDLarge() local
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/openbsd/gnu/llvm/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 2737 unsigned TmpReg = DstReg; in loadImmediate() local 2765 unsigned TmpReg = DstReg; in loadImmediate() local 2972 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local 3204 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local 3431 unsigned TmpReg = Mips::ZERO; in expandLoadSingleImmToFPR() local 3548 unsigned TmpReg = Mips::ZERO; in expandLoadDoubleImmToFPR() local 3735 unsigned TmpReg = DstReg; in expandMem16Inst() local 3862 unsigned TmpReg = DstReg; in expandMem9Inst() local 4544 unsigned TmpReg = SrcReg; in expandUxw() local 4905 unsigned TmpReg = DReg; in expandRotation() local [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/X86/ |
H A D | X86SpeculativeLoadHardening.cpp | 1534 Register TmpReg = MRI->createVirtualRegister(PS->RC); in mergePredStateIntoSP() local 1555 Register TmpReg = MRI->createVirtualRegister(PS->RC); in extractPredStateFromSP() local 1662 Register TmpReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr() local
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H A D | X86CmovConversion.cpp | 771 Register TmpReg = MRI->createVirtualRegister(RC); in convertCmovInstsToBranches() local
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H A D | X86FlagsCopyLowering.cpp | 834 Register TmpReg = MRI->createVirtualRegister(PromoteRC); in rewriteArithmetic() local
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H A D | X86FastISel.cpp | 1757 Register TmpReg = getRegForValue(BI->getCondition()); in X86SelectBranch() local 2088 Register TmpReg = createResultReg(&X86::GR8RegClass); in X86FastEmitCMoveSelect() local 2100 Register TmpReg = getRegForValue(Cond); in X86FastEmitCMoveSelect() local
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/openbsd/gnu/llvm/llvm/lib/Target/BPF/ |
H A D | BPFMISimplifyPatchable.cpp | 188 Register TmpReg = I->getParent()->getOperand(0).getReg(); in processCandidate() local
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | MLxExpansionPass.cpp | 287 Register TmpReg = in ExpandFPMLxInstruction() local
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H A D | ThumbRegisterInfo.cpp | 524 Register TmpReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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H A D | Thumb1FrameLowering.cpp | 616 unsigned &TmpReg, MachineRegisterInfo &MRI) { in findTemporariesForLR()
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64SpeculationHardening.cpp | 307 Register TmpReg = RS.FindUnusedReg(&AArch64::GPR64commonRegClass); in instrumentControlFlow() local
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H A D | AArch64FastISel.cpp | 413 Register TmpReg = createResultReg(RC); in materializeFP() local 4122 Register TmpReg = MRI.createVirtualRegister(RC); in emitLSL_ri() local 4238 Register TmpReg = MRI.createVirtualRegister(RC); in emitLSR_ri() local 4343 Register TmpReg = MRI.createVirtualRegister(RC); in emitASR_ri() local
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIFixSGPRCopies.cpp | 312 Register TmpReg = MRI.createVirtualRegister(NewSrcRC); in foldVGPRCopyIntoRegSequence() local 843 Register TmpReg = in lowerSpecialCase() local
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H A D | SILowerI1Copies.cpp | 705 unsigned TmpReg = createLaneMaskReg(*MF); in lowerCopiesToI1() local
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H A D | SIRegisterInfo.cpp | 2274 Register TmpReg = RS->scavengeRegister(RC, MI, 0, !UseSGPR); in eliminateFrameIndex() local 2504 Register TmpReg = RS->scavengeRegister(&AMDGPU::VGPR_32RegClass, MI, 0); in eliminateFrameIndex() local
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H A D | SIWholeQuadMode.cpp | 942 Register TmpReg; in lowerKillI1() local
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H A D | SIInstrInfo.cpp | 6692 Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarAbs() local 7157 Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBFE() local 7223 Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local 7251 Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local 7263 Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
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/openbsd/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsSEInstrInfo.cpp | 763 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/AsmParser/ |
H A D | RISCVAsmParser.cpp | 2355 void RISCVAsmParser::emitAuipcInstPair(MCOperand DestReg, MCOperand TmpReg, in emitAuipcInstPair() 2463 MCOperand TmpReg = Inst.getOperand(0); in emitLoadStoreSymbol() local
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/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | LegalizationArtifactCombiner.h | 1426 Register TmpReg; in lookThroughCopyInstrs() local
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