1 /*========================== begin_copyright_notice ============================
2 
3 Copyright (C) 2017-2021 Intel Corporation
4 
5 SPDX-License-Identifier: MIT
6 
7 ============================= end_copyright_notice ===========================*/
8 
9 #pragma once
10 
11 #include "../sp/sp_types.h"
12 
13 namespace G6HWC
14 {
15 
16 /*****************************************************************************\
17 STRUCT: SRange
18 \*****************************************************************************/
19 #ifdef __cplusplus
20 template<class Type>
21 struct SRange
22 {
23     Type    Min;
24     Type    Max;
25 };
26 
27 template<class Type>
28 struct SRangeA
29 {
30     Type    Min;
31     Type    Max;
32 
SRangeASRangeA33     SRangeA( const Type min, const Type max )
34     {
35         Min = min;
36         Max = max;
37     };
38 };
39 #endif
40 
41 /*****************************************************************************\
42 STRUCT: S3DRender
43 \*****************************************************************************/
44 struct S3DRenderUnitCapabilities
45 {
46     DWORD   IsBarycentricInterpolationSupported : 1;     // BIT(0)
47     DWORD   IsInstructionCompactionSupported    : 1;     // BIT(1)
48     DWORD                                       :14;
49 };
50 
51 /*****************************************************************************\
52 STRUCT: S3DDataPort
53 \*****************************************************************************/
54 struct S3DDataPortCapabilities
55 {
56     DWORD   OwordBlockTypes;
57     DWORD   OwordBlockCount[3];
58     DWORD   OwordDualBlockTypes;
59     DWORD   OwordDualBlockCount[2];
60 };
61 
62 /*****************************************************************************\
63 STRUCT: S3DKernelHardwareCapabilities
64 \*****************************************************************************/
65 struct S3DKernelHardwareCapabilities
66 {
67     DWORD   NumUserClipPlanes;
68 
69     DWORD   NumHardwareGRFRegisters;
70     DWORD   NumSoftwareGRFRegisters;
71     DWORD   NumGRFRegistersPerBlock;
72     DWORD   NumMRFRegisters;
73     DWORD   NumFlagRegisters;
74 
75     DWORD   URBRowsPerSetupWrite;
76 
77     DWORD   EUCount;
78     SRange<DWORD>   EUCountPerSubSlice;
79     DWORD   SubSliceCount;
80     DWORD   EUIDCount;
81     DWORD   EUThreadsPerEU;
82     DWORD   EUReservedGrfRegister;
83     DWORD   EUReservedGrfSubRegister;
84     DWORD   EUGrfMrfRegisterSizeInBytes;
85     DWORD   EUIStackUnderflowException; // not used
86     DWORD   EUIStackOverflowException;  // not used
87     DWORD   EULStackUnderflowException; // not used
88     DWORD   EULStackOverflowException;  // not used
89     DWORD   EUIllegalOpcodeException;   // not used
90     DWORD   EUSoftwareExceptionControl;
91     DWORD   EUMaxSoftwareStackValue;
92     DWORD   EUMaxHardwareStackValue;    // not used
93 
94     DWORD   EUStackSoftwareOverflow;
95     DWORD   EUStackSoftwareUnderflow;
96     DWORD   EUStackSoftwareI;
97     DWORD   EUStackSoftwareL;
98     DWORD   EUStackSoftwareFunctionCall;
99 
100     DWORD           EUJumpCountPerInstruction;
101     SRange<int>     EUInstructionJumpLimit;
102     SRange<DWORD>   ScratchSpacePerThread;
103 
104     DWORD           InstructionCacheSize;
105     DWORD           RenderCacheSize;
106     DWORD           KernelPointerAlignSize;
107 
108     DWORD           MaxAssignableBindingTableIndex;
109 
110     DWORD           StatelessModelBindingTableIndex;
111 
112     bool            HasSharedLocalMemory;
113     DWORD           SharedLocalMemoryBindingTableIndex;
114 
115     bool            HasCoherentIAAccess;
116     DWORD           CoherentIAAccessBindingTableIndex;
117 
118     S3DRenderUnitCapabilities RenderUnit;
119     S3DDataPortCapabilities  DataPort;
120 
121     bool            HasDbgReg;
122 
123 };
124 
125 
126 /*****************************************************************************\
127 STRUCT: SMediaHardwareCapabilities
128 \*****************************************************************************/
129 struct SMediaHardwareCapabilities
130 {
131     DWORD   NumSamplersPerProgram;
132     DWORD   NumSurfacesPerProgram;
133 
134     SRange<DWORD>   SamplerAnistropyRange;
135 
136     // TODO: these should be range per surface type
137     DWORD   MaxSurface1DWidth;
138     DWORD   MaxSurface1DHeight;
139     DWORD   MaxSurface1DDepth;
140 
141     DWORD   MaxSurface2DWidth;
142     DWORD   MaxSurface2DHeight;
143     DWORD   MaxSurface2DDepth;
144 
145     DWORD   MaxSurface3DWidth;
146     DWORD   MaxSurface3DHeight;
147     DWORD   MaxSurface3DDepth;
148 
149     DWORD   MaxSurfaceCubeWidth;
150     DWORD   MaxSurfaceCubeHeight;
151     DWORD   MaxSurfaceCubeDepth;
152 
153     DWORD   MaxSurfaceLODs;
154 
155     DWORD   MaxBufferLength;
156 
157     SRange<float>   SampleLOD;
158     SRange<float>   MipMapLODBias;
159 
160     SRange<DWORD>   URBEntryReadOffset;
161     SRange<DWORD>   URBEntryReadLength;
162 
163     DWORD   MaxURBPayloadStartRegister;
164 
165     SRange<DWORD>   URBEntriesSize;
166     DWORD           URBEntrySize;
167     DWORD           URBRowSize;
168     DWORD           URBSize;
169     DWORD           URBAllocationGranularitySize;  // Bytes
170 
171     DWORD           L2CacheLineSize;
172 
173     DWORD            InstructionCachePrefetchSize;
174 
175     DWORD           SurfaceStatePointerAlignSize;
176     DWORD           BindingTableStatePointerAlignSize;
177     DWORD           SamplerStatePointerAlignSize;
178     DWORD           KernelPointerAlignSize;
179     DWORD           ScratchPointerAlignSize;
180     DWORD           DefaultColorPointerAlignSize;
181     DWORD           ConstantBufferPointerAlignSize;
182     DWORD           InterfaceDescriptorDataAlignSize;
183 
184     DWORD           GeneralStateBaseAddressAlignSize;
185     DWORD           SurfaceStateBaseAddressAlignSize;
186     DWORD           DynamicStateBaseAddressAlignSize;
187     DWORD           IndirectObjectBaseAddressAlignSize;
188     DWORD           InstructionBaseAddressAlignSize;
189 
190     DWORD           SIPPointerAlignSize;
191 
192     S3DKernelHardwareCapabilities   KernelHwCaps;
193 };
194 
195 /*****************************************************************************\
196 PROTOTYPE: InitializeCapsGen8
197 \*****************************************************************************/
198 void InitializeCapsGen8(
199     SMediaHardwareCapabilities* pCaps );
200 
201 }
202