1 /* $OpenBSD: octhcireg.h,v 1.4 2022/12/28 01:39:21 yasuoka Exp $ */ 2 3 /* 4 * Copyright (c) 2007 Internet Initiative Japan, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Cavium Networks OCTEON CN30XX Hardware Reference Manual 31 * CN30XX-HM-1.0 32 * 21.9.1 USBN Registers 33 * 34 * Cavium Networks OCTEON CN30XX Hardware Reference Manual 35 * CN50XX-HM-0.99 36 * 21.8.1 USBN Registers 37 */ 38 39 #ifndef _OCTHCIREGREG_H_ 40 #define _OCTHCIREGREG_H_ 41 42 /* 43 * USBN Registers - interface with the USB core 44 */ 45 #define USBN_INT_SUM 0x0001180068000000ULL 46 #define USBN_INT_ENB 0x0001180068000008ULL 47 #define USBN_CLK_CTL 0x0001180068000010ULL 48 #define USBN_USBP_CTL_STATUS 0x0001180068000018ULL 49 #define USBN_BIST_STATUS 0x00011800680007f8ULL 50 #define USBN_CTL_STATUS 0x00016F0000000800ULL 51 #define USBN_DMA_TEST 0x00016F0000000808ULL 52 53 #define USBN_DMA0_INB_CHN0 0x00016F0000000818ULL 54 #define USBN_DMA0_INB_CHN1 0x00016F0000000820ULL 55 #define USBN_DMA0_INB_CHN2 0x00016F0000000828ULL 56 #define USBN_DMA0_INB_CHN3 0x00016F0000000830ULL 57 #define USBN_DMA0_INB_CHN4 0x00016F0000000838ULL 58 #define USBN_DMA0_INB_CHN5 0x00016F0000000840ULL 59 #define USBN_DMA0_INB_CHN6 0x00016F0000000848ULL 60 #define USBN_DMA0_INB_CHN7 0x00016F0000000850ULL 61 62 #define USBN_DMA0_OUTB_CHN0 0x00016F0000000858ULL 63 #define USBN_DMA0_OUTB_CHN1 0x00016F0000000860ULL 64 #define USBN_DMA0_OUTB_CHN2 0x00016F0000000868ULL 65 #define USBN_DMA0_OUTB_CHN3 0x00016F0000000870ULL 66 #define USBN_DMA0_OUTB_CHN4 0x00016F0000000878ULL 67 #define USBN_DMA0_OUTB_CHN5 0x00016F0000000880ULL 68 #define USBN_DMA0_OUTB_CHN6 0x00016F0000000888ULL 69 #define USBN_DMA0_OUTB_CHN7 0x00016F0000000890ULL 70 71 /* ---- register bits */ 72 73 /* for USBN_INT_SUM and USBN_INT_ENB */ 74 #define USBN_INT_XXX_63_38 0xffffffc000000000ULL 75 #define USBN_INT_ND4O_DPF 0x0000002000000000ULL 76 #define USBN_INT_ND4O_DPE 0x0000001000000000ULL 77 #define USBN_INT_ND4O_RPF 0x0000000800000000ULL 78 #define USBN_INT_ND4O_RPE 0x0000000400000000ULL 79 #define USBN_INT_LTL_F_PF 0x0000000200000000ULL 80 #define USBN_INT_LTL_F_PE 0x0000000100000000ULL 81 #define USBN_INT_U2N_C_PE 0x0000000080000000ULL 82 #define USBN_INT_U2N_C_PF 0x0000000040000000ULL 83 #define USBN_INT_U2N_D_PF 0x0000000020000000ULL 84 #define USBN_INT_U2N_D_PE 0x0000000010000000ULL 85 #define USBN_INT_N2U_PE 0x0000000008000000ULL 86 #define USBN_INT_N2U_PF 0x0000000004000000ULL 87 #define USBN_INT_UOD_PF 0x0000000002000000ULL 88 #define USBN_INT_UOD_PE 0x0000000001000000ULL 89 #define USBN_INT_RQ_Q3_E 0x0000000000800000ULL 90 #define USBN_INT_RQ_Q3_F 0x0000000000400000ULL 91 #define USBN_INT_RQ_Q2_E 0x0000000000200000ULL 92 #define USBN_INT_RQ_Q2_F 0x0000000000100000ULL 93 #define USBN_INT_RG_FI_F 0x0000000000080000ULL 94 #define USBN_INT_RG_FI_E 0x0000000000040000ULL 95 #define USBN_INT_LT_FI_F 0x0000000000020000ULL 96 #define USBN_INT_LT_FI_E 0x0000000000010000ULL 97 #define USBN_INT_L2C_A_F 0x0000000000008000ULL 98 #define USBN_INT_L2C_S_E 0x0000000000004000ULL 99 #define USBN_INT_DCRED_F 0x0000000000002000ULL 100 #define USBN_INT_DCRED_E 0x0000000000001000ULL 101 #define USBN_INT_LT_PU_F 0x0000000000000800ULL 102 #define USBN_INT_LT_PO_E 0x0000000000000400ULL 103 #define USBN_INT_NT_PU_F 0x0000000000000200ULL 104 #define USBN_INT_NT_PO_E 0x0000000000000100ULL 105 #define USBN_INT_PT_PU_F 0x0000000000000080ULL 106 #define USBN_INT_PT_PO_E 0x0000000000000040ULL 107 #define USBN_INT_LR_PU_F 0x0000000000000020ULL 108 #define USBN_INT_LR_PO_E 0x0000000000000010ULL 109 #define USBN_INT_NR_PU_F 0x0000000000000008ULL 110 #define USBN_INT_NR_PO_E 0x0000000000000004ULL 111 #define USBN_INT_PR_PU_F 0x0000000000000002ULL 112 #define USBN_INT_PR_PO_E 0x0000000000000001ULL 113 114 #define USBN_CLK_CTL_XXX_63_18 0xfffffffffffc0000ULL 115 #define USBN_CLK_CTL_HCLK_RST 0x0000000000020000ULL 116 #define USBN_CLK_CTL_P_X_ON 0x0000000000010000ULL 117 #define USBN_CLK_CTL_P_RCLK 0x0000000000008000ULL 118 #define USBN_CLK_CTL_P_XENBN 0x0000000000004000ULL 119 #define USBN_CLK_CTL_P_COM_ON 0x0000000000002000ULL 120 #define USBN_CLK_CTL_P_C_SEL 0x0000000000001800ULL 121 #define SET_USBN_CLK_CTL_P_C_SEL(v) (((v)<<11) & USBN_CLK_CTL_P_C_SEL) 122 #define GET_USBN_CLK_CTL_P_C_SEL(v) (((v) & USBN_CLK_CTL_P_C_SEL) >> 11) 123 #define USBN_CLK_CTL_CDIV_BYP 0x0000000000000400ULL 124 #define USBN_CLK_CTL_SD_MODE 0x0000000000000300ULL 125 #define USBN_CLK_CTL_S_BIST 0x0000000000000080ULL 126 #define USBN_CLK_CTL_POR 0x0000000000000040ULL 127 #define USBN_CLK_CTL_ENABLE 0x0000000000000020ULL 128 #define USBN_CLK_CTL_PRST 0x0000000000000010ULL 129 #define USBN_CLK_CTL_HRST 0x0000000000000008ULL 130 #define USBN_CLK_CTL_DIVIDE 0x0000000000000007ULL 131 #define SET_USBN_CLK_CTL_DIVIDE(v) (((v)<<0) & USBN_CLK_CTL_DIVIDE) 132 #define GET_USBN_CLK_CTL_DIVIDE(v) (((v) & USBN_CLK_CTL_DIVIDE) >> 0) 133 /* CN50xx extension */ 134 #define USBN_CLK_CTL_DIVIDE2 0x00000000000c0000ULL 135 #define SET_USBN_CLK_CTL_DIVIDE2(v) (((v)<<18) & USBN_CLK_CTL_DIVIDE2) 136 #define GET_USBN_CLK_CTL_DIVIDE2(v) (((v) & USBN_CLK_CTL_DIVIDE2) >> 18) 137 #define USBN_CLK_CTL_P_RTYPE 0x000000000000c000ULL 138 #define SET_USBN_CLK_CTL_P_RTYPE(v) (((v)<<14) & USBN_CLK_CTL_P_RTYPE) 139 #define GET_USBN_CLK_CTL_P_RTYPE(v) (((v) & USBN_CLK_CTL_P_RTYPE) >> 14) 140 141 #define USBN_USBP_CTL_STATUS_XXX_63_38 0xffffffc000000000ULL 142 #define USBN_USBP_CTL_STATUS_BIST_DONE 0x0000002000000000ULL 143 #define USBN_USBP_CTL_STATUS_BIST_ERR 0x0000001000000000ULL 144 #define USBN_USBP_CTL_STATUS_TDATA_OUT 0x0000000f00000000ULL 145 #define USBN_USBP_CTL_STATUS_SPARES 0x00000000e0000000ULL 146 #define USBN_USBP_CTL_STATUS_USBC_END 0x0000000010000000ULL 147 #define USBN_USBP_CTL_STATUS_USBP_BIST 0x0000000008000000ULL 148 #define USBN_USBP_CTL_STATUS_TCLK 0x0000000004000000ULL 149 #define USBN_USBP_CTL_STATUS_DP_PULLD 0x0000000002000000ULL 150 #define USBN_USBP_CTL_STATUS_DM_PULLD 0x0000000001000000ULL 151 #define USBN_USBP_CTL_STATUS_HST_MODE 0x0000000000800000ULL 152 #define USBN_USBP_CTL_STATUS_TUNING 0x0000000000780000ULL 153 #define USBN_USBP_CTL_STATUS_TX_BS_ENH 0x0000000000040000ULL 154 #define USBN_USBP_CTL_STATUS_TX_BS_EN 0x0000000000020000ULL 155 #define USBN_USBP_CTL_STATUS_LOOP_ENB 0x0000000000010000ULL 156 #define USBN_USBP_CTL_STATUS_VTEST_ENB 0x0000000000008000ULL 157 #define USBN_USBP_CTL_STATUS_BIST_ENB 0x0000000000004000ULL 158 #define USBN_USBP_CTL_STATUS_TDATA_SEL 0x0000000000002000ULL 159 #define USBN_USBP_CTL_STATUS_TADDR_IN 0x0000000000001e00ULL 160 #define USBN_USBP_CTL_STATUS_TDATA_IN 0x00000000000001feULL 161 #define USBN_USBP_CTL_STATUS_ATE_RESET 0x0000000000000001ULL 162 /* CN50xx extension */ 163 #define USBN_USBP_CTL_STATUS_TXRISETUNE 0x8000000000000000ULL 164 #define USBN_USBP_CTL_STATUS_TXVREFTUNE 0x7800000000000000ULL 165 #define USBN_USBP_CTL_STATUS_TXFSLSTUNE 0x0780000000000000ULL 166 #define USBN_USBP_CTL_STATUS_TXHSXVTUNE 0x0060000000000000ULL 167 #define USBN_USBP_CTL_STATUS_SQRXTUNE 0x001c000000000000ULL 168 #define USBN_USBP_CTL_STATUS_COMPDISTUNE 0x0003800000000000ULL 169 #define USBN_USBP_CTL_STATUS_OTGTUNE 0x0000700000000000ULL 170 #define USBN_USBP_CTL_STATUS_OTGDISABLE 0x0000080000000000ULL 171 #define USBN_USBP_CTL_STATUS_PORTRESET 0x0000040000000000ULL 172 #define USBN_USBP_CTL_STATUS_DRVVBUS 0x0000020000000000ULL 173 #define USBN_USBP_CTL_STATUS_LSBIST 0x0000010000000000ULL 174 #define USBN_USBP_CTL_STATUS_FSBIST 0x0000008000000000ULL 175 #define USBN_USBP_CTL_STATUS_HSBIST 0x0000004000000000ULL 176 177 #define USBN_BIST_STATUS_XXX_63_3 0xfffffffffffffff8ULL 178 #define USBN_BIST_STATUS_USBC_BIS 0x0000000000000004ULL 179 #define USBN_BIST_STATUS_NIF_BIS 0x0000000000000002ULL 180 #define USBN_BIST_STATUS_NOF_BIS 0x0000000000000001ULL 181 /* CN50xx extension */ 182 #define USBN_BIST_STATUS_U2NC_BIS 0x0000000000000040ULL 183 #define USBN_BIST_STATUS_U2NF_BIS 0x0000000000000020ULL 184 #define USBN_BIST_STATUS_E2HC_BIS 0x0000000000000010ULL 185 #define USBN_BIST_STATUS_N2UF_BIS 0x0000000000000008ULL 186 187 #define USBN_CTL_STATUS_XXX_63_6 0xffffffffffffffc0ULL 188 #define USBN_CTL_STATUS_DMA_0PAG 0x0000000000000020ULL 189 #define USBN_CTL_STATUS_DMA_STT 0x0000000000000010ULL 190 #define USBN_CTL_STATUS_DMA_TEST 0x0000000000000008ULL 191 #define USBN_CTL_STATUS_INV_A2 0x0000000000000004ULL 192 #define USBN_CTL_STATUS_L2C_EMOD 0x0000000000000003ULL 193 194 #define USBN_DMA_TEST_XXX_63_40 0xffffff0000000000ULL 195 #define USBN_DMA_TEST_DONE 0x0000008000000000ULL 196 #define USBN_DMA_TEST_REQ 0x0000004000000000ULL 197 #define USBN_DMA_TEST_F_ADDR 0x0000003ffff00000ULL 198 #define USBN_DMA_TEST_COUNT 0x00000000000ffe00ULL 199 #define USBN_DMA_TEST_CHANNEL 0x00000000000001f0ULL 200 #define USBN_DMA_TEST_BURST 0x000000000000000fULL 201 202 /* for USBN_DMA0_INB_CHN(0..7) */ 203 #define USBN_DMA0_INB_CHNX_XXX_63_36 0xfffffff000000000ULL 204 #define USBN_DMA0_INB_CHNX_ADDR 0x0000000fffffffffULL 205 206 /* for USBN_DMA0_OUTB_CHN(0..7) */ 207 #define USBN_DMA0_OUTB_CHNX_XXX_63_36 0xfffffff000000000ULL 208 #define USBN_DMA0_OUTB_CHNX_ADDR 0x0000000fffffffffULL 209 210 /* ---- %b format strings */ 211 212 #define USBN_INT_BITS \ 213 "\020" /* hex display */ \ 214 "\x25" "ND4O_DPF" \ 215 "\x24" "ND4O_DPE" \ 216 "\x23" "ND4O_RPF" \ 217 "\x22" "ND4O_RPE" \ 218 "\x21" "LTL_F_PF" \ 219 "\x20" "LTL_F_PE" \ 220 "\x1f" "U2N_C_PE" \ 221 "\x1e" "U2N_C_PF" \ 222 "\x1d" "U2N_D_PF" \ 223 "\x1c" "U2N_D_PE" \ 224 "\x1b" "N2U_PE" \ 225 "\x1a" "N2U_PF" \ 226 "\x19" "UOD_PF" \ 227 "\x18" "UOD_PE" \ 228 "\x17" "RQ_Q3_E" \ 229 "\x16" "RQ_Q3_F" \ 230 "\x15" "RQ_Q2_E" \ 231 "\x14" "RQ_Q2_F" \ 232 "\x13" "RG_FI_F" \ 233 "\x12" "RG_FI_E" \ 234 "\x11" "LT_FI_F" \ 235 "\x10" "LT_FI_E" \ 236 "\x0f" "L2C_A_F" \ 237 "\x0e" "L2C_S_E" \ 238 "\x0d" "DCRED_F" \ 239 "\x0c" "DCRED_E" \ 240 "\x0b" "LT_PU_F" \ 241 "\x0a" "LT_PO_E" \ 242 "\x09" "NT_PU_F" \ 243 "\x08" "NT_PO_E" \ 244 "\x07" "PT_PU_F" \ 245 "\x06" "PT_PO_E" \ 246 "\x05" "LR_PU_F" \ 247 "\x04" "LR_PO_E" \ 248 "\x03" "NR_PU_F" \ 249 "\x02" "NR_PO_E" \ 250 "\x01" "PR_PU_F" \ 251 "\x00" "PR_PO_E" 252 253 #define USBN_CLK_CTL_BITS \ 254 "\020" /* hex display */ \ 255 "\x12" "DIVIDE2_2" \ 256 "\x11" "HCLK_RST" \ 257 "\x10" "RAZ" \ 258 "\x0e" "P_RTYPE_2" \ 259 "\x0d" "P_COM_ON" \ 260 "\x0b" "P_C_SEL_2" \ 261 "\x0a" "CDIV_BYP" \ 262 "\x08" "SD_MODE_2" \ 263 "\x07" "S_BIST" \ 264 "\x06" "POR" \ 265 "\x05" "ENABLE" \ 266 "\x04" "PRST" \ 267 "\x03" "HRST" \ 268 "\x00" "DIVIDE_3" 269 270 #define USBN_USBP_CTL_STATUS_BITS \ 271 "\020" /* hex display */ \ 272 "\x3f" "TXRISETUNE" \ 273 "\x3b" "TXVREFTUNE_4" \ 274 "\x37" "TXFSLSTUNE_4" \ 275 "\x35" "TXHSXVTUNE_2" \ 276 "\x32" "SQRXTUNE_3" \ 277 "\x2f" "COMPDISTUNE_3" \ 278 "\x2c" "OTGTUNE_3" \ 279 "\x2b" "OTGDISABLE" \ 280 "\x2a" "PORTRESET" \ 281 "\x29" "DRVVBUS" \ 282 "\x28" "LSBIST" \ 283 "\x27" "FSBIST" \ 284 "\x26" "HSBIST" \ 285 "\x25" "BIST_DONE" \ 286 "\x24" "BIST_ERR" \ 287 "\x20" "TDATA_OUT_4" \ 288 "\x1d" "SPARES_3" \ 289 "\x1c" "USBC_END" \ 290 "\x1b" "USBP_BIST" \ 291 "\x1a" "TCLK" \ 292 "\x19" "DP_PULLD" \ 293 "\x18" "DM_PULLD" \ 294 "\x17" "HST_MODE" \ 295 "\x13" "TUNING_4" \ 296 "\x12" "TX_BS_ENH" \ 297 "\x11" "TX_BS_EN" \ 298 "\x10" "LOOP_ENB" \ 299 "\x0f" "VTEST_ENB" \ 300 "\x0e" "BIST_ENB" \ 301 "\x0d" "TDATA_SEL" \ 302 "\x09" "TADDR_IN_4" \ 303 "\x01" "TDATA_IN_8" \ 304 "\x00" "ATE_RESET" 305 306 #define USBN_BIST_STATUS_BITS \ 307 "\020" /* hex display */ \ 308 "\x06" "U2NC_BIS" \ 309 "\x05" "U2NF_BIS" \ 310 "\x04" "E2HC_BIS" \ 311 "\x03" "N2UF_BIS" \ 312 "\x02" "USBC_BIS" \ 313 "\x01" "NIF_BIS" \ 314 "\x00" "NOF_BIS" 315 316 #define USBN_CTL_STATUS_BITS \ 317 "\020" /* hex display */ \ 318 "\x05" "DMA_0PAG" \ 319 "\x04" "DMA_STT" \ 320 "\x03" "DMA_TEST" \ 321 "\x02" "INV_A2" \ 322 "\x01" "L2C_EMOD_1" \ 323 "\x00" "L2C_EMOD_0" 324 325 #define USBN_DMA_TEST_BITS \ 326 "\020" /* hex display */ \ 327 "\x27" "DONE" \ 328 "\x26" "REQ" \ 329 "\x14" "F_ADDR_18" \ 330 "\x09" "COUNT_12" \ 331 "\x04" "CHANNEL_5" \ 332 "\x00" "BURST_4" 333 334 /* ---- bus_space */ 335 336 #define USBN_NUNITS 1 337 #define USBN_BASE 0x0001180068000000ULL 338 #define USBN_SIZE 0x800 339 340 #define USBN_INT_SUM_OFFSET 0x00000000 341 #define USBN_INT_ENB_OFFSET 0x00000008 342 #define USBN_CLK_CTL_OFFSET 0x00000010 343 #define USBN_USBP_CTL_STATUS_OFFSET 0x00000018 344 #define USBN_BIST_STATUS_OFFSET 0x000007f8 345 346 347 /* ---- bus_space 2 */ 348 349 #define USBN_2_NUNITS 1 350 #define USBN_2_BASE 0x00016F0000000800ULL 351 #define USBN_2_SIZE 0x098 352 353 #define USBN_CTL_STATUS_OFFSET 0x00000000 354 #define USBN_DMA_TEST_OFFSET 0x00000008 355 #define USBN_DMA0_INB_CHN0_OFFSET 0x00000018 356 #define USBN_DMA0_INB_CHN1_OFFSET 0x00000020 357 #define USBN_DMA0_INB_CHN2_OFFSET 0x00000028 358 #define USBN_DMA0_INB_CHN3_OFFSET 0x00000030 359 #define USBN_DMA0_INB_CHN4_OFFSET 0x00000038 360 #define USBN_DMA0_INB_CHN5_OFFSET 0x00000040 361 #define USBN_DMA0_INB_CHN6_OFFSET 0x00000048 362 #define USBN_DMA0_INB_CHN7_OFFSET 0x00000050 363 #define USBN_DMA0_OUTB_CHN0_OFFSET 0x00000058 364 #define USBN_DMA0_OUTB_CHN1_OFFSET 0x00000060 365 #define USBN_DMA0_OUTB_CHN2_OFFSET 0x00000068 366 #define USBN_DMA0_OUTB_CHN3_OFFSET 0x00000070 367 #define USBN_DMA0_OUTB_CHN4_OFFSET 0x00000078 368 #define USBN_DMA0_OUTB_CHN5_OFFSET 0x00000080 369 #define USBN_DMA0_OUTB_CHN6_OFFSET 0x00000088 370 #define USBN_DMA0_OUTB_CHN7_OFFSET 0x00000090 371 372 373 374 /* 375 * Cavium Networks OCTEON CN30XX Hardware Reference Manual 376 * CN30XX-HM-1.0 377 * 21.9.2 USBC Registers 378 */ 379 380 /* 381 * XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX 382 * XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX 383 */ 384 385 /* 386 * USBC Registers - control the USB core 387 */ 388 #define USBC_GOTGCTL 0x00016F0010000000ULL 389 #define USBC_GOTGINT 0x00016F0010000004ULL 390 #define USBC_GAHBCFG 0x00016F0010000008ULL 391 #define USBC_GUSBCFG 0x00016F001000000CULL 392 #define USBC_GRSTCTL 0x00016F0010000010ULL 393 #define USBC_GINTSTS 0x00016F0010000014ULL 394 #define USBC_GINTMSK 0x00016F0010000018ULL 395 #define USBC_GRXSTSRH 0x00016F001000001CULL 396 #define USBC_GRXSTSPH 0x00016F0010000020ULL 397 #define USBC_GRXFSIZ 0x00016F0010000024ULL 398 #define USBC_GNPTXFSIZ 0x00016F0010000028ULL 399 #define USBC_GNPTXSTS 0x00016F001000002CULL 400 #define USBC_GSNPSID 0x00016F0010000040ULL 401 #define USBC_GHWCFG1 0x00016F0010000044ULL 402 #define USBC_GHWCFG2 0x00016F0010000048ULL 403 #define USBC_GHWCFG3 0x00016F001000004CULL 404 #define USBC_GHWCFG4 0x00016F0010000050ULL 405 #define USBC_HPTXFSIZ 0x00016F0010000100ULL 406 #define USBC_DPTXFSIZ1 0x00016F0010000104ULL 407 #define USBC_DPTXFSIZ2 0x00016F0010000108ULL 408 #define USBC_DPTXFSIZ3 0x00016F001000010CULL 409 #define USBC_DPTXFSIZ4 0x00016F0010000110ULL 410 #define USBC_HCFG 0x00016F0010000400ULL 411 #define USBC_HFIR 0x00016F0010000404ULL 412 #define USBC_HFNUM 0x00016F0010000408ULL 413 #define USBC_HPTXSTS 0x00016F0010000410ULL 414 #define USBC_HAINT 0x00016F0010000414ULL 415 #define USBC_HAINTMSK 0x00016F0010000418ULL 416 #define USBC_HPRT 0x00016F0010000440ULL 417 #define USBC_HCCHAR0 0x00016F0010000500ULL 418 #define USBC_HCCHAR1 0x00016F0010000520ULL 419 #define USBC_HCCHAR2 0x00016F0010000540ULL 420 #define USBC_HCCHAR3 0x00016F0010000560ULL 421 #define USBC_HCCHAR4 0x00016F0010000580ULL 422 #define USBC_HCCHAR5 0x00016F00100005A0ULL 423 #define USBC_HCCHAR6 0x00016F00100005C0ULL 424 #define USBC_HCCHAR7 0x00016F00100005E0ULL 425 #define USBC_HCSPLT0 0x00016F0010000504ULL 426 #define USBC_HCSPLT1 0x00016F0010000524ULL 427 #define USBC_HCSPLT2 0x00016F0010000544ULL 428 #define USBC_HCSPLT3 0x00016F0010000564ULL 429 #define USBC_HCSPLT4 0x00016F0010000584ULL 430 #define USBC_HCSPLT5 0x00016F00100005A4ULL 431 #define USBC_HCSPLT6 0x00016F00100005C4ULL 432 #define USBC_HCSPLT7 0x00016F00100005E4ULL 433 #define USBC_HCINT0 0x00016F0010000508ULL 434 #define USBC_HCINT1 0x00016F0010000528ULL 435 #define USBC_HCINT2 0x00016F0010000548ULL 436 #define USBC_HCINT3 0x00016F0010000568ULL 437 #define USBC_HCINT4 0x00016F0010000588ULL 438 #define USBC_HCINT5 0x00016F00100005A8ULL 439 #define USBC_HCINT6 0x00016F00100005C8ULL 440 #define USBC_HCINT7 0x00016F00100005E8ULL 441 #define USBC_HCINTMSK0 0x00016F001000050CULL 442 #define USBC_HCINTMSK1 0x00016F001000052CULL 443 #define USBC_HCINTMSK2 0x00016F001000054CULL 444 #define USBC_HCINTMSK3 0x00016F001000056CULL 445 #define USBC_HCINTMSK4 0x00016F001000058CULL 446 #define USBC_HCINTMSK5 0x00016F00100005ACULL 447 #define USBC_HCINTMSK6 0x00016F00100005CCULL 448 #define USBC_HCINTMSK7 0x00016F00100005ECULL 449 #define USBC_HCTSIZ0 0x00016F0010000510ULL 450 #define USBC_HCTSIZ1 0x00016F0010000530ULL 451 #define USBC_HCTSIZ2 0x00016F0010000550ULL 452 #define USBC_HCTSIZ3 0x00016F0010000570ULL 453 #define USBC_HCTSIZ4 0x00016F0010000590ULL 454 #define USBC_HCTSIZ5 0x00016F00100005B0ULL 455 #define USBC_HCTSIZ6 0x00016F00100005D0ULL 456 #define USBC_HCTSIZ7 0x00016F00100005F0ULL 457 #define USBC_DCFG 0x00016F0010000800ULL 458 #define USBC_DCTL 0x00016F0010000804ULL 459 #define USBC_DSTS 0x00016F0010000808ULL 460 #define USBC_DIEPMSK 0x00016F0010000810ULL 461 #define USBC_DOEPMSK 0x00016F0010000814ULL 462 #define USBC_DAINT 0x00016F0010000818ULL 463 #define USBC_DAINTMSK 0x00016F001000081CULL 464 #define USBC_DTKNQR1 0x00016F0010000820ULL 465 #define USBC_DTKNQR2 0x00016F0010000824ULL 466 #define USBC_DTKNQR3 0x00016F0010000830ULL 467 #define USBC_DTKNQR4 0x00016F0010000834ULL 468 #define USBC_DIEPCTL0 0x00016F0010000900ULL 469 #define USBC_DIEPCTL1 0x00016F0010000920ULL 470 #define USBC_DIEPCTL2 0x00016F0010000940ULL 471 #define USBC_DIEPCTL3 0x00016F0010000960ULL 472 #define USBC_DIEPCTL4 0x00016F0010000980ULL 473 #define USBC_DIEPINT0 0x00016F0010000908ULL 474 #define USBC_DIEPINT1 0x00016F0010000928ULL 475 #define USBC_DIEPINT2 0x00016F0010000948ULL 476 #define USBC_DIEPINT3 0x00016F0010000968ULL 477 #define USBC_DIEPINT4 0x00016F0010000988ULL 478 #define USBC_DIEPTSIZ0 0x00016F0010000910ULL 479 #define USBC_DIEPTSIZ1 0x00016F0010000930ULL 480 #define USBC_DIEPTSIZ2 0x00016F0010000950ULL 481 #define USBC_DIEPTSIZ3 0x00016F0010000970ULL 482 #define USBC_DIEPTSIZ4 0x00016F0010000990ULL 483 #define USBC_OEPCTL0 0x00016F0010000B00ULL 484 #define USBC_OEPCTL1 0x00016F0010000B20ULL 485 #define USBC_OEPCTL2 0x00016F0010000B40ULL 486 #define USBC_OEPCTL3 0x00016F0010000B60ULL 487 #define USBC_OEPCTL4 0x00016F0010000B80ULL 488 #define USBC_OEPINT0 0x00016F0010000B08ULL 489 #define USBC_OEPINT1 0x00016F0010000B28ULL 490 #define USBC_OEPINT2 0x00016F0010000B48ULL 491 #define USBC_OEPINT3 0x00016F0010000B68ULL 492 #define USBC_OEPINT4 0x00016F0010000B88ULL 493 #define USBC_OEPTSIZ0 0x00016F0010000B10ULL 494 #define USBC_OEPTSIZ1 0x00016F0010000B30ULL 495 #define USBC_OEPTSIZ2 0x00016F0010000B50ULL 496 #define USBC_OEPTSIZ3 0x00016F0010000B70ULL 497 #define USBC_OEPTSIZ4 0x00016F0010000B90ULL 498 #define USBC_PCGCCTL 0x00016F0010000E00ULL 499 #define USBC_NPTXDFIFO0 0x00016F0010001000ULL 500 #define USBC_NPTXDFIFO1 0x00016F0010002000ULL 501 #define USBC_NPTXDFIFO2 0x00016F0010003000ULL 502 #define USBC_NPTXDFIFO3 0x00016F0010004000ULL 503 #define USBC_NPTXDFIFO4 0x00016F0010005000ULL 504 #define USBC_NPTXDFIFO5 0x00016F0010006000ULL 505 #define USBC_NPTXDFIFO6 0x00016F0010007000ULL 506 #define USBC_NPTXDFIFO7 0x00016F0010008000ULL 507 #define USBC_GRXSTSRD 0x00016F001004001CULL 508 #define USBC_GRXSTSPD 0x00016F0010040020ULL 509 510 /* ---- register bits */ 511 512 #define USBC_GOTGCTL_XXX_31_21 0xffe00000 513 #define USBC_GOTGCTL_XXX_20 UINT32_C(0x00100000) 514 #define USBC_GOTGCTL_BSESVLD UINT32_C(0x00080000) 515 #define USBC_GOTGCTL_ASESVLD UINT32_C(0x00040000) 516 #define USBC_GOTGCTL_DBNCTIME UINT32_C(0x00020000) 517 #define USBC_GOTGCTL_CONIDSTS UINT32_C(0x00010000) 518 #define USBC_GOTGCTL_XXX_15_12 0x0000f000 519 #define USBC_GOTGCTL_DEVHNPEN UINT32_C(0x00000800) 520 #define USBC_GOTGCTL_HSTSETHNPEN UINT32_C(0x00000400) 521 #define USBC_GOTGCTL_HNPREQ UINT32_C(0x00000200) 522 #define USBC_GOTGCTL_HSTNEGSCS UINT32_C(0x00000100) 523 #define USBC_GOTGCTL_XXX_7_2 0x000000fc 524 #define USBC_GOTGCTL_SESREQ UINT32_C(0x00000002) 525 #define USBC_GOTGCTL_SESREQSCS UINT32_C(0x00000001) 526 527 #define USBC_GOTGINT_XXX_31_20 0xfff00000 528 #define USBC_GOTGINT_DBNCEDONE UINT32_C(0x00080000) 529 #define USBC_GOTGINT_ADEVTOUTCHG UINT32_C(0x00040000) 530 #define USBC_GOTGINT_HSTNEGDET UINT32_C(0x00020000) 531 #define USBC_GOTGINT_XXX_16_10 0x0001fc00 532 #define USBC_GOTGINT_HSTNEGSUCSTSCHNG UINT32_C(0x00000200) 533 #define USBC_GOTGINT_SESREQSUCSTSCHNG UINT32_C(0x00000100) 534 #define USBC_GOTGINT_XXX_7_3 0x000000f8 535 #define USBC_GOTGINT_SESENDDET UINT32_C(0x00000004) 536 #define USBC_GOTGINT_XXX_1 UINT32_C(0x00000002) 537 #define USBC_GOTGINT_XXX_0 UINT32_C(0x00000001) 538 539 #define USBC_GAHBCFG_XXX_31_9 0xfffffe00 540 #define USBC_GAHBCFG_PTXFEMPLVL UINT32_C(0x00000100) 541 #define USBC_GAHBCFG_NPTXFEMPLVL UINT32_C(0x00000080) 542 #define USBC_GAHBCFG_XXX_6 UINT32_C(0x00000040) 543 #define USBC_GAHBCFG_DMAEN UINT32_C(0x00000020) 544 #define USBC_GAHBCFG_HBSTLEN 0x0000001e 545 #define USBC_GAHBCFG_HBSTLEN_OFFSET 1 546 #define USBC_GAHBCFG_GLBLINTRMSK UINT32_C(0x00000001) 547 548 #define USBC_GUSBCFG_XXX_31_17 0xfffe0000 549 #define USBC_GUSBCFG_OTGI2CSEL UINT32_C(0x00010000) 550 #define USBC_GUSBCFG_PHYLPWRCLKSEL UINT32_C(0x00008000) 551 #define USBC_GUSBCFG_XXX_14 UINT32_C(0x00004000) 552 #define USBC_GUSBCFG_USBTRDTIM 0x00003c00 553 #define USBC_GUSBCFG_USBTRDTIM_OFFSET 10 554 #define USBC_GUSBCFG_HNPCAP UINT32_C(0x00000200) 555 #define USBC_GUSBCFG_SRPCAP UINT32_C(0x00000100) 556 #define USBC_GUSBCFG_DDRSEL UINT32_C(0x00000080) 557 #define USBC_GUSBCFG_PHYSEL UINT32_C(0x00000040) 558 #define USBC_GUSBCFG_FSINTF UINT32_C(0x00000020) 559 #define USBC_GUSBCFG_ULPI_UTMI_SEL UINT32_C(0x00000010) 560 #define USBC_GUSBCFG_PHYIF UINT32_C(0x00000008) 561 #define USBC_GUSBCFG_TOUTCAL 0x00000007 562 #define USBC_GUSBCFG_TOUTCAL_OFFSET 0 563 564 #define USBC_GRSTCTL_AHBIDLE UINT32_C(0x80000000) 565 #define USBC_GRSTCTL_DMAREQ UINT32_C(0x40000000) 566 #define USBC_GRSTCTL_XXX_29_11 0x3ffff800 567 #define USBC_GRSTCTL_TXFNUM 0x000007c0 568 #define USBC_GRSTCTL_TXFNUM_OFFSET 6 569 #define USBC_GRSTCTL_TXFFLSH UINT32_C(0x00000020) 570 #define USBC_GRSTCTL_RXFFLSH UINT32_C(0x00000010) 571 #define USBC_GRSTCTL_INTKNQFLSH UINT32_C(0x00000008) 572 #define USBC_GRSTCTL_FRMCNTRRST UINT32_C(0x00000004) 573 #define USBC_GRSTCTL_HSFTRST UINT32_C(0x00000002) 574 #define USBC_GRSTCTL_CSFTRST UINT32_C(0x00000001) 575 576 #define USBC_GINTSTS_WKUPINT UINT32_C(0x80000000) 577 #define USBC_GINTSTS_SESSREQINT UINT32_C(0x40000000) 578 #define USBC_GINTSTS_DISCONNINT UINT32_C(0x20000000) 579 #define USBC_GINTSTS_CONIDSTSCHNG UINT32_C(0x10000000) 580 #define USBC_GINTSTS_XXX_27 UINT32_C(0x08000000) 581 #define USBC_GINTSTS_PTXFEMP UINT32_C(0x04000000) 582 #define USBC_GINTSTS_HCHINT UINT32_C(0x02000000) 583 #define USBC_GINTSTS_PRTINT UINT32_C(0x01000000) 584 #define USBC_GINTSTS_XXX_23 UINT32_C(0x00800000) 585 #define USBC_GINTSTS_FETSUSP UINT32_C(0x00400000) 586 #define USBC_GINTSTS_INCOMPLP UINT32_C(0x00200000) 587 #define USBC_GINTSTS_INCOMPISOIN UINT32_C(0x00100000) 588 #define USBC_GINTSTS_OEPINT UINT32_C(0x00080000) 589 #define USBC_GINTSTS_IEPINT UINT32_C(0x00040000) 590 #define USBC_GINTSTS_EPMIS UINT32_C(0x00020000) 591 #define USBC_GINTSTS_XXX_16 UINT32_C(0x00010000) 592 #define USBC_GINTSTS_EOPF UINT32_C(0x00008000) 593 #define USBC_GINTSTS_ISOOUTDROP UINT32_C(0x00004000) 594 #define USBC_GINTSTS_ENUMDONE UINT32_C(0x00002000) 595 #define USBC_GINTSTS_USBRST UINT32_C(0x00001000) 596 #define USBC_GINTSTS_USBSUSP UINT32_C(0x00000800) 597 #define USBC_GINTSTS_ERLYSUSP UINT32_C(0x00000400) 598 #define USBC_GINTSTS_I2CINT UINT32_C(0x00000200) 599 #define USBC_GINTSTS_ULPICKINT UINT32_C(0x00000100) 600 #define USBC_GINTSTS_GOUTNAKEFF UINT32_C(0x00000080) 601 #define USBC_GINTSTS_GINNAKEFF UINT32_C(0x00000040) 602 #define USBC_GINTSTS_NPTXFEMP UINT32_C(0x00000020) 603 #define USBC_GINTSTS_RXFLVL UINT32_C(0x00000010) 604 #define USBC_GINTSTS_SOF UINT32_C(0x00000008) 605 #define USBC_GINTSTS_OTGINT UINT32_C(0x00000004) 606 #define USBC_GINTSTS_MODEMIS UINT32_C(0x00000002) 607 #define USBC_GINTSTS_CURMOD UINT32_C(0x00000001) 608 #define USBC_GINTSTS_CURMOD_OFFSET 0 609 #define USBC_GINTSTS_CURMOD_DEVICE 0x0 610 #define USBC_GINTSTS_CURMOD_HOST 0x1 611 612 #define USBC_GINTMSK_WKUPINTMSK UINT32_C(0x80000000) 613 #define USBC_GINTMSK_SESSREQINTMSK UINT32_C(0x40000000) 614 #define USBC_GINTMSK_DISCONNINTMSK UINT32_C(0x20000000) 615 #define USBC_GINTMSK_CONIDSTSTCHNGMSK UINT32_C(0x10000000) 616 #define USBC_GINTMSK_XXX_27 UINT32_C(0x08000000) 617 #define USBC_GINTMSK_PTXFEMPMSK UINT32_C(0x04000000) 618 #define USBC_GINTMSK_HCHINTMSK UINT32_C(0x02000000) 619 #define USBC_GINTMSK_PRTINTMSK UINT32_C(0x01000000) 620 #define USBC_GINTMSK_XXX_23 UINT32_C(0x00800000) 621 #define USBC_GINTMSK_FETSUSPMSK UINT32_C(0x00400000) 622 #define USBC_GINTMSK_INCOMPISOOUTMSK UINT32_C(0x00200000) 623 #define USBC_GINTMSK_INCOMPISOINMSK UINT32_C(0x00100000) 624 #define USBC_GINTMSK_OEPINTMSK UINT32_C(0x00080000) 625 #define USBC_GINTMSK_INEPINTMSK UINT32_C(0x00040000) 626 #define USBC_GINTMSK_EPMISMSK UINT32_C(0x00020000) 627 #define USBC_GINTMSK_XXX_16 UINT32_C(0x00010000) 628 #define USBC_GINTMSK_EOPFMSK UINT32_C(0x00008000) 629 #define USBC_GINTMSK_ISOOUTDROPMSK UINT32_C(0x00004000) 630 #define USBC_GINTMSK_ENUMDONEMSK UINT32_C(0x00002000) 631 #define USBC_GINTMSK_USBRSTMSK UINT32_C(0x00001000) 632 #define USBC_GINTMSK_USBSUSPMSK UINT32_C(0x00000800) 633 #define USBC_GINTMSK_ERLYSUSPMSK UINT32_C(0x00000400) 634 #define USBC_GINTMSK_I2CINT UINT32_C(0x00000200) 635 #define USBC_GINTMSK_ULPICKINTMSK UINT32_C(0x00000100) 636 #define USBC_GINTMSK_GOUTNAKEFFMSK UINT32_C(0x00000080) 637 #define USBC_GINTMSK_GINNAKEFFMSK UINT32_C(0x00000040) 638 #define USBC_GINTMSK_NPTXFEMPMSK UINT32_C(0x00000020) 639 #define USBC_GINTMSK_RXFLVLMSK UINT32_C(0x00000010) 640 #define USBC_GINTMSK_SOFMSK UINT32_C(0x00000008) 641 #define USBC_GINTMSK_OTGINTMSK UINT32_C(0x00000004) 642 #define USBC_GINTMSK_MODEMISMSK UINT32_C(0x00000002) 643 #define USBC_GINTMSK_XXX_0 UINT32_C(0x00000001) 644 645 #define USBC_GRXSTSRH_XXX_31_21 0xffe00000 646 #define USBC_GRXSTSRH_PKTSTS 0x001e0000 647 #define USBC_GRXSTSRH_PKTSTS_OFFSET 17 648 #define USBC_GRXSTSRH_DPID 0x00018000 649 #define USBC_GRXSTSRH_DPID_OFFSET 15 650 #define USBC_GRXSTSRH_DPID_DATA0 0x00 651 #define USBC_GRXSTSRH_DPID_DATA1 0x10 652 #define USBC_GRXSTSRH_DPID_DATA2 0x01 653 #define USBC_GRXSTSRH_DPID_MDATA 0x11 654 #define USBC_GRXSTSRH_BCNT 0x00007ff0 655 #define USBC_GRXSTSRH_BCNT_OFFSET 4 656 #define USBC_GRXSTSRH_CHNUM 0x0000000f 657 #define USBC_GRXSTSRH_CHNUM_OFFSET 0 658 659 #define USBC_GRXSTSPH_XXX_31_21 0xffe00000 660 #define USBC_GRXSTSPH_PKTSTS 0x001e0000 661 #define USBC_GRXSTSPH_PKTSTS_OFFSET 17 662 #define USBC_GRXSTSPH_PKTSTS_IN_DATA_RECV 0x2 663 #define USBC_GRXSTSPH_PKTSTS_IN_XFER_COMPL 0x3 664 #define USBC_GRXSTSPH_PKTSTS_TGL_ERR 0x5 665 #define USBC_GRXSTSPH_PKTSTS_CH_HLTD 0x7 666 #define USBC_GRXSTSPH_DPID 0x00018000 667 #define USBC_GRXSTSPH_DPID_OFFSET 15 668 #define USBC_GRXSTSPH_DPID_DATA0 0x00 669 #define USBC_GRXSTSPH_DPID_DATA1 0x10 670 #define USBC_GRXSTSPH_DPID_DATA2 0x01 671 #define USBC_GRXSTSPH_DPID_MDATA 0x11 672 #define USBC_GRXSTSPH_BCNT 0x00007ff0 673 #define USBC_GRXSTSPH_BCNT_OFFSET 4 674 #define USBC_GRXSTSPH_CHNUM 0x0000000f 675 #define USBC_GRXSTSPH_CHNUM_OFFSET 0 676 677 #define USBC_GRXSTSRD_XXX_31_25 0xfe000000 678 #define USBC_GRXSTSRD_FN 0x01e00000 679 #define USBC_GRXSTSRD_PKTSTS 0x001e0000 680 #define USBC_GRXSTSRD_DPID 0x00018000 681 #define USBC_GRXSTSRD_BCNT 0x00007ff0 682 #define USBC_GRXSTSRD_EPNUM 0x0000000f 683 684 #define USBC_GRXSTSPD_XXX_31_25 0xfe000000 685 #define USBC_GRXSTSPD_FN 0x01e00000 686 #define USBC_GRXSTSPD_PKTSTS 0x001e0000 687 #define USBC_GRXSTSPD_DPID 0x00018000 688 #define USBC_GRXSTSPD_BCNT 0x00007ff0 689 #define USBC_GRXSTSPD_EPNUM 0x0000000f 690 691 #define USBC_GRXFSIZ_XXX_31_16 0xffff0000 692 #define USBC_GRXFSIZ_RXFDEP 0x0000ffff 693 694 #define USBC_GNPTXFSIZ_NPTXFEDP 0xffff0000 695 #define USBC_GNPTXFSIZ_NPTXFEDP_OFFSET 16 696 #define USBC_GNPTXFSIZ_NPTXFSTADDR 0x0000ffff 697 698 #define USBC_GNPTXSTS_XXX_31 UINT32_C(0x80000000) 699 #define USBC_GNPTXSTS_NPTXQTOP_CHNUM 0x78000000 700 #define USBC_GNPTXSTS_NPTXQTOP_ENTRY 0x06000000 701 #define USBC_GNPTXSTS_NPTXQTOP_TERMINATE UINT32_C(0x01000000) 702 #define USBC_GNPTXSTS_NPTXQSPCAVAIL 0x00ff0000 703 #define USBC_GNPTXSTS_NPTXQSPCAVAIL_OFFSET 16 704 #define USBC_GNPTXSTS_NPTXFSPCAVAIL 0x0000ffff 705 #define USBC_GNPTXSTS_NPTXFSPCAVAIL_OFFSET 0 706 707 #define USBC_GSNPSID_SYNOPSYSID 0xffffffff 708 709 #define USBC_GHWCFG1_EPDIR 0xffffffff 710 711 #define USBC_GHWCFG2_XXX_31 UINT32_C(0x80000000) 712 #define USBC_GHWCFG2_TKNQDEPTH 0x7c000000 713 #define USBC_GHWCFG2_PTXQDEPTH 0x03000000 714 #define USBC_GHWCFG2_PTXQDEPTH_OFFSET 24 715 #define USBC_GHWCFG2_NPTXQDEPTH 0x00c00000 716 #define USBC_GHWCFG2_NPTXQDEPTH_OFFSET 22 717 #define USBC_GHWCFG2_XXX_21_20 0x00300000 718 #define USBC_GHWCFG2_DYNFIFOSIZING UINT32_C(0x00080000) 719 #define USBC_GHWCFG2_PERIOSUPPORT UINT32_C(0x00040000) 720 #define USBC_GHWCFG2_NUMHSTCHN1 0x0003c000 721 #define USBC_GHWCFG2_NUMHSTCHN1_OFFSET 14 722 #define USBC_GHWCFG2_NUMDEVEPS 0x00003c00 723 #define USBC_GHWCFG2_FSPHYTYPE 0x00000300 724 #define USBC_GHWCFG2_HSPHYTYPE 0x000000c0 725 #define USBC_GHWCFG2_SINGPNT UINT32_C(0x00000020) 726 #define USBC_GHWCFG2_OTGARCH 0x00000018 727 #define USBC_GHWCFG2_OTGARCH_OFFSET 3 728 #define USBC_GHWCFG2_OTGARCH_SLAVEONLY 0x0 729 #define USBC_GHWCFG2_OTGARCH_EXTERNALDMA 0x1 730 #define USBC_GHWCFG2_OTGARCH_INTERNALDMA 0x2 731 #define USBC_GHWCFG2_OTGARCH_RESERVED 0x3 732 #define USBC_GHWCFG2_OTGMODE 0x00000007 733 734 #define USBC_GHWCFG3_DFIFODEPTH 0xffff0000 735 #define USBC_GHWCFG3_DFIFODEPTH_OFFSET 16 736 #define USBC_GHWCFG3_XXX_15_13 0x0000e000 737 #define USBC_GHWCFG3_AHBPHYSYNC UINT32_C(0x00001000) 738 #define USBC_GHWCFG3_RSTTYPE UINT32_C(0x00000800) 739 #define USBC_GHWCFG3_OPTFEATURE UINT32_C(0x00000400) 740 #define USBC_GHWCFG3_VENDOR_CONTROL_INTERFACE_SUPPORT UINT32_C(0x00000200) 741 #define USBC_GHWCFG3_I2C_SELECTION UINT32_C(0x00000100) 742 #define USBC_GHWCFG3_OTGEN UINT32_C(0x00000080) 743 #define USBC_GHWCFG3_PKTSIZEWIDTH 0x00000070 744 #define USBC_GHWCFG3_XFERSIZEWIDTH 0x0000000f 745 746 #define USBC_GHWCFG4_XXX_31_25 0xfe000000 747 #define USBC_GHWCFG4_SESSENDFLTR UINT32_C(0x01000000) 748 #define USBC_GHWCFG4_BVAILDFLTR UINT32_C(0x01000000) 749 #define USBC_GHWCFG4_AVAILDFLTR UINT32_C(0x00800000) 750 #define USBC_GHWCFG4_VBUSVALIDFLTR UINT32_C(0x00400000) 751 #define USBC_GHWCFG4_IDDGFLTR UINT32_C(0x00200000) 752 #define USBC_GHWCFG4_NUMCTLEPS 0x000f0000 753 #define USBC_GHWCFG4_PHYDATAWIDTH 0x0000c000 754 #define USBC_GHWCFG4_XXX_13_6 0x00003fc0 755 #define USBC_GHWCFG4_AHBFREQ UINT32_C(0x00000020) 756 #define USBC_GHWCFG4_ENABLEPWROPT UINT32_C(0x00000010) 757 #define USBC_GHWCFG4_NUMDEVPERIOEPS 0x0000000f 758 759 #define USBC_HPTXFSIZ_PTXFSIZE 0xffff0000 760 #define USBC_HPTXFSIZ_PTXFSIZE_OFFSET 16 761 #define USBC_HPTXFSIZ_PTXFSTADDR 0x0000ffff 762 #define USBC_HPTXFSIZ_PTXFSTADDR_OFFSET 0 763 764 /* for USBC_DPTXFSIZ(1..4) */ 765 #define USBC_DPTXFSIZX_DPTXFSIZE 0xffff0000 766 #define USBC_DPTXFSIZX_PTXFSTADDR 0x0000ffff 767 768 #define USBC_HCFG_XXX_31_3 0xfffffff8 769 #define USBC_HCFG_FSLSSUPP UINT32_C(0x00000004) 770 #define USBC_HCFG_FSLSPCLKSEL 0x00000003 771 #define USBC_HCFG_FSLSPCLKSEL_OFFSET 0 772 #define USBC_HCFG_FSLSPCLKSEL_30_60_MHZ 0x00 773 #define USBC_HCFG_FSLSPCLKSEL_48_MHZ 0x01 774 #define USBC_HCFG_FSLSPCLKSEL_6_MHZ 0x10 775 776 #define USBC_HFIR_XXX_31_16 0xffff0000 777 #define USBC_HFIR_FRINT 0x0000ffff 778 #define USBC_HFIR_FRINT_OFFSET 0 779 780 #define USBC_HFNUM_FRREM 0xffff0000 781 #define USBC_HFNUM_FRNUM 0x0000ffff 782 783 #define USBC_HPTXSTS_PTXQTOP 0xff000000 784 #define USBC_HPTXSTS_PTXQSPCAVAIL 0x00ff0000 785 #define USBC_HPTXSTS_PTXQSPCAVAIL_OFFSET 16 786 #define USBC_HPTXSTS_PTXFSPCAVAIL 0x0000ffff 787 #define USBC_HPTXSTS_PTXFSPCAVAIL_OFFSET 0 788 789 #define USBC_HAINT_XXX_31_16 0xffff0000 790 /* #define USBC_HAINT_HAINT __BITS32(15, 0) */ 791 #define USBC_HAINT_HAINT_F UINT32_C(0x00008000) 792 #define USBC_HAINT_HAINT_E UINT32_C(0x00004000) 793 #define USBC_HAINT_HAINT_D UINT32_C(0x00002000) 794 #define USBC_HAINT_HAINT_C UINT32_C(0x00001000) 795 #define USBC_HAINT_HAINT_B UINT32_C(0x00000800) 796 #define USBC_HAINT_HAINT_A UINT32_C(0x00000400) 797 #define USBC_HAINT_HAINT_9 UINT32_C(0x00000200) 798 #define USBC_HAINT_HAINT_8 UINT32_C(0x00000100) 799 #define USBC_HAINT_HAINT_7 UINT32_C(0x00000080) 800 #define USBC_HAINT_HAINT_6 UINT32_C(0x00000040) 801 #define USBC_HAINT_HAINT_5 UINT32_C(0x00000020) 802 #define USBC_HAINT_HAINT_4 UINT32_C(0x00000010) 803 #define USBC_HAINT_HAINT_3 UINT32_C(0x00000008) 804 #define USBC_HAINT_HAINT_2 UINT32_C(0x00000004) 805 #define USBC_HAINT_HAINT_1 UINT32_C(0x00000002) 806 #define USBC_HAINT_HAINT_0 UINT32_C(0x00000001) 807 808 #define USBC_HAINTMSK_XXX_31_16 0xffff0000 809 /*#define USBC_HAINTMSK_HAINTMSK __BITS32(15, 0) */ 810 #define USBC_HAINTMSK_HAINTMSK_F UINT32_C(0x00008000) 811 #define USBC_HAINTMSK_HAINTMSK_E UINT32_C(0x00004000) 812 #define USBC_HAINTMSK_HAINTMSK_D UINT32_C(0x00002000) 813 #define USBC_HAINTMSK_HAINTMSK_C UINT32_C(0x00001000) 814 #define USBC_HAINTMSK_HAINTMSK_B UINT32_C(0x00000800) 815 #define USBC_HAINTMSK_HAINTMSK_A UINT32_C(0x00000400) 816 #define USBC_HAINTMSK_HAINTMSK_9 UINT32_C(0x00000200) 817 #define USBC_HAINTMSK_HAINTMSK_8 UINT32_C(0x00000100) 818 #define USBC_HAINTMSK_HAINTMSK_7 UINT32_C(0x00000080) 819 #define USBC_HAINTMSK_HAINTMSK_6 UINT32_C(0x00000040) 820 #define USBC_HAINTMSK_HAINTMSK_5 UINT32_C(0x00000020) 821 #define USBC_HAINTMSK_HAINTMSK_4 UINT32_C(0x00000010) 822 #define USBC_HAINTMSK_HAINTMSK_3 UINT32_C(0x00000008) 823 #define USBC_HAINTMSK_HAINTMSK_2 UINT32_C(0x00000004) 824 #define USBC_HAINTMSK_HAINTMSK_1 UINT32_C(0x00000002) 825 #define USBC_HAINTMSK_HAINTMSK_0 UINT32_C(0x00000001) 826 827 #define USBC_HPRT_XXX_31_19 0xfff80000 828 #define USBC_HPRT_PRTSPD 0x00060000 829 #define USBC_HPRT_PRTSPD_OFFSET 17 830 #define USBC_HPRT_PRTSPD_HIGH 0x0 831 #define USBC_HPRT_PRTSPD_FULL 0x1 832 #define USBC_HPRT_PRTSPD_LOW 0x2 833 #define USBC_HPRT_PRTSPD_RESERVED 0x3 834 #define USBC_HPRT_PRTTSTCTL 0x0001e000 835 #define USBC_HPRT_PRTPWR UINT32_C(0x00001000) 836 #define USBC_HPRT_PRTLNSTS 0x00000c00 837 #define USBC_HPRT_XXX_9 UINT32_C(0x00000200) 838 #define USBC_HPRT_PRTRST UINT32_C(0x00000100) 839 #define USBC_HPRT_PRTSUSP UINT32_C(0x00000080) 840 #define USBC_HPRT_PRTRES UINT32_C(0x00000040) 841 #define USBC_HPRT_PRTOVRCURRCHNG UINT32_C(0x00000020) 842 #define USBC_HPRT_PRTOVRCURRACT UINT32_C(0x00000010) 843 #define USBC_HPRT_PRTENCHNG UINT32_C(0x00000008) 844 #define USBC_HPRT_PRTENA UINT32_C(0x00000004) 845 #define USBC_HPRT_PRTCONNDET UINT32_C(0x00000002) 846 #define USBC_HPRT_PRTCONNSTS UINT32_C(0x00000001) 847 848 /* for USBC_HCCHAR(0..7) */ 849 #define USBC_HCCHARX_CHENA UINT32_C(0x80000000) 850 #define USBC_HCCHARX_CHDIS UINT32_C(0x40000000) 851 #define USBC_HCCHARX_ODDFRM UINT32_C(0x20000000) 852 #define USBC_HCCHARX_DEVADDR 0x1fc00000 853 #define USBC_HCCHARX_DEVADDR_OFFSET 22 854 #define USBC_HCCHARX_EC 0x00300000 855 #define USBC_HCCHARX_EC_OFFSET 20 856 #define USBC_HCCHARX_EPTYPE 0x000c0000 857 #define USBC_HCCHARX_EPTYPE_OFFSET 18 858 #define USBC_HCCHARX_EPTYPE_CONTROL 0x00 859 #define USBC_HCCHARX_EPTYPE_ISOCHRONOUS 0x01 860 #define USBC_HCCHARX_EPTYPE_BULK 0x02 861 #define USBC_HCCHARX_EPTYPE_INTERRUPT 0x03 862 #define USBC_HCCHARX_LSPDDEV UINT32_C(0x00020000) 863 #define USBC_HCCHARX_XXX_16 UINT32_C(0x00010000) 864 #define USBC_HCCHARX_EPDIR UINT32_C(0x00008000) 865 #define USBC_HCCHARX_EPNUM 0x00007800 866 #define USBC_HCCHARX_EPNUM_OFFSET 11 867 #define USBC_HCCHARX_MPS 0x000007ff 868 #define USBC_HCCHARX_MPS_OFFSET 0 869 870 /* for USBC_HCSPLT(0..7) */ 871 #define USBC_HCSPLTX_SPLTENA UINT32_C(0x80000000) 872 #define USBC_HCSPLTX_XXX_30_17 0x7ffe0000 873 #define USBC_HCSPLTX_COMPSPLT UINT32_C(0x00010000) 874 #define USBC_HCSPLTX_XACTPOS 0x0000c000 875 #define USBC_HCSPLTX_HUBADDR 0x00003f80 876 #define USBC_HCSPLTX_PRTADDR 0x0000007f 877 878 /* for USBC_HCINT(0..7) */ 879 #define USBC_HCINTX_XXX_31_11 0xfffff800 880 #define USBC_HCINTX_DATATGLERR UINT32_C(0x00000400) 881 #define USBC_HCINTX_FRMOVRUN UINT32_C(0x00000200) 882 #define USBC_HCINTX_BBLERR UINT32_C(0x00000100) 883 #define USBC_HCINTX_XACTERR UINT32_C(0x00000080) 884 #define USBC_HCINTX_NYET UINT32_C(0x00000040) 885 #define USBC_HCINTX_ACK UINT32_C(0x00000020) 886 #define USBC_HCINTX_NAK UINT32_C(0x00000010) 887 #define USBC_HCINTX_STALL UINT32_C(0x00000008) 888 #define USBC_HCINTX_AHBERR UINT32_C(0x00000004) 889 #define USBC_HCINTX_CHHLTD UINT32_C(0x00000002) 890 #define USBC_HCINTX_XFERCOMPL UINT32_C(0x00000001) 891 892 /* for USBC_HCINTMSK(0..7) */ 893 #define USBC_HCINTMSKX_XXX_31_11 0xfffff800 894 #define USBC_HCINTMSKX_DATATGLERRMSK UINT32_C(0x00000400) 895 #define USBC_HCINTMSKX_FRMOVRUNMSK UINT32_C(0x00000200) 896 #define USBC_HCINTMSKX_BBLERRMSK UINT32_C(0x00000100) 897 #define USBC_HCINTMSKX_XACTERRMSK UINT32_C(0x00000080) 898 #define USBC_HCINTMSKX_NYETMSK UINT32_C(0x00000040) 899 #define USBC_HCINTMSKX_ACKMSK UINT32_C(0x00000020) 900 #define USBC_HCINTMSKX_NAKMSK UINT32_C(0x00000010) 901 #define USBC_HCINTMSKX_STALLMSK UINT32_C(0x00000008) 902 #define USBC_HCINTMSKX_AHBERRMSK UINT32_C(0x00000004) 903 #define USBC_HCINTMSKX_CHHLTDMSK UINT32_C(0x00000002) 904 #define USBC_HCINTMSKX_XFERCOMPLMSK UINT32_C(0x00000001) 905 906 /* for USBC_HCTSIZ(0..7) */ 907 #define USBC_HCTSIZX_DOPNG UINT32_C(0x80000000) 908 #define USBC_HCTSIZX_PID 0x60000000 909 #define USBC_HCTSIZX_PID_OFFSET 29 910 #define USBC_HCTSIZX_PID_DATA0 0x00 911 #define USBC_HCTSIZX_PID_DATA2 0x01 912 #define USBC_HCTSIZX_PID_DATA1 0x02 913 #define USBC_HCTSIZX_PID_MDATA_SETUP 0x03 914 #define USBC_HCTSIZX_PKTCNT 0x1ff80000 915 #define USBC_HCTSIZX_PKTCNT_OFFSET 19 916 #define USBC_HCTSIZX_XFERSIZE 0x0007ffff 917 #define USBC_HCTSIZX_XFERSIZE_OFFSET 0 918 919 /* XXX Device Mode Registers */ 920 921 922 923 /* for USBC_NPTXDFIFO(0..7) */ 924 #define USBC_NPTXDFIFOX_DATA 0xffffffff 925 926 /* ---- bus_space */ 927 928 #define USBC_BASE 0x00016F0010000000ULL 929 #define USBC_SIZE 0x40020 930 931 #define USBC_GOTGCTL_OFFSET 0x00000000 932 #define USBC_GOTGINT_OFFSET 0x00000004 933 #define USBC_GAHBCFG_OFFSET 0x00000008 934 #define USBC_GUSBCFG_OFFSET 0x0000000C 935 #define USBC_GRSTCTL_OFFSET 0x00000010 936 #define USBC_GINTSTS_OFFSET 0x00000014 937 #define USBC_GINTMSK_OFFSET 0x00000018 938 #define USBC_GRXSTSRH_OFFSET 0x0000001C 939 #define USBC_GRXSTSPH_OFFSET 0x00000020 940 #define USBC_GRXFSIZ_OFFSET 0x00000024 941 #define USBC_GNPTXFSIZ_OFFSET 0x00000028 942 #define USBC_GNPTXSTS_OFFSET 0x0000002C 943 #define USBC_GSNPSID_OFFSET 0x00000040 944 #define USBC_GHWCFG1_OFFSET 0x00000044 945 #define USBC_GHWCFG2_OFFSET 0x00000048 946 #define USBC_GHWCFG3_OFFSET 0x0000004C 947 #define USBC_GHWCFG4_OFFSET 0x00000050 948 #define USBC_HPTXFSIZ_OFFSET 0x00000100 949 #define USBC_DPTXFSIZ1_OFFSET 0x00000104 950 #define USBC_DPTXFSIZ2_OFFSET 0x00000108 951 #define USBC_DPTXFSIZ3_OFFSET 0x0000010C 952 #define USBC_DPTXFSIZ4_OFFSET 0x00000110 953 #define USBC_HCFG_OFFSET 0x00000400 954 #define USBC_HFIR_OFFSET 0x00000404 955 #define USBC_HFNUM_OFFSET 0x00000408 956 #define USBC_HPTXSTS_OFFSET 0x00000410 957 #define USBC_HAINT_OFFSET 0x00000414 958 #define USBC_HAINTMSK_OFFSET 0x00000418 959 #define USBC_HPRT_OFFSET 0x00000440 960 #define USBC_HCCHAR0_OFFSET 0x00000500 961 #define USBC_HCCHAR1_OFFSET 0x00000520 962 #define USBC_HCCHAR2_OFFSET 0x00000540 963 #define USBC_HCCHAR3_OFFSET 0x00000560 964 #define USBC_HCCHAR4_OFFSET 0x00000580 965 #define USBC_HCCHAR5_OFFSET 0x000005A0 966 #define USBC_HCCHAR6_OFFSET 0x000005C0 967 #define USBC_HCCHAR7_OFFSET 0x000005E0 968 #define USBC_HCSPLT0_OFFSET 0x00000504 969 #define USBC_HCSPLT1_OFFSET 0x00000524 970 #define USBC_HCSPLT2_OFFSET 0x00000544 971 #define USBC_HCSPLT3_OFFSET 0x00000564 972 #define USBC_HCSPLT4_OFFSET 0x00000584 973 #define USBC_HCSPLT5_OFFSET 0x000005A4 974 #define USBC_HCSPLT6_OFFSET 0x000005C4 975 #define USBC_HCSPLT7_OFFSET 0x000005E4 976 #define USBC_HCINT0_OFFSET 0x00000508 977 #define USBC_HCINT1_OFFSET 0x00000528 978 #define USBC_HCINT2_OFFSET 0x00000548 979 #define USBC_HCINT3_OFFSET 0x00000568 980 #define USBC_HCINT4_OFFSET 0x00000588 981 #define USBC_HCINT5_OFFSET 0x000005A8 982 #define USBC_HCINT6_OFFSET 0x000005C8 983 #define USBC_HCINT7_OFFSET 0x000005E8 984 #define USBC_HCINTMSK0_OFFSET 0x0000050C 985 #define USBC_HCINTMSK1_OFFSET 0x0000052C 986 #define USBC_HCINTMSK2_OFFSET 0x0000054C 987 #define USBC_HCINTMSK3_OFFSET 0x0000056C 988 #define USBC_HCINTMSK4_OFFSET 0x0000058C 989 #define USBC_HCINTMSK5_OFFSET 0x000005AC 990 #define USBC_HCINTMSK6_OFFSET 0x000005CC 991 #define USBC_HCINTMSK7_OFFSET 0x000005EC 992 #define USBC_HCTSIZ0_OFFSET 0x00000510 993 #define USBC_HCTSIZ1_OFFSET 0x00000530 994 #define USBC_HCTSIZ2_OFFSET 0x00000550 995 #define USBC_HCTSIZ3_OFFSET 0x00000570 996 #define USBC_HCTSIZ4_OFFSET 0x00000590 997 #define USBC_HCTSIZ5_OFFSET 0x000005B0 998 #define USBC_HCTSIZ6_OFFSET 0x000005D0 999 #define USBC_HCTSIZ7_OFFSET 0x000005F0 1000 #define USBC_DCFG_OFFSET 0x00000800 1001 #define USBC_DCTL_OFFSET 0x00000804 1002 #define USBC_DSTS_OFFSET 0x00000808 1003 #define USBC_DIEPMSK_OFFSET 0x00000810 1004 #define USBC_DOEPMSK_OFFSET 0x00000814 1005 #define USBC_DAINT_OFFSET 0x00000818 1006 #define USBC_DAINTMSK_OFFSET 0x0000081C 1007 #define USBC_DTKNQR1_OFFSET 0x00000820 1008 #define USBC_DTKNQR2_OFFSET 0x00000824 1009 #define USBC_DTKNQR3_OFFSET 0x00000830 1010 #define USBC_DTKNQR4_OFFSET 0x00000834 1011 #define USBC_DIEPCTL0_OFFSET 0x00000900 1012 #define USBC_DIEPCTL1_OFFSET 0x00000920 1013 #define USBC_DIEPCTL2_OFFSET 0x00000940 1014 #define USBC_DIEPCTL3_OFFSET 0x00000960 1015 #define USBC_DIEPCTL4_OFFSET 0x00000980 1016 #define USBC_DIEPINT0_OFFSET 0x00000908 1017 #define USBC_DIEPINT1_OFFSET 0x00000928 1018 #define USBC_DIEPINT2_OFFSET 0x00000948 1019 #define USBC_DIEPINT3_OFFSET 0x00000968 1020 #define USBC_DIEPINT4_OFFSET 0x00000988 1021 #define USBC_DIEPTSIZ0_OFFSET 0x00000910 1022 #define USBC_DIEPTSIZ1_OFFSET 0x00000930 1023 #define USBC_DIEPTSIZ2_OFFSET 0x00000950 1024 #define USBC_DIEPTSIZ3_OFFSET 0x00000970 1025 #define USBC_DIEPTSIZ4_OFFSET 0x00000990 1026 #define USBC_OEPCTL0_OFFSET 0x00000B00 1027 #define USBC_OEPCTL1_OFFSET 0x00000B20 1028 #define USBC_OEPCTL2_OFFSET 0x00000B40 1029 #define USBC_OEPCTL3_OFFSET 0x00000B60 1030 #define USBC_OEPCTL4_OFFSET 0x00000B80 1031 #define USBC_OEPINT0_OFFSET 0x00000B08 1032 #define USBC_OEPINT1_OFFSET 0x00000B28 1033 #define USBC_OEPINT2_OFFSET 0x00000B48 1034 #define USBC_OEPINT3_OFFSET 0x00000B68 1035 #define USBC_OEPINT4_OFFSET 0x00000B88 1036 #define USBC_OEPTSIZ0_OFFSET 0x00000B10 1037 #define USBC_OEPTSIZ1_OFFSET 0x00000B30 1038 #define USBC_OEPTSIZ2_OFFSET 0x00000B50 1039 #define USBC_OEPTSIZ3_OFFSET 0x00000B70 1040 #define USBC_OEPTSIZ4_OFFSET 0x00000B90 1041 #define USBC_PCGCCTL_OFFSET 0x00000E00 1042 #define USBC_NPTXDFIFO0_OFFSET 0x00001000 1043 #define USBC_NPTXDFIFO1_OFFSET 0x00002000 1044 #define USBC_NPTXDFIFO2_OFFSET 0x00003000 1045 #define USBC_NPTXDFIFO3_OFFSET 0x00004000 1046 #define USBC_NPTXDFIFO4_OFFSET 0x00005000 1047 #define USBC_NPTXDFIFO5_OFFSET 0x00006000 1048 #define USBC_NPTXDFIFO6_OFFSET 0x00007000 1049 #define USBC_NPTXDFIFO7_OFFSET 0x00008000 1050 #define USBC_GRXSTSRD_OFFSET 0x0004001C 1051 #define USBC_GRXSTSPD_OFFSET 0x00040020 1052 1053 1054 #endif /* _OCTHCIREGREG_H_ */ 1055