1 /** 2 ****************************************************************************** 3 * @file usb_regs.h 4 * @author MCD Application Team 5 * @version V2.0.0 6 * @date 22-July-2011 7 * @brief hardware registers 8 ****************************************************************************** 9 * @attention 10 * 11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 * 18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> 19 ****************************************************************************** 20 */ 21 22 /* Define to prevent recursive inclusion -------------------------------------*/ 23 #ifndef __USB_OTG_REGS_H__ 24 #define __USB_OTG_REGS_H__ 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "usb_conf.h" 28 29 30 /** @addtogroup USB_OTG_DRIVER 31 * @{ 32 */ 33 34 /** @defgroup USB_REGS 35 * @brief This file is the 36 * @{ 37 */ 38 39 40 /** @defgroup USB_REGS_Exported_Defines 41 * @{ 42 */ 43 44 #define USB_OTG_HS_BASE_ADDR 0x40040000 45 #define USB_OTG_FS_BASE_ADDR 0x50000000 46 47 #define USB_OTG_CORE_GLOBAL_REGS_OFFSET 0x000 48 #define USB_OTG_DEV_GLOBAL_REG_OFFSET 0x800 49 #define USB_OTG_DEV_IN_EP_REG_OFFSET 0x900 50 #define USB_OTG_EP_REG_OFFSET 0x20 51 #define USB_OTG_DEV_OUT_EP_REG_OFFSET 0xB00 52 #define USB_OTG_HOST_GLOBAL_REG_OFFSET 0x400 53 #define USB_OTG_HOST_PORT_REGS_OFFSET 0x440 54 #define USB_OTG_HOST_CHAN_REGS_OFFSET 0x500 55 #define USB_OTG_CHAN_REGS_OFFSET 0x20 56 #define USB_OTG_PCGCCTL_OFFSET 0xE00 57 #define USB_OTG_DATA_FIFO_OFFSET 0x1000 58 #define USB_OTG_DATA_FIFO_SIZE 0x1000 59 60 61 #define USB_OTG_MAX_TX_FIFOS 15 62 63 #define USB_OTG_HS_MAX_PACKET_SIZE 512 64 #define USB_OTG_FS_MAX_PACKET_SIZE 64 65 #define USB_OTG_MAX_EP0_SIZE 64 66 /** 67 * @} 68 */ 69 70 /** @defgroup USB_REGS_Exported_Types 71 * @{ 72 */ 73 74 /** @defgroup __USB_OTG_Core_register 75 * @{ 76 */ 77 typedef struct _USB_OTG_GREGS //000h 78 { 79 __IO uint32_t GOTGCTL; /* USB_OTG Control and Status Register 000h*/ 80 __IO uint32_t GOTGINT; /* USB_OTG Interrupt Register 004h*/ 81 __IO uint32_t GAHBCFG; /* Core AHB Configuration Register 008h*/ 82 __IO uint32_t GUSBCFG; /* Core USB Configuration Register 00Ch*/ 83 __IO uint32_t GRSTCTL; /* Core Reset Register 010h*/ 84 __IO uint32_t GINTSTS; /* Core Interrupt Register 014h*/ 85 __IO uint32_t GINTMSK; /* Core Interrupt Mask Register 018h*/ 86 __IO uint32_t GRXSTSR; /* Receive Sts Q Read Register 01Ch*/ 87 __IO uint32_t GRXSTSP; /* Receive Sts Q Read & POP Register 020h*/ 88 __IO uint32_t GRXFSIZ; /* Receive FIFO Size Register 024h*/ 89 __IO uint32_t DIEPTXF0_HNPTXFSIZ; /* EP0 / Non Periodic Tx FIFO Size Register 028h*/ 90 __IO uint32_t HNPTXSTS; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/ 91 __IO uint32_t GI2CCTL; /* I2C Access Register 030h*/ 92 uint32_t Reserved34; /* PHY Vendor Control Register 034h*/ 93 __IO uint32_t GCCFG; /* General Purpose IO Register 038h*/ 94 __IO uint32_t CID; /* User ID Register 03Ch*/ 95 uint32_t Reserved40[48]; /* Reserved 040h-0FFh*/ 96 __IO uint32_t HPTXFSIZ; /* Host Periodic Tx FIFO Size Reg 100h*/ 97 __IO uint32_t DIEPTXF[USB_OTG_MAX_TX_FIFOS];/* dev Periodic Transmit FIFO */ 98 } 99 USB_OTG_GREGS; 100 /** 101 * @} 102 */ 103 104 105 /** @defgroup __device_Registers 106 * @{ 107 */ 108 typedef struct _USB_OTG_DREGS // 800h 109 { 110 __IO uint32_t DCFG; /* dev Configuration Register 800h*/ 111 __IO uint32_t DCTL; /* dev Control Register 804h*/ 112 __IO uint32_t DSTS; /* dev Status Register (RO) 808h*/ 113 uint32_t Reserved0C; /* Reserved 80Ch*/ 114 __IO uint32_t DIEPMSK; /* dev IN Endpoint Mask 810h*/ 115 __IO uint32_t DOEPMSK; /* dev OUT Endpoint Mask 814h*/ 116 __IO uint32_t DAINT; /* dev All Endpoints Itr Reg 818h*/ 117 __IO uint32_t DAINTMSK; /* dev All Endpoints Itr Mask 81Ch*/ 118 uint32_t Reserved20; /* Reserved 820h*/ 119 uint32_t Reserved9; /* Reserved 824h*/ 120 __IO uint32_t DVBUSDIS; /* dev VBUS discharge Register 828h*/ 121 __IO uint32_t DVBUSPULSE; /* dev VBUS Pulse Register 82Ch*/ 122 __IO uint32_t DTHRCTL; /* dev thr 830h*/ 123 __IO uint32_t DIEPEMPMSK; /* dev empty msk 834h*/ 124 __IO uint32_t DEACHINT; /* dedicated EP interrupt 838h*/ 125 __IO uint32_t DEACHMSK; /* dedicated EP msk 83Ch*/ 126 uint32_t Reserved40; /* dedicated EP mask 840h*/ 127 __IO uint32_t DINEP1MSK; /* dedicated EP mask 844h*/ 128 uint32_t Reserved44[15]; /* Reserved 844-87Ch*/ 129 __IO uint32_t DOUTEP1MSK; /* dedicated EP msk 884h*/ 130 } 131 USB_OTG_DREGS; 132 /** 133 * @} 134 */ 135 136 137 /** @defgroup __IN_Endpoint-Specific_Register 138 * @{ 139 */ 140 typedef struct _USB_OTG_INEPREGS 141 { 142 __IO uint32_t DIEPCTL; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/ 143 uint32_t Reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/ 144 __IO uint32_t DIEPINT; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/ 145 uint32_t Reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/ 146 __IO uint32_t DIEPTSIZ; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/ 147 __IO uint32_t DIEPDMA; /* IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h*/ 148 __IO uint32_t DTXFSTS;/*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/ 149 uint32_t Reserved18; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/ 150 } 151 USB_OTG_INEPREGS; 152 /** 153 * @} 154 */ 155 156 157 /** @defgroup __OUT_Endpoint-Specific_Registers 158 * @{ 159 */ 160 typedef struct _USB_OTG_OUTEPREGS 161 { 162 __IO uint32_t DOEPCTL; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/ 163 __IO uint32_t DOUTEPFRM; /* dev OUT Endpoint Frame number B00h + (ep_num * 20h) + 04h*/ 164 __IO uint32_t DOEPINT; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/ 165 uint32_t Reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/ 166 __IO uint32_t DOEPTSIZ; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/ 167 __IO uint32_t DOEPDMA; /* dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h*/ 168 uint32_t Reserved18[2]; /* Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/ 169 } 170 USB_OTG_OUTEPREGS; 171 /** 172 * @} 173 */ 174 175 176 /** @defgroup __Host_Mode_Register_Structures 177 * @{ 178 */ 179 typedef struct _USB_OTG_HREGS 180 { 181 __IO uint32_t HCFG; /* Host Configuration Register 400h*/ 182 __IO uint32_t HFIR; /* Host Frame Interval Register 404h*/ 183 __IO uint32_t HFNUM; /* Host Frame Nbr/Frame Remaining 408h*/ 184 uint32_t Reserved40C; /* Reserved 40Ch*/ 185 __IO uint32_t HPTXSTS; /* Host Periodic Tx FIFO/ Queue Status 410h*/ 186 __IO uint32_t HAINT; /* Host All Channels Interrupt Register 414h*/ 187 __IO uint32_t HAINTMSK; /* Host All Channels Interrupt Mask 418h*/ 188 } 189 USB_OTG_HREGS; 190 /** 191 * @} 192 */ 193 194 195 /** @defgroup __Host_Channel_Specific_Registers 196 * @{ 197 */ 198 typedef struct _USB_OTG_HC_REGS 199 { 200 __IO uint32_t HCCHAR; 201 __IO uint32_t HCSPLT; 202 __IO uint32_t HCINT; 203 __IO uint32_t HCGINTMSK; 204 __IO uint32_t HCTSIZ; 205 __IO uint32_t HCDMA; 206 uint32_t Reserved[2]; 207 } 208 USB_OTG_HC_REGS; 209 /** 210 * @} 211 */ 212 213 214 /** @defgroup __otg_Core_registers 215 * @{ 216 */ 217 typedef struct USB_OTG_core_regs //000h 218 { 219 USB_OTG_GREGS *GREGS; 220 USB_OTG_DREGS *DREGS; 221 USB_OTG_HREGS *HREGS; 222 USB_OTG_INEPREGS *INEP_REGS[USB_OTG_MAX_TX_FIFOS]; 223 USB_OTG_OUTEPREGS *OUTEP_REGS[USB_OTG_MAX_TX_FIFOS]; 224 USB_OTG_HC_REGS *HC_REGS[USB_OTG_MAX_TX_FIFOS]; 225 __IO uint32_t *HPRT0; 226 __IO uint32_t *DFIFO[USB_OTG_MAX_TX_FIFOS]; 227 __IO uint32_t *PCGCCTL; 228 } 229 USB_OTG_CORE_REGS , *PUSB_OTG_CORE_REGS; 230 typedef union _USB_OTG_OTGCTL_TypeDef 231 { 232 uint32_t d32; 233 struct 234 { 235 uint32_t sesreqscs : 236 1; 237 uint32_t sesreq : 238 1; 239 uint32_t Reserved2_7 : 240 6; 241 uint32_t hstnegscs : 242 1; 243 uint32_t hnpreq : 244 1; 245 uint32_t hstsethnpen : 246 1; 247 uint32_t devhnpen : 248 1; 249 uint32_t Reserved12_15 : 250 4; 251 uint32_t conidsts : 252 1; 253 uint32_t Reserved17 : 254 1; 255 uint32_t asesvld : 256 1; 257 uint32_t bsesvld : 258 1; 259 uint32_t currmod : 260 1; 261 uint32_t Reserved21_31 : 262 11; 263 } 264 b; 265 } USB_OTG_OTGCTL_TypeDef ; 266 typedef union _USB_OTG_GOTGINT_TypeDef 267 { 268 uint32_t d32; 269 struct 270 { 271 uint32_t Reserved0_1 : 272 2; 273 uint32_t sesenddet : 274 1; 275 uint32_t Reserved3_7 : 276 5; 277 uint32_t sesreqsucstschng : 278 1; 279 uint32_t hstnegsucstschng : 280 1; 281 uint32_t reserver10_16 : 282 7; 283 uint32_t hstnegdet : 284 1; 285 uint32_t adevtoutchng : 286 1; 287 uint32_t debdone : 288 1; 289 uint32_t Reserved31_20 : 290 12; 291 } 292 b; 293 } USB_OTG_GOTGINT_TypeDef ; 294 typedef union _USB_OTG_GAHBCFG_TypeDef 295 { 296 uint32_t d32; 297 struct 298 { 299 uint32_t glblintrmsk : 300 1; 301 uint32_t hburstlen : 302 4; 303 uint32_t dmaenable : 304 1; 305 uint32_t Reserved : 306 1; 307 uint32_t nptxfemplvl_txfemplvl : 308 1; 309 uint32_t ptxfemplvl : 310 1; 311 uint32_t Reserved9_31 : 312 23; 313 } 314 b; 315 } USB_OTG_GAHBCFG_TypeDef ; 316 typedef union _USB_OTG_GUSBCFG_TypeDef 317 { 318 uint32_t d32; 319 struct 320 { 321 uint32_t toutcal : 322 3; 323 uint32_t phyif : 324 1; 325 uint32_t ulpi_utmi_sel : 326 1; 327 uint32_t fsintf : 328 1; 329 uint32_t physel : 330 1; 331 uint32_t ddrsel : 332 1; 333 uint32_t srpcap : 334 1; 335 uint32_t hnpcap : 336 1; 337 uint32_t usbtrdtim : 338 4; 339 uint32_t nptxfrwnden : 340 1; 341 uint32_t phylpwrclksel : 342 1; 343 uint32_t otgutmifssel : 344 1; 345 uint32_t ulpi_fsls : 346 1; 347 uint32_t ulpi_auto_res : 348 1; 349 uint32_t ulpi_clk_sus_m : 350 1; 351 uint32_t ulpi_ext_vbus_drv : 352 1; 353 uint32_t ulpi_int_vbus_indicator : 354 1; 355 uint32_t term_sel_dl_pulse : 356 1; 357 uint32_t Reserved : 358 6; 359 uint32_t force_host : 360 1; 361 uint32_t force_dev : 362 1; 363 uint32_t corrupt_tx : 364 1; 365 } 366 b; 367 } USB_OTG_GUSBCFG_TypeDef ; 368 typedef union _USB_OTG_GRSTCTL_TypeDef 369 { 370 uint32_t d32; 371 struct 372 { 373 uint32_t csftrst : 374 1; 375 uint32_t hsftrst : 376 1; 377 uint32_t hstfrm : 378 1; 379 uint32_t intknqflsh : 380 1; 381 uint32_t rxfflsh : 382 1; 383 uint32_t txfflsh : 384 1; 385 uint32_t txfnum : 386 5; 387 uint32_t Reserved11_29 : 388 19; 389 uint32_t dmareq : 390 1; 391 uint32_t ahbidle : 392 1; 393 } 394 b; 395 } USB_OTG_GRSTCTL_TypeDef ; 396 typedef union _USB_OTG_GINTMSK_TypeDef 397 { 398 uint32_t d32; 399 struct 400 { 401 uint32_t Reserved0 : 402 1; 403 uint32_t modemismatch : 404 1; 405 uint32_t otgintr : 406 1; 407 uint32_t sofintr : 408 1; 409 uint32_t rxstsqlvl : 410 1; 411 uint32_t nptxfempty : 412 1; 413 uint32_t ginnakeff : 414 1; 415 uint32_t goutnakeff : 416 1; 417 uint32_t Reserved8 : 418 1; 419 uint32_t i2cintr : 420 1; 421 uint32_t erlysuspend : 422 1; 423 uint32_t usbsuspend : 424 1; 425 uint32_t usbreset : 426 1; 427 uint32_t enumdone : 428 1; 429 uint32_t isooutdrop : 430 1; 431 uint32_t eopframe : 432 1; 433 uint32_t Reserved16 : 434 1; 435 uint32_t epmismatch : 436 1; 437 uint32_t inepintr : 438 1; 439 uint32_t outepintr : 440 1; 441 uint32_t incomplisoin : 442 1; 443 uint32_t incomplisoout : 444 1; 445 uint32_t Reserved22_23 : 446 2; 447 uint32_t portintr : 448 1; 449 uint32_t hcintr : 450 1; 451 uint32_t ptxfempty : 452 1; 453 uint32_t Reserved27 : 454 1; 455 uint32_t conidstschng : 456 1; 457 uint32_t disconnect : 458 1; 459 uint32_t sessreqintr : 460 1; 461 uint32_t wkupintr : 462 1; 463 } 464 b; 465 } USB_OTG_GINTMSK_TypeDef ; 466 typedef union _USB_OTG_GINTSTS_TypeDef 467 { 468 uint32_t d32; 469 struct 470 { 471 uint32_t curmode : 472 1; 473 uint32_t modemismatch : 474 1; 475 uint32_t otgintr : 476 1; 477 uint32_t sofintr : 478 1; 479 uint32_t rxstsqlvl : 480 1; 481 uint32_t nptxfempty : 482 1; 483 uint32_t ginnakeff : 484 1; 485 uint32_t goutnakeff : 486 1; 487 uint32_t Reserved8 : 488 1; 489 uint32_t i2cintr : 490 1; 491 uint32_t erlysuspend : 492 1; 493 uint32_t usbsuspend : 494 1; 495 uint32_t usbreset : 496 1; 497 uint32_t enumdone : 498 1; 499 uint32_t isooutdrop : 500 1; 501 uint32_t eopframe : 502 1; 503 uint32_t intimerrx : 504 1; 505 uint32_t epmismatch : 506 1; 507 uint32_t inepint: 508 1; 509 uint32_t outepintr : 510 1; 511 uint32_t incomplisoin : 512 1; 513 uint32_t incomplisoout : 514 1; 515 uint32_t Reserved22_23 : 516 2; 517 uint32_t portintr : 518 1; 519 uint32_t hcintr : 520 1; 521 uint32_t ptxfempty : 522 1; 523 uint32_t Reserved27 : 524 1; 525 uint32_t conidstschng : 526 1; 527 uint32_t disconnect : 528 1; 529 uint32_t sessreqintr : 530 1; 531 uint32_t wkupintr : 532 1; 533 } 534 b; 535 } USB_OTG_GINTSTS_TypeDef ; 536 typedef union _USB_OTG_DRXSTS_TypeDef 537 { 538 uint32_t d32; 539 struct 540 { 541 uint32_t epnum : 542 4; 543 uint32_t bcnt : 544 11; 545 uint32_t dpid : 546 2; 547 uint32_t pktsts : 548 4; 549 uint32_t fn : 550 4; 551 uint32_t Reserved : 552 7; 553 } 554 b; 555 } USB_OTG_DRXSTS_TypeDef ; 556 typedef union _USB_OTG_GRXSTS_TypeDef 557 { 558 uint32_t d32; 559 struct 560 { 561 uint32_t chnum : 562 4; 563 uint32_t bcnt : 564 11; 565 uint32_t dpid : 566 2; 567 uint32_t pktsts : 568 4; 569 uint32_t Reserved : 570 11; 571 } 572 b; 573 } USB_OTG_GRXFSTS_TypeDef ; 574 typedef union _USB_OTG_FSIZ_TypeDef 575 { 576 uint32_t d32; 577 struct 578 { 579 uint32_t startaddr : 580 16; 581 uint32_t depth : 582 16; 583 } 584 b; 585 } USB_OTG_FSIZ_TypeDef ; 586 typedef union _USB_OTG_HNPTXSTS_TypeDef 587 { 588 uint32_t d32; 589 struct 590 { 591 uint32_t nptxfspcavail : 592 16; 593 uint32_t nptxqspcavail : 594 8; 595 uint32_t nptxqtop_terminate : 596 1; 597 uint32_t nptxqtop_timer : 598 2; 599 uint32_t nptxqtop : 600 2; 601 uint32_t chnum : 602 2; 603 uint32_t Reserved : 604 1; 605 } 606 b; 607 } USB_OTG_HNPTXSTS_TypeDef ; 608 typedef union _USB_OTG_DTXFSTSn_TypeDef 609 { 610 uint32_t d32; 611 struct 612 { 613 uint32_t txfspcavail : 614 16; 615 uint32_t Reserved : 616 16; 617 } 618 b; 619 } USB_OTG_DTXFSTSn_TypeDef ; 620 typedef union _USB_OTG_GI2CCTL_TypeDef 621 { 622 uint32_t d32; 623 struct 624 { 625 uint32_t rwdata : 626 8; 627 uint32_t regaddr : 628 8; 629 uint32_t addr : 630 7; 631 uint32_t i2cen : 632 1; 633 uint32_t ack : 634 1; 635 uint32_t i2csuspctl : 636 1; 637 uint32_t i2cdevaddr : 638 2; 639 uint32_t dat_se0: 640 1; 641 uint32_t Reserved : 642 1; 643 uint32_t rw : 644 1; 645 uint32_t bsydne : 646 1; 647 } 648 b; 649 } USB_OTG_GI2CCTL_TypeDef ; 650 typedef union _USB_OTG_GCCFG_TypeDef 651 { 652 uint32_t d32; 653 struct 654 { 655 uint32_t Reserved_in : 656 16; 657 uint32_t pwdn : 658 1; 659 uint32_t i2cifen : 660 1; 661 uint32_t vbussensingA : 662 1; 663 uint32_t vbussensingB : 664 1; 665 uint32_t sofouten : 666 1; 667 uint32_t disablevbussensing : 668 1; 669 uint32_t Reserved_out : 670 10; 671 } 672 b; 673 } USB_OTG_GCCFG_TypeDef ; 674 675 typedef union _USB_OTG_DCFG_TypeDef 676 { 677 uint32_t d32; 678 struct 679 { 680 uint32_t devspd : 681 2; 682 uint32_t nzstsouthshk : 683 1; 684 uint32_t Reserved3 : 685 1; 686 uint32_t devaddr : 687 7; 688 uint32_t perfrint : 689 2; 690 uint32_t Reserved13_17 : 691 5; 692 uint32_t epmscnt : 693 4; 694 } 695 b; 696 } USB_OTG_DCFG_TypeDef ; 697 typedef union _USB_OTG_DCTL_TypeDef 698 { 699 uint32_t d32; 700 struct 701 { 702 uint32_t rmtwkupsig : 703 1; 704 uint32_t sftdiscon : 705 1; 706 uint32_t gnpinnaksts : 707 1; 708 uint32_t goutnaksts : 709 1; 710 uint32_t tstctl : 711 3; 712 uint32_t sgnpinnak : 713 1; 714 uint32_t cgnpinnak : 715 1; 716 uint32_t sgoutnak : 717 1; 718 uint32_t cgoutnak : 719 1; 720 uint32_t Reserved : 721 21; 722 } 723 b; 724 } USB_OTG_DCTL_TypeDef ; 725 typedef union _USB_OTG_DSTS_TypeDef 726 { 727 uint32_t d32; 728 struct 729 { 730 uint32_t suspsts : 731 1; 732 uint32_t enumspd : 733 2; 734 uint32_t errticerr : 735 1; 736 uint32_t Reserved4_7: 737 4; 738 uint32_t soffn : 739 14; 740 uint32_t Reserved22_31 : 741 10; 742 } 743 b; 744 } USB_OTG_DSTS_TypeDef ; 745 typedef union _USB_OTG_DIEPINTn_TypeDef 746 { 747 uint32_t d32; 748 struct 749 { 750 uint32_t xfercompl : 751 1; 752 uint32_t epdisabled : 753 1; 754 uint32_t ahberr : 755 1; 756 uint32_t timeout : 757 1; 758 uint32_t intktxfemp : 759 1; 760 uint32_t intknepmis : 761 1; 762 uint32_t inepnakeff : 763 1; 764 uint32_t emptyintr : 765 1; 766 uint32_t txfifoundrn : 767 1; 768 uint32_t Reserved08_31 : 769 23; 770 } 771 b; 772 } USB_OTG_DIEPINTn_TypeDef ; 773 typedef union _USB_OTG_DIEPINTn_TypeDef USB_OTG_DIEPMSK_TypeDef ; 774 typedef union _USB_OTG_DOEPINTn_TypeDef 775 { 776 uint32_t d32; 777 struct 778 { 779 uint32_t xfercompl : 780 1; 781 uint32_t epdisabled : 782 1; 783 uint32_t ahberr : 784 1; 785 uint32_t setup : 786 1; 787 uint32_t Reserved04_31 : 788 28; 789 } 790 b; 791 } USB_OTG_DOEPINTn_TypeDef ; 792 typedef union _USB_OTG_DOEPINTn_TypeDef USB_OTG_DOEPMSK_TypeDef ; 793 794 typedef union _USB_OTG_DAINT_TypeDef 795 { 796 uint32_t d32; 797 struct 798 { 799 uint32_t in : 800 16; 801 uint32_t out : 802 16; 803 } 804 ep; 805 } USB_OTG_DAINT_TypeDef ; 806 807 typedef union _USB_OTG_DTHRCTL_TypeDef 808 { 809 uint32_t d32; 810 struct 811 { 812 uint32_t non_iso_thr_en : 813 1; 814 uint32_t iso_thr_en : 815 1; 816 uint32_t tx_thr_len : 817 9; 818 uint32_t Reserved11_15 : 819 5; 820 uint32_t rx_thr_en : 821 1; 822 uint32_t rx_thr_len : 823 9; 824 uint32_t Reserved26_31 : 825 6; 826 } 827 b; 828 } USB_OTG_DTHRCTL_TypeDef ; 829 typedef union _USB_OTG_DEPCTL_TypeDef 830 { 831 uint32_t d32; 832 struct 833 { 834 uint32_t mps : 835 11; 836 uint32_t reserved : 837 4; 838 uint32_t usbactep : 839 1; 840 uint32_t dpid : 841 1; 842 uint32_t naksts : 843 1; 844 uint32_t eptype : 845 2; 846 uint32_t snp : 847 1; 848 uint32_t stall : 849 1; 850 uint32_t txfnum : 851 4; 852 uint32_t cnak : 853 1; 854 uint32_t snak : 855 1; 856 uint32_t setd0pid : 857 1; 858 uint32_t setd1pid : 859 1; 860 uint32_t epdis : 861 1; 862 uint32_t epena : 863 1; 864 } 865 b; 866 } USB_OTG_DEPCTL_TypeDef ; 867 typedef union _USB_OTG_DEPXFRSIZ_TypeDef 868 { 869 uint32_t d32; 870 struct 871 { 872 uint32_t xfersize : 873 19; 874 uint32_t pktcnt : 875 10; 876 uint32_t mc : 877 2; 878 uint32_t Reserved : 879 1; 880 } 881 b; 882 } USB_OTG_DEPXFRSIZ_TypeDef ; 883 typedef union _USB_OTG_DEP0XFRSIZ_TypeDef 884 { 885 uint32_t d32; 886 struct 887 { 888 uint32_t xfersize : 889 7; 890 uint32_t Reserved7_18 : 891 12; 892 uint32_t pktcnt : 893 2; 894 uint32_t Reserved20_28 : 895 9; 896 uint32_t supcnt : 897 2; 898 uint32_t Reserved31; 899 } 900 b; 901 } USB_OTG_DEP0XFRSIZ_TypeDef ; 902 typedef union _USB_OTG_HCFG_TypeDef 903 { 904 uint32_t d32; 905 struct 906 { 907 uint32_t fslspclksel : 908 2; 909 uint32_t fslssupp : 910 1; 911 } 912 b; 913 } USB_OTG_HCFG_TypeDef ; 914 typedef union _USB_OTG_HFRMINTRVL_TypeDef 915 { 916 uint32_t d32; 917 struct 918 { 919 uint32_t frint : 920 16; 921 uint32_t Reserved : 922 16; 923 } 924 b; 925 } USB_OTG_HFRMINTRVL_TypeDef ; 926 927 typedef union _USB_OTG_HFNUM_TypeDef 928 { 929 uint32_t d32; 930 struct 931 { 932 uint32_t frnum : 933 16; 934 uint32_t frrem : 935 16; 936 } 937 b; 938 } USB_OTG_HFNUM_TypeDef ; 939 typedef union _USB_OTG_HPTXSTS_TypeDef 940 { 941 uint32_t d32; 942 struct 943 { 944 uint32_t ptxfspcavail : 945 16; 946 uint32_t ptxqspcavail : 947 8; 948 uint32_t ptxqtop_terminate : 949 1; 950 uint32_t ptxqtop_timer : 951 2; 952 uint32_t ptxqtop : 953 2; 954 uint32_t chnum : 955 2; 956 uint32_t ptxqtop_odd : 957 1; 958 } 959 b; 960 } USB_OTG_HPTXSTS_TypeDef ; 961 typedef union _USB_OTG_HPRT0_TypeDef 962 { 963 uint32_t d32; 964 struct 965 { 966 uint32_t prtconnsts : 967 1; 968 uint32_t prtconndet : 969 1; 970 uint32_t prtena : 971 1; 972 uint32_t prtenchng : 973 1; 974 uint32_t prtovrcurract : 975 1; 976 uint32_t prtovrcurrchng : 977 1; 978 uint32_t prtres : 979 1; 980 uint32_t prtsusp : 981 1; 982 uint32_t prtrst : 983 1; 984 uint32_t Reserved9 : 985 1; 986 uint32_t prtlnsts : 987 2; 988 uint32_t prtpwr : 989 1; 990 uint32_t prttstctl : 991 4; 992 uint32_t prtspd : 993 2; 994 uint32_t Reserved19_31 : 995 13; 996 } 997 b; 998 } USB_OTG_HPRT0_TypeDef ; 999 typedef union _USB_OTG_HAINT_TypeDef 1000 { 1001 uint32_t d32; 1002 struct 1003 { 1004 uint32_t chint : 1005 16; 1006 uint32_t Reserved : 1007 16; 1008 } 1009 b; 1010 } USB_OTG_HAINT_TypeDef ; 1011 typedef union _USB_OTG_HAINTMSK_TypeDef 1012 { 1013 uint32_t d32; 1014 struct 1015 { 1016 uint32_t chint : 1017 16; 1018 uint32_t Reserved : 1019 16; 1020 } 1021 b; 1022 } USB_OTG_HAINTMSK_TypeDef ; 1023 typedef union _USB_OTG_HCCHAR_TypeDef 1024 { 1025 uint32_t d32; 1026 struct 1027 { 1028 uint32_t mps : 1029 11; 1030 uint32_t epnum : 1031 4; 1032 uint32_t epdir : 1033 1; 1034 uint32_t Reserved : 1035 1; 1036 uint32_t lspddev : 1037 1; 1038 uint32_t eptype : 1039 2; 1040 uint32_t multicnt : 1041 2; 1042 uint32_t devaddr : 1043 7; 1044 uint32_t oddfrm : 1045 1; 1046 uint32_t chdis : 1047 1; 1048 uint32_t chen : 1049 1; 1050 } 1051 b; 1052 } USB_OTG_HCCHAR_TypeDef ; 1053 typedef union _USB_OTG_HCSPLT_TypeDef 1054 { 1055 uint32_t d32; 1056 struct 1057 { 1058 uint32_t prtaddr : 1059 7; 1060 uint32_t hubaddr : 1061 7; 1062 uint32_t xactpos : 1063 2; 1064 uint32_t compsplt : 1065 1; 1066 uint32_t Reserved : 1067 14; 1068 uint32_t spltena : 1069 1; 1070 } 1071 b; 1072 } USB_OTG_HCSPLT_TypeDef ; 1073 typedef union _USB_OTG_HCINTn_TypeDef 1074 { 1075 uint32_t d32; 1076 struct 1077 { 1078 uint32_t xfercompl : 1079 1; 1080 uint32_t chhltd : 1081 1; 1082 uint32_t ahberr : 1083 1; 1084 uint32_t stall : 1085 1; 1086 uint32_t nak : 1087 1; 1088 uint32_t ack : 1089 1; 1090 uint32_t nyet : 1091 1; 1092 uint32_t xacterr : 1093 1; 1094 uint32_t bblerr : 1095 1; 1096 uint32_t frmovrun : 1097 1; 1098 uint32_t datatglerr : 1099 1; 1100 uint32_t Reserved : 1101 21; 1102 } 1103 b; 1104 } USB_OTG_HCINTn_TypeDef ; 1105 typedef union _USB_OTG_HCTSIZn_TypeDef 1106 { 1107 uint32_t d32; 1108 struct 1109 { 1110 uint32_t xfersize : 1111 19; 1112 uint32_t pktcnt : 1113 10; 1114 uint32_t pid : 1115 2; 1116 uint32_t dopng : 1117 1; 1118 } 1119 b; 1120 } USB_OTG_HCTSIZn_TypeDef ; 1121 typedef union _USB_OTG_HCGINTMSK_TypeDef 1122 { 1123 uint32_t d32; 1124 struct 1125 { 1126 uint32_t xfercompl : 1127 1; 1128 uint32_t chhltd : 1129 1; 1130 uint32_t ahberr : 1131 1; 1132 uint32_t stall : 1133 1; 1134 uint32_t nak : 1135 1; 1136 uint32_t ack : 1137 1; 1138 uint32_t nyet : 1139 1; 1140 uint32_t xacterr : 1141 1; 1142 uint32_t bblerr : 1143 1; 1144 uint32_t frmovrun : 1145 1; 1146 uint32_t datatglerr : 1147 1; 1148 uint32_t Reserved : 1149 21; 1150 } 1151 b; 1152 } USB_OTG_HCGINTMSK_TypeDef ; 1153 typedef union _USB_OTG_PCGCCTL_TypeDef 1154 { 1155 uint32_t d32; 1156 struct 1157 { 1158 uint32_t stoppclk : 1159 1; 1160 uint32_t gatehclk : 1161 1; 1162 uint32_t Reserved : 1163 30; 1164 } 1165 b; 1166 } USB_OTG_PCGCCTL_TypeDef ; 1167 1168 /** 1169 * @} 1170 */ 1171 1172 1173 /** @defgroup USB_REGS_Exported_Macros 1174 * @{ 1175 */ 1176 /** 1177 * @} 1178 */ 1179 1180 /** @defgroup USB_REGS_Exported_Variables 1181 * @{ 1182 */ 1183 /** 1184 * @} 1185 */ 1186 1187 /** @defgroup USB_REGS_Exported_FunctionsPrototype 1188 * @{ 1189 */ 1190 /** 1191 * @} 1192 */ 1193 1194 1195 #endif //__USB_OTG_REGS_H__ 1196 1197 1198 /** 1199 * @} 1200 */ 1201 1202 /** 1203 * @} 1204 */ 1205 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 1206 1207