1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC5_CONTEXT_H
26 #define VC5_CONTEXT_H
27
28 #ifdef V3D_VERSION
29 #include "broadcom/common/v3d_macros.h"
30 #endif
31
32 #include <stdio.h>
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
38 #include "xf86drm.h"
39 #include "drm-uapi/v3d_drm.h"
40 #include "v3d_screen.h"
41 #include "broadcom/common/v3d_limits.h"
42
43 #include "broadcom/simulator/v3d_simulator.h"
44
45 struct v3d_job;
46 struct v3d_bo;
47 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
48
49 #include "v3d_bufmgr.h"
50 #include "v3d_resource.h"
51 #include "v3d_cl.h"
52
53 #ifdef USE_V3D_SIMULATOR
54 #define using_v3d_simulator true
55 #else
56 #define using_v3d_simulator false
57 #endif
58
59 #define VC5_DIRTY_BLEND (1ull << 0)
60 #define VC5_DIRTY_RASTERIZER (1ull << 1)
61 #define VC5_DIRTY_ZSA (1ull << 2)
62 #define VC5_DIRTY_COMPTEX (1ull << 3)
63 #define VC5_DIRTY_VERTTEX (1ull << 4)
64 #define VC5_DIRTY_GEOMTEX (1ull << 5)
65 #define VC5_DIRTY_FRAGTEX (1ull << 6)
66
67 #define VC5_DIRTY_SHADER_IMAGE (1ull << 9)
68 #define VC5_DIRTY_BLEND_COLOR (1ull << 10)
69 #define VC5_DIRTY_STENCIL_REF (1ull << 11)
70 #define VC5_DIRTY_SAMPLE_STATE (1ull << 12)
71 #define VC5_DIRTY_FRAMEBUFFER (1ull << 13)
72 #define VC5_DIRTY_STIPPLE (1ull << 14)
73 #define VC5_DIRTY_VIEWPORT (1ull << 15)
74 #define VC5_DIRTY_CONSTBUF (1ull << 16)
75 #define VC5_DIRTY_VTXSTATE (1ull << 17)
76 #define VC5_DIRTY_VTXBUF (1ull << 18)
77 #define VC5_DIRTY_SCISSOR (1ull << 19)
78 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1ull << 20)
79 #define VC5_DIRTY_PRIM_MODE (1ull << 21)
80 #define VC5_DIRTY_CLIP (1ull << 22)
81 #define VC5_DIRTY_UNCOMPILED_CS (1ull << 23)
82 #define VC5_DIRTY_UNCOMPILED_VS (1ull << 24)
83 #define VC5_DIRTY_UNCOMPILED_GS (1ull << 25)
84 #define VC5_DIRTY_UNCOMPILED_FS (1ull << 26)
85
86 #define VC5_DIRTY_COMPILED_CS (1ull << 29)
87 #define VC5_DIRTY_COMPILED_VS (1ull << 30)
88 #define VC5_DIRTY_COMPILED_GS_BIN (1ULL << 31)
89 #define VC5_DIRTY_COMPILED_GS (1ULL << 32)
90 #define VC5_DIRTY_COMPILED_FS (1ull << 33)
91
92 #define VC5_DIRTY_FS_INPUTS (1ull << 38)
93 #define VC5_DIRTY_GS_INPUTS (1ull << 39)
94 #define VC5_DIRTY_STREAMOUT (1ull << 40)
95 #define VC5_DIRTY_OQ (1ull << 41)
96 #define VC5_DIRTY_CENTROID_FLAGS (1ull << 42)
97 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1ull << 43)
98 #define VC5_DIRTY_SSBO (1ull << 44)
99
100 #define VC5_MAX_FS_INPUTS 64
101
102 enum v3d_sampler_state_variant {
103 V3D_SAMPLER_STATE_BORDER_0,
104 V3D_SAMPLER_STATE_F16,
105 V3D_SAMPLER_STATE_F16_UNORM,
106 V3D_SAMPLER_STATE_F16_SNORM,
107 V3D_SAMPLER_STATE_F16_BGRA,
108 V3D_SAMPLER_STATE_F16_BGRA_UNORM,
109 V3D_SAMPLER_STATE_F16_BGRA_SNORM,
110 V3D_SAMPLER_STATE_F16_A,
111 V3D_SAMPLER_STATE_F16_A_SNORM,
112 V3D_SAMPLER_STATE_F16_A_UNORM,
113 V3D_SAMPLER_STATE_F16_LA,
114 V3D_SAMPLER_STATE_F16_LA_UNORM,
115 V3D_SAMPLER_STATE_F16_LA_SNORM,
116 V3D_SAMPLER_STATE_32,
117 V3D_SAMPLER_STATE_32_UNORM,
118 V3D_SAMPLER_STATE_32_SNORM,
119 V3D_SAMPLER_STATE_32_A,
120 V3D_SAMPLER_STATE_32_A_UNORM,
121 V3D_SAMPLER_STATE_32_A_SNORM,
122 V3D_SAMPLER_STATE_1010102U,
123 V3D_SAMPLER_STATE_16U,
124 V3D_SAMPLER_STATE_16I,
125 V3D_SAMPLER_STATE_8I,
126 V3D_SAMPLER_STATE_8U,
127
128 V3D_SAMPLER_STATE_VARIANT_COUNT,
129 };
130
131 enum v3d_flush_cond {
132 /* Flush job unless we are flushing for transform feedback, where we
133 * handle flushing in the driver via the 'Wait for TF' packet.
134 */
135 V3D_FLUSH_DEFAULT,
136 /* Always flush the job, even for cases where we would normally not
137 * do it, such as transform feedback.
138 */
139 V3D_FLUSH_ALWAYS,
140 /* Flush job if it is not the current FBO job. This is intended to
141 * skip automatic flushes of the current job for resources that we
142 * expect to be externally synchronized by the application using
143 * glMemoryBarrier(), such as SSBOs and shader images.
144 */
145 V3D_FLUSH_NOT_CURRENT_JOB,
146 };
147
148 struct v3d_sampler_view {
149 struct pipe_sampler_view base;
150 uint32_t p0;
151 uint32_t p1;
152 /* Precomputed swizzles to pass in to the shader key. */
153 uint8_t swizzle[4];
154
155 uint8_t texture_shader_state[32];
156 /* V3D 4.x: Texture state struct. */
157 struct v3d_bo *bo;
158
159 enum v3d_sampler_state_variant sampler_variant;
160
161 /* Actual texture to be read by this sampler view. May be different
162 * from base.texture in the case of having a shadow tiled copy of a
163 * raster texture.
164 */
165 struct pipe_resource *texture;
166 };
167
168 struct v3d_sampler_state {
169 struct pipe_sampler_state base;
170 uint32_t p0;
171 uint32_t p1;
172
173 /* V3D 3.x: Packed texture state. */
174 uint8_t texture_shader_state[32];
175 /* V3D 4.x: Sampler state struct. */
176 struct pipe_resource *sampler_state;
177 uint32_t sampler_state_offset[V3D_SAMPLER_STATE_VARIANT_COUNT];
178
179 bool border_color_variants;
180 };
181
182 struct v3d_texture_stateobj {
183 struct pipe_sampler_view *textures[V3D_MAX_TEXTURE_SAMPLERS];
184 unsigned num_textures;
185 struct pipe_sampler_state *samplers[V3D_MAX_TEXTURE_SAMPLERS];
186 unsigned num_samplers;
187 struct v3d_cl_reloc texture_state[V3D_MAX_TEXTURE_SAMPLERS];
188 };
189
190 struct v3d_shader_uniform_info {
191 enum quniform_contents *contents;
192 uint32_t *data;
193 uint32_t count;
194 };
195
196 struct v3d_uncompiled_shader {
197 /** A name for this program, so you can track it in shader-db output. */
198 uint32_t program_id;
199 /** How many variants of this program were compiled, for shader-db. */
200 uint32_t compiled_variant_count;
201 struct pipe_shader_state base;
202 uint32_t num_tf_outputs;
203 struct v3d_varying_slot *tf_outputs;
204 uint16_t tf_specs[16];
205 uint16_t tf_specs_psiz[16];
206 uint32_t num_tf_specs;
207 };
208
209 struct v3d_compiled_shader {
210 struct pipe_resource *resource;
211 uint32_t offset;
212
213 union {
214 struct v3d_prog_data *base;
215 struct v3d_vs_prog_data *vs;
216 struct v3d_gs_prog_data *gs;
217 struct v3d_fs_prog_data *fs;
218 struct v3d_compute_prog_data *compute;
219 } prog_data;
220
221 /**
222 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
223 * uniforms have to be rewritten (and therefore the shader state
224 * reemitted).
225 */
226 uint64_t uniform_dirty_bits;
227 };
228
229 struct v3d_program_stateobj {
230 struct v3d_uncompiled_shader *bind_vs, *bind_gs, *bind_fs, *bind_compute;
231 struct v3d_compiled_shader *cs, *vs, *gs_bin, *gs, *fs, *compute;
232
233 struct hash_table *cache[MESA_SHADER_STAGES];
234
235 struct v3d_bo *spill_bo;
236 int spill_size_per_thread;
237 };
238
239 struct v3d_constbuf_stateobj {
240 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
241 uint32_t enabled_mask;
242 uint32_t dirty_mask;
243 };
244
245 struct v3d_vertexbuf_stateobj {
246 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
247 unsigned count;
248 uint32_t enabled_mask;
249 uint32_t dirty_mask;
250 };
251
252 struct v3d_vertex_stateobj {
253 struct pipe_vertex_element pipe[V3D_MAX_VS_INPUTS / 4];
254 unsigned num_elements;
255
256 uint8_t attrs[16 * (V3D_MAX_VS_INPUTS / 4)];
257 struct pipe_resource *defaults;
258 uint32_t defaults_offset;
259 };
260
261 struct v3d_stream_output_target {
262 struct pipe_stream_output_target base;
263 /* Number of transform feedback vertices written to this target */
264 uint32_t recorded_vertex_count;
265 };
266
267 struct v3d_streamout_stateobj {
268 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
269 /* Number of vertices we've written into the buffer so far. */
270 uint32_t offsets[PIPE_MAX_SO_BUFFERS];
271 unsigned num_targets;
272 };
273
274 struct v3d_ssbo_stateobj {
275 struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
276 uint32_t enabled_mask;
277 };
278
279 /* Hash table key for v3d->jobs */
280 struct v3d_job_key {
281 struct pipe_surface *cbufs[4];
282 struct pipe_surface *zsbuf;
283 };
284
285 enum v3d_ez_state {
286 VC5_EZ_UNDECIDED = 0,
287 VC5_EZ_GT_GE,
288 VC5_EZ_LT_LE,
289 VC5_EZ_DISABLED,
290 };
291
292 struct v3d_image_view {
293 struct pipe_image_view base;
294 /* V3D 4.x texture shader state struct */
295 struct pipe_resource *tex_state;
296 uint32_t tex_state_offset;
297 };
298
299 struct v3d_shaderimg_stateobj {
300 struct v3d_image_view si[PIPE_MAX_SHADER_IMAGES];
301 uint32_t enabled_mask;
302 };
303
304 /**
305 * A complete bin/render job.
306 *
307 * This is all of the state necessary to submit a bin/render to the kernel.
308 * We want to be able to have multiple in progress at a time, so that we don't
309 * need to flush an existing CL just to switch to rendering to a new render
310 * target (which would mean reading back from the old render target when
311 * starting to render to it again).
312 */
313 struct v3d_job {
314 struct v3d_context *v3d;
315 struct v3d_cl bcl;
316 struct v3d_cl rcl;
317 struct v3d_cl indirect;
318 struct v3d_bo *tile_alloc;
319 struct v3d_bo *tile_state;
320
321 struct drm_v3d_submit_cl submit;
322
323 /**
324 * Set of all BOs referenced by the job. This will be used for making
325 * the list of BOs that the kernel will need to have paged in to
326 * execute our job.
327 */
328 struct set *bos;
329
330 /** Sum of the sizes of the BOs referenced by the job. */
331 uint32_t referenced_size;
332
333 struct set *write_prscs;
334 struct set *tf_write_prscs;
335
336 /* Size of the submit.bo_handles array. */
337 uint32_t bo_handles_size;
338
339 /** @{ Surfaces to submit rendering for. */
340 struct pipe_surface *cbufs[4];
341 struct pipe_surface *zsbuf;
342 /** @} */
343 /** @{
344 * Bounding box of the scissor across all queued drawing.
345 *
346 * Note that the max values are exclusive.
347 */
348 uint32_t draw_min_x;
349 uint32_t draw_min_y;
350 uint32_t draw_max_x;
351 uint32_t draw_max_y;
352 /** @} */
353 /** @{
354 * Width/height of the color framebuffer being rendered to,
355 * for VC5_TILE_RENDERING_MODE_CONFIG.
356 */
357 uint32_t draw_width;
358 uint32_t draw_height;
359 uint32_t num_layers;
360
361 /** @} */
362 /** @{ Tile information, depending on MSAA and float color buffer. */
363 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
364 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
365
366 uint32_t tile_width; /** @< Width of a tile. */
367 uint32_t tile_height; /** @< Height of a tile. */
368 /** maximum internal_bpp of all color render targets. */
369 uint32_t internal_bpp;
370
371 /** Whether the current rendering is in a 4X MSAA tile buffer. */
372 bool msaa;
373 /** @} */
374
375 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
376 * first rendering.
377 */
378 uint32_t clear;
379 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
380 * call without having been cleared first.
381 */
382 uint32_t load;
383 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
384 * (either clears or draws) and should be stored.
385 */
386 uint32_t store;
387 uint32_t clear_color[4][4];
388 float clear_z;
389 uint8_t clear_s;
390
391 /**
392 * Set if some drawing (triangles, blits, or just a glClear()) has
393 * been done to the FBO, meaning that we need to
394 * DRM_IOCTL_VC5_SUBMIT_CL.
395 */
396 bool needs_flush;
397
398 /* Set if any shader has dirtied cachelines in the TMU that need to be
399 * flushed before job end.
400 */
401 bool tmu_dirty_rcl;
402
403 /**
404 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
405 */
406 bool tf_enabled;
407
408 /**
409 * Current EZ state for drawing. Updated at the start of draw after
410 * we've decided on the shader being rendered.
411 */
412 enum v3d_ez_state ez_state;
413 /**
414 * The first EZ state that was used for drawing with a decided EZ
415 * direction (so either UNDECIDED, GT, or LT).
416 */
417 enum v3d_ez_state first_ez_state;
418
419 /**
420 * Number of draw calls (not counting full buffer clears) queued in
421 * the current job.
422 */
423 uint32_t draw_calls_queued;
424
425 /**
426 * Number of draw calls (not counting full buffer clears) queued in
427 * the current job during active transform feedback.
428 */
429 uint32_t tf_draw_calls_queued;
430
431 struct v3d_job_key key;
432 };
433
434 struct v3d_context {
435 struct pipe_context base;
436
437 int fd;
438 struct v3d_screen *screen;
439
440 /** The 3D rendering job for the currently bound FBO. */
441 struct v3d_job *job;
442
443 /* Map from struct v3d_job_key to the job for that FBO.
444 */
445 struct hash_table *jobs;
446
447 /**
448 * Map from v3d_resource to a job writing to that resource.
449 *
450 * Primarily for flushing jobs rendering to textures that are now
451 * being read from.
452 */
453 struct hash_table *write_jobs;
454
455 struct slab_child_pool transfer_pool;
456 struct blitter_context *blitter;
457
458 /** bitfield of VC5_DIRTY_* */
459 uint64_t dirty;
460
461 struct primconvert_context *primconvert;
462
463 uint32_t next_uncompiled_program_id;
464 uint64_t next_compiled_program_id;
465
466 struct v3d_compiler_state *compiler_state;
467
468 uint8_t prim_mode;
469
470 /** Maximum index buffer valid for the current shader_rec. */
471 uint32_t max_index;
472
473 /** Sync object that our RCL or TFU job will update as its out_sync. */
474 uint32_t out_sync;
475
476 /* Stream uploader used by gallium internals. This could also be used
477 * by driver internals, but we tend to use the v3d_cl.h interfaces
478 * instead.
479 */
480 struct u_upload_mgr *uploader;
481 /* State uploader used inside the driver. This is for packing bits of
482 * long-term state inside buffers, since the kernel interfaces
483 * allocate a page at a time.
484 */
485 struct u_upload_mgr *state_uploader;
486
487 /** @{ Current pipeline state objects */
488 struct pipe_scissor_state scissor;
489 struct v3d_blend_state *blend;
490 struct v3d_rasterizer_state *rasterizer;
491 struct v3d_depth_stencil_alpha_state *zsa;
492
493 struct v3d_program_stateobj prog;
494 uint32_t compute_num_workgroups[3];
495 struct v3d_bo *compute_shared_memory;
496
497 struct v3d_vertex_stateobj *vtx;
498
499 struct {
500 struct pipe_blend_color f;
501 uint16_t hf[4];
502 } blend_color;
503 struct pipe_stencil_ref stencil_ref;
504 unsigned sample_mask;
505 struct pipe_framebuffer_state framebuffer;
506
507 /* Per render target, whether we should swap the R and B fields in the
508 * shader's color output and in blending. If render targets disagree
509 * on the R/B swap and use the constant color, then we would need to
510 * fall back to in-shader blending.
511 */
512 uint8_t swap_color_rb;
513
514 /* Per render target, whether we should treat the dst alpha values as
515 * one in blending.
516 *
517 * For RGBX formats, the tile buffer's alpha channel will be
518 * undefined.
519 */
520 uint8_t blend_dst_alpha_one;
521
522 bool active_queries;
523
524 /**
525 * If a compute job writes a resource read by a non-compute stage we
526 * should sync on the last compute job.
527 */
528 bool sync_on_last_compute_job;
529
530 uint32_t tf_prims_generated;
531 uint32_t prims_generated;
532
533 struct pipe_poly_stipple stipple;
534 struct pipe_clip_state clip;
535 struct pipe_viewport_state viewport;
536 struct v3d_ssbo_stateobj ssbo[PIPE_SHADER_TYPES];
537 struct v3d_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
538 struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
539 struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];
540 struct v3d_vertexbuf_stateobj vertexbuf;
541 struct v3d_streamout_stateobj streamout;
542 struct v3d_bo *current_oq;
543 struct pipe_resource *prim_counts;
544 uint32_t prim_counts_offset;
545 struct pipe_debug_callback debug;
546 /** @} */
547 };
548
549 struct v3d_rasterizer_state {
550 struct pipe_rasterizer_state base;
551
552 float point_size;
553
554 uint8_t depth_offset[9];
555 uint8_t depth_offset_z16[9];
556 };
557
558 struct v3d_depth_stencil_alpha_state {
559 struct pipe_depth_stencil_alpha_state base;
560
561 enum v3d_ez_state ez_state;
562
563 uint8_t stencil_front[6];
564 uint8_t stencil_back[6];
565 };
566
567 struct v3d_blend_state {
568 struct pipe_blend_state base;
569
570 /* Per-RT mask of whether blending is enabled. */
571 uint8_t blend_enables;
572 };
573
574 #define perf_debug(...) do { \
575 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
576 fprintf(stderr, __VA_ARGS__); \
577 if (unlikely(v3d->debug.debug_message)) \
578 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
579 } while (0)
580
581 #define foreach_bit(b, mask) \
582 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
583
584 static inline struct v3d_context *
v3d_context(struct pipe_context * pcontext)585 v3d_context(struct pipe_context *pcontext)
586 {
587 return (struct v3d_context *)pcontext;
588 }
589
590 static inline struct v3d_sampler_view *
v3d_sampler_view(struct pipe_sampler_view * psview)591 v3d_sampler_view(struct pipe_sampler_view *psview)
592 {
593 return (struct v3d_sampler_view *)psview;
594 }
595
596 static inline struct v3d_sampler_state *
v3d_sampler_state(struct pipe_sampler_state * psampler)597 v3d_sampler_state(struct pipe_sampler_state *psampler)
598 {
599 return (struct v3d_sampler_state *)psampler;
600 }
601
602 static inline struct v3d_stream_output_target *
v3d_stream_output_target(struct pipe_stream_output_target * ptarget)603 v3d_stream_output_target(struct pipe_stream_output_target *ptarget)
604 {
605 return (struct v3d_stream_output_target *)ptarget;
606 }
607
608 static inline uint32_t
v3d_stream_output_target_get_vertex_count(struct pipe_stream_output_target * ptarget)609 v3d_stream_output_target_get_vertex_count(struct pipe_stream_output_target *ptarget)
610 {
611 return v3d_stream_output_target(ptarget)->recorded_vertex_count;
612 }
613
614 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
615 void *priv, unsigned flags);
616 void v3d_program_init(struct pipe_context *pctx);
617 void v3d_program_fini(struct pipe_context *pctx);
618 void v3d_query_init(struct pipe_context *pctx);
619
620 static inline int
v3d_ioctl(int fd,unsigned long request,void * arg)621 v3d_ioctl(int fd, unsigned long request, void *arg)
622 {
623 if (using_v3d_simulator)
624 return v3d_simulator_ioctl(fd, request, arg);
625 else
626 return drmIoctl(fd, request, arg);
627 }
628
629 static inline bool
v3d_transform_feedback_enabled(struct v3d_context * v3d)630 v3d_transform_feedback_enabled(struct v3d_context *v3d)
631 {
632 return (v3d->prog.bind_vs->num_tf_specs != 0 ||
633 (v3d->prog.bind_gs && v3d->prog.bind_gs->num_tf_specs != 0)) &&
634 v3d->active_queries;
635 }
636
637 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
638 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
639 struct v3d_job *job,
640 struct v3d_compiled_shader *shader,
641 enum pipe_shader_type stage);
642
643 void v3d_flush(struct pipe_context *pctx);
644 void v3d_job_init(struct v3d_context *v3d);
645 struct v3d_job *v3d_job_create(struct v3d_context *v3d);
646 void v3d_job_free(struct v3d_context *v3d, struct v3d_job *job);
647 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
648 struct pipe_surface **cbufs,
649 struct pipe_surface *zsbuf);
650 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
651 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
652 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
653 void v3d_job_add_tf_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
654 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
655 void v3d_flush_jobs_using_bo(struct v3d_context *v3d, struct v3d_bo *bo);
656 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
657 struct pipe_resource *prsc,
658 enum v3d_flush_cond flush_cond,
659 bool is_compute_pipeline);
660 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
661 struct pipe_resource *prsc,
662 enum v3d_flush_cond flush_cond,
663 bool is_compute_pipeline);
664 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
665 void v3d_update_compiled_cs(struct v3d_context *v3d);
666
667 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
668 enum pipe_format f);
669 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
670 enum pipe_format f);
671 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
672 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
673 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
674 enum pipe_format f,
675 enum pipe_tex_compare compare);
676 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
677 enum pipe_format f);
678 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
679 enum pipe_format f);
680 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
681 uint32_t format,
682 uint32_t *type,
683 uint32_t *bpp);
684 bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,
685 uint32_t tex_format);
686
687 void v3d_init_query_functions(struct v3d_context *v3d);
688 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
689 void v3d_blitter_save(struct v3d_context *v3d);
690 bool v3d_generate_mipmap(struct pipe_context *pctx,
691 struct pipe_resource *prsc,
692 enum pipe_format format,
693 unsigned int base_level,
694 unsigned int last_level,
695 unsigned int first_layer,
696 unsigned int last_layer);
697
698 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
699
700 void v3d_update_primitive_counters(struct v3d_context *v3d);
701
702 bool v3d_line_smoothing_enabled(struct v3d_context *v3d);
703
704 float v3d_get_real_line_width(struct v3d_context *v3d);
705
706 #ifdef v3dX
707 # include "v3dx_context.h"
708 #else
709 # define v3dX(x) v3d33_##x
710 # include "v3dx_context.h"
711 # undef v3dX
712
713 # define v3dX(x) v3d41_##x
714 # include "v3dx_context.h"
715 # undef v3dX
716 #endif
717
718 #endif /* VC5_CONTEXT_H */
719