| /dports/math/openblas/OpenBLAS-0.3.18/kernel/x86_64/ |
| H A D | dcopy_bulldozer.S | 54 #define VLOAD(OFFSET, ADDR, REG) vmovups OFFSET(ADDR), REG macro
|
| /dports/java/openjdk11/jdk11u-jdk-11.0.13-8-1/test/jdk/lib/testlibrary/bytecode/jdk/experimental/bytecode/ |
| H A D | Opcode.java | 232 VLOAD(203), enumConstant
|
| /dports/java/openjdk13/jdk13u-jdk-13.0.10-1-1/test/jdk/lib/testlibrary/bytecode/jdk/experimental/bytecode/ |
| H A D | Opcode.java | 232 VLOAD(203), enumConstant
|
| /dports/java/openjdk12/openjdk-jdk12u-jdk-12.0.2-10-4/test/jdk/lib/testlibrary/bytecode/jdk/experimental/bytecode/ |
| H A D | Opcode.java | 232 VLOAD(203), enumConstant
|
| /dports/java/openjdk15/jdk15u-jdk-15.0.6-1-1/test/jdk/lib/testlibrary/bytecode/jdk/experimental/bytecode/ |
| H A D | Opcode.java | 232 VLOAD(203), enumConstant
|
| /dports/java/openjdk16/jdk16u-jdk-16.0.2-7-1/test/jdk/lib/testlibrary/bytecode/jdk/experimental/bytecode/ |
| H A D | Opcode.java | 232 VLOAD(203), enumConstant
|
| /dports/java/openjdk11-jre/jdk11u-jdk-11.0.13-8-1/test/jdk/lib/testlibrary/bytecode/jdk/experimental/bytecode/ |
| H A D | Opcode.java | 232 VLOAD(203), enumConstant
|
| /dports/java/openjdk14/jdk14u-jdk-14.0.2-12-1/test/jdk/lib/testlibrary/bytecode/jdk/experimental/bytecode/ |
| H A D | Opcode.java | 232 VLOAD(203), enumConstant
|
| /dports/java/openjdk17/jdk17u-jdk-17.0.1-12-1/test/jdk/lib/testlibrary/bytecode/jdk/experimental/bytecode/ |
| H A D | Opcode.java | 232 VLOAD(203), enumConstant
|
| /dports/lang/gcc6-aux/gcc-6-20180516/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 519 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/lang/gnat_util/gcc-6-20180516/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 519 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/lang/gcc10/gcc-10.3.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 588 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/lang/gcc11/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 521 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 582 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 582 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 582 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/lang/gcc9-aux/gcc-9.1.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 582 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/lang/gcc9-devel/gcc-9-20211007/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 586 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 582 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/lang/gcc11-devel/gcc-11-20211009/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 521 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/lang/gcc8/gcc-8.5.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 586 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/devel/riscv64-gcc/gcc-8.3.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 582 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/devel/avr-gcc/gcc-10.2.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 582 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/lang/gcc9/gcc-9.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 586 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|
| /dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | arm-neon-ref.h | 521 #define VLOAD(VAR, BUF, Q, T1, T2, W, N) \ macro
|