Home
last modified time | relevance | path

Searched defs:XCHAL_HAVE_ADDX (Results 26 – 50 of 318) sorted by relevance

12345678910>>...13

/dports/lang/gcc48/gcc-4.8.5/include/
H A Dxtensa-config.h41 #define XCHAL_HAVE_ADDX 1 macro
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/include/
H A Dxtensa-config.h41 #define XCHAL_HAVE_ADDX 1 macro
/dports/misc/cxx_atomics_pic/gcc-11.2.0/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/devel/avr-gcc/gcc-10.2.0/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/devel/riscv64-gcc/gcc-8.3.0/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/lang/gnat_util/gcc-6-20180516/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/lang/gcc11/gcc-11.2.0/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/lang/gcc10-devel/gcc-10-20211008/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/lang/gcc9/gcc-9.4.0/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/lang/gcc9-aux/gcc-9.1.0/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/devel/mingw32-gcc/gcc-4.8.1/include/
H A Dxtensa-config.h41 #define XCHAL_HAVE_ADDX 1 macro
/dports/devel/binutils/binutils-2.37/include/
H A Dxtensa-config.h40 #define XCHAL_HAVE_ADDX 1 macro
/dports/emulators/qemu-utils/qemu-4.2.1/target/xtensa/core-fsf/
H A Dcore-isa.h46 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/emulators/qemu5/qemu-5.2.0/target/xtensa/core-fsf/
H A Dcore-isa.h46 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/xtensa/core-fsf/
H A Dcore-isa.h46 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/xtensa/core-fsf/
H A Dcore-isa.h46 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h47 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h47 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/emulators/qemu42/qemu-4.2.1/target/xtensa/core-fsf/
H A Dcore-isa.h46 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h47 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/xtensa/core-fsf/
H A Dcore-isa.h46 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/emulators/qemu/qemu-6.2.0/target/xtensa/core-fsf/
H A Dcore-isa.h46 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/emulators/qemu60/qemu-6.0.0/target/xtensa/core-fsf/
H A Dcore-isa.h46 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h47 #define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ macro

12345678910>>...13