1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _CCU_MULT_H_
3 #define _CCU_MULT_H_
4
5 #include "ccu_common.h"
6 #include "ccu_frac.h"
7 #include "ccu_mux.h"
8
9 struct ccu_mult_internal {
10 u8 offset;
11 u8 shift;
12 u8 width;
13 u8 min;
14 u8 max;
15 };
16
17 #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \
18 { \
19 .min = _min, \
20 .max = _max, \
21 .offset = _offset, \
22 .shift = _shift, \
23 .width = _width, \
24 }
25
26 #define _SUNXI_CCU_MULT_MIN(_shift, _width, _min) \
27 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, _min, 0)
28
29 #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \
30 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
31
32 #define _SUNXI_CCU_MULT(_shift, _width) \
33 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, 1, 0)
34
35 struct ccu_mult {
36 u32 enable;
37 u32 lock;
38
39 struct ccu_frac_internal frac;
40 struct ccu_mult_internal mult;
41 struct ccu_mux_internal mux;
42 struct ccu_common common;
43 };
44
45 #define SUNXI_CCU_N_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
46 _mshift, _mwidth, _gate, _lock, \
47 _flags) \
48 struct ccu_mult _struct = { \
49 .enable = _gate, \
50 .lock = _lock, \
51 .mult = _SUNXI_CCU_MULT(_mshift, _mwidth), \
52 .common = { \
53 .reg = _reg, \
54 .hw.init = CLK_HW_INIT(_name, \
55 _parent, \
56 &ccu_mult_ops, \
57 _flags), \
58 }, \
59 }
60
hw_to_ccu_mult(struct clk_hw * hw)61 static inline struct ccu_mult *hw_to_ccu_mult(struct clk_hw *hw)
62 {
63 struct ccu_common *common = hw_to_ccu_common(hw);
64
65 return container_of(common, struct ccu_mult, common);
66 }
67
68 extern const struct clk_ops ccu_mult_ops;
69
70 #endif /* _CCU_MULT_H_ */
71