xref: /dragonfly/sys/dev/netif/ae/if_aevar.h (revision 26595b18)
1 /*-
2  * Copyright (c) 2008 Stanislav Sedov <stas@FreeBSD.org>.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  *
25  * $FreeBSD: src/sys/dev/ae/if_aevar.h,v 1.1.2.1.4.1 2009/04/15 03:14:26 kensmith Exp $
26  */
27 
28 #ifndef IF_AEVAR_H
29 #define IF_AEVAR_H
30 
31 /*
32  * Supported chips identifiers.
33 */
34 #define	VENDORID_ATTANSIC	0x1969
35 #define	DEVICEID_ATTANSIC_L2	0x2048
36 
37 /* How much to wait for reset to complete (10 microsecond units). */
38 #define	AE_RESET_TIMEOUT	100
39 
40 /* How much to wait for device to enter idle state (100 microsecond units). */
41 #define	AE_IDLE_TIMEOUT		100
42 
43 /* How much to wait for MDIO to do the work (2 microsecond units). */
44 #define	AE_MDIO_TIMEOUT		10
45 
46 /* How much to wait for VPD reading operation to complete (2 ms units). */
47 #define AE_VPD_TIMEOUT		10
48 
49 /* How much to wait for send operation to complete (HZ units). */
50 #define	AE_TX_TIMEOUT		5
51 
52 /* Default PHY address. */
53 #define	AE_PHYADDR_DEFAULT	0
54 
55 /* Tx packet descriptor header format. */
56 struct ae_txd {
57 	uint16_t	len;
58 	uint16_t	vlan;
59 } __packed;
60 
61 /* Tx status descriptor format. */
62 struct ae_txs {
63 	uint16_t	len;
64 	uint16_t	flags;
65 } __packed;
66 
67 /* Rx packet descriptor format. */
68 struct ae_rxd {
69 	uint16_t	len;
70 	uint16_t	flags;
71 	uint16_t	vlan;
72 	uint16_t	__pad;
73 	uint8_t		data[1528];
74 } __packed;
75 
76 /* Statistics. */
77 struct ae_stats {
78 	uint32_t	rx_bcast;
79 	uint32_t	rx_mcast;
80 	uint32_t	rx_pause;
81 	uint32_t	rx_ctrl;
82 	uint32_t	rx_crcerr;
83 	uint32_t	rx_codeerr;
84 	uint32_t	rx_runt;
85 	uint32_t	rx_frag;
86 	uint32_t	rx_trunc;
87 	uint32_t	rx_align;
88 	uint32_t	tx_bcast;
89 	uint32_t	tx_mcast;
90 	uint32_t	tx_pause;
91 	uint32_t	tx_ctrl;
92 	uint32_t	tx_defer;
93 	uint32_t	tx_excdefer;
94 	uint32_t	tx_singlecol;
95 	uint32_t	tx_multicol;
96 	uint32_t	tx_latecol;
97 	uint32_t	tx_abortcol;
98 	uint32_t	tx_underrun;
99 };
100 
101 /* Software state structure. */
102 struct ae_softc	{
103 	struct arpcom		arpcom;
104 	device_t		ae_dev;
105 
106 	int			ae_mem_rid;
107 	struct resource		*ae_mem_res;
108         bus_space_tag_t		ae_mem_bt;
109         bus_space_handle_t	ae_mem_bh;
110 
111 	int			ae_irq_rid;
112 	struct resource		*ae_irq_res;
113 	void			*ae_irq_handle;
114 
115 	int			ae_phyaddr;
116 	device_t                ae_miibus;
117 
118 	int			ae_rev;
119 	int			ae_chip_rev;
120 	uint8_t			ae_eaddr[ETHER_ADDR_LEN];
121 	uint8_t			ae_flags;
122 	int			ae_if_flags;
123 
124 	struct callout		ae_tick_ch;
125 
126 	/* DMA tags. */
127 	bus_dma_tag_t		dma_parent_tag;
128 	bus_dma_tag_t		dma_rxd_tag;
129 	bus_dma_tag_t		dma_txd_tag;
130 	bus_dma_tag_t		dma_txs_tag;
131 	bus_dmamap_t		dma_rxd_map;
132 	bus_dmamap_t		dma_txd_map;
133 	bus_dmamap_t		dma_txs_map;
134 
135 	bus_addr_t		dma_rxd_busaddr;
136 	bus_addr_t		dma_txd_busaddr;
137 	bus_addr_t		dma_txs_busaddr;
138 
139 	uint8_t			*rxd_base_dma;	/* Start of allocated area. */
140 	struct ae_rxd		*rxd_base;	/* Start of RxD ring. */
141 	uint8_t			*txd_base;	/* Start of TxD ring. */
142 	struct ae_txs		*txs_base;	/* Start of TxS ring. */
143 
144 	/* Ring pointers. */
145 	unsigned int		rxd_cur;
146 	unsigned int		txd_cur;
147 	unsigned int		txs_cur;
148 	unsigned int		txs_ack;
149 	unsigned int		txd_ack;
150 
151 	int			tx_inproc;	/* Active Tx frames in ring. */
152 	int			wd_timer;	/* XXX remove */
153 
154 	struct ae_stats		stats;
155 };
156 
157 #define	BUS_ADDR_LO(x)		((uint64_t) (x) & 0xFFFFFFFF)
158 #define	BUS_ADDR_HI(x)		((uint64_t) (x) >> 32)
159 
160 #define	AE_FLAG_LINK		0x01	/* Has link. */
161 #define	AE_FLAG_DETACH		0x02	/* Is detaching. */
162 #define	AE_FLAG_TXAVAIL		0x04	/* Tx'es available. */
163 #define	AE_FLAG_MSI		0x08	/* Using MSI. */
164 #define	AE_FLAG_PMG		0x10	/* Supports PCI power management. */
165 
166 #endif	/* IF_AEVAR_H */
167