1 /* $OpenBSD: bwx.h,v 1.7 2014/03/29 18:09:28 guenther Exp $ */
2 /* $NetBSD: bwx.h,v 1.3 2000/06/08 02:55:37 thorpej Exp $ */
3
4 /*-
5 * Copyright (c) 1999 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 * NASA Ames Research Center.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef _MACHINE_BWX_H_
35 #define _MACHINE_BWX_H_
36
37 /*
38 * Alpha Byte/Word Extension instructions.
39 *
40 * These instructions are available on EV56 (21164A) and later processors.
41 *
42 * See "Alpha Architecture Handbook, Version 3", DEC order number EC-QD2KB-TE.
43 */
44
45 #define BWX_EV56_INT8 (0L << 37)
46 #define BWX_EV56_INT4 (1L << 37)
47 #define BWX_EV56_INT2 (2L << 37)
48 #define BWX_EV56_INT1 (3L << 37)
49
50 static __inline u_int8_t
alpha_ldbu(volatile u_int8_t * a0)51 alpha_ldbu(volatile u_int8_t *a0)
52 {
53 u_int8_t v0;
54
55 __asm volatile("ldbu %0, %1"
56 : "=r" (v0)
57 : "m" (*a0));
58
59 return (v0);
60 }
61
62 static __inline u_int16_t
alpha_ldwu(volatile u_int16_t * a0)63 alpha_ldwu(volatile u_int16_t *a0)
64 {
65 u_int16_t v0;
66
67 __asm volatile("ldwu %0, %1"
68 : "=r" (v0)
69 : "m" (*a0));
70
71 return (v0);
72 }
73
74 static __inline u_int32_t
alpha_ldlu(volatile u_int32_t * a0)75 alpha_ldlu(volatile u_int32_t *a0)
76 {
77 return (*a0);
78 }
79
80 static __inline void
alpha_stb(volatile u_int8_t * a0,u_int8_t a1)81 alpha_stb(volatile u_int8_t *a0, u_int8_t a1)
82 {
83
84 __asm volatile("stb %1, %0"
85 : "=m" (*a0)
86 : "r" (a1)
87 : "memory");
88 }
89
90 static __inline void
alpha_stw(volatile u_int16_t * a0,u_int16_t a1)91 alpha_stw(volatile u_int16_t *a0, u_int16_t a1)
92 {
93
94 __asm volatile("stw %1, %0"
95 : "=m" (*a0)
96 : "r" (a1)
97 : "memory");
98 }
99
100 static __inline void
alpha_stl(volatile u_int32_t * a0,u_int32_t a1)101 alpha_stl(volatile u_int32_t *a0, u_int32_t a1)
102 {
103
104 __asm volatile("stl %1, %0"
105 : "=m" (*a0)
106 : "r" (a1)
107 : "memory");
108 }
109
110 static __inline u_int8_t
alpha_sextb(u_int8_t a0)111 alpha_sextb(u_int8_t a0)
112 {
113 u_int8_t v0;
114
115 __asm volatile("sextb %1, %0"
116 : "=r" (v0)
117 : "r" (a0)
118 : "memory");
119
120 return (v0);
121 }
122
123 static __inline u_int16_t
alpha_sextw(u_int16_t a0)124 alpha_sextw(u_int16_t a0)
125 {
126 u_int16_t v0;
127
128 __asm volatile("sextw %1, %0"
129 : "=r" (v0)
130 : "r" (a0)
131 : "memory");
132
133 return (v0);
134 }
135
136 #endif /* _MACHINE_BWX_H_ */
137