xref: /openbsd/sys/arch/alpha/pci/pci_machdep.c (revision b27348b2)
1 /*	$OpenBSD: pci_machdep.c,v 1.21 2017/09/08 05:36:51 deraadt Exp $	*/
2 /*	$NetBSD: pci_machdep.c,v 1.7 1996/11/19 04:57:32 cgd Exp $	*/
3 
4 /*
5  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6  * All rights reserved.
7  *
8  * Author: Chris G. Demetriou
9  *
10  * Permission to use, copy, modify and distribute this software and
11  * its documentation is hereby granted, provided that both the copyright
12  * notice and this permission notice appear in all copies of the
13  * software, derivative works or modified versions, and any portions
14  * thereof, and that both notices appear in supporting documentation.
15  *
16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19  *
20  * Carnegie Mellon requests users of this software to return to
21  *
22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
23  *  School of Computer Science
24  *  Carnegie Mellon University
25  *  Pittsburgh PA 15213-3890
26  *
27  * any improvements or extensions that they make and grant Carnegie the
28  * rights to redistribute these changes.
29  */
30 
31 /*
32  * Machine-specific functions for PCI autoconfiguration.
33  */
34 
35 #include <sys/param.h>
36 #include <sys/time.h>
37 #include <sys/systm.h>
38 #include <sys/proc.h>
39 #include <sys/sysctl.h>
40 #include <sys/errno.h>
41 #include <sys/device.h>
42 #include <uvm/uvm_extern.h>
43 #include <machine/cpu.h>
44 
45 #include <dev/isa/isavar.h>
46 #include <dev/pci/pcireg.h>
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcidevs.h>
49 #include <dev/pci/ppbreg.h>
50 
51 #include "vga.h"
52 #if NVGA_PCI
53 #include <dev/pci/vga_pcivar.h>
54 #endif
55 
56 #include "tga.h"
57 #if NTGA
58 #include <dev/pci/tgavar.h>
59 #endif
60 
61 struct alpha_pci_chipset *alpha_pci_chipset;
62 
63 void
pci_display_console(iot,memt,pc,bus,device,function)64 pci_display_console(iot, memt, pc, bus, device, function)
65 	bus_space_tag_t iot, memt;
66 	pci_chipset_tag_t pc;
67 	int bus, device, function;
68 {
69 	pcitag_t tag;
70 	pcireg_t id, class;
71 	int match;
72 #if NVGA_PCI || NTGA
73 	int nmatch;
74 #endif
75 	int (*fn)(bus_space_tag_t, bus_space_tag_t, pci_chipset_tag_t,
76 	    int, int, int);
77 
78 	tag = pci_make_tag(pc, bus, device, function);
79 	id = pci_conf_read(pc, tag, PCI_ID_REG);
80 	if (id == 0 || id == 0xffffffff)
81 		panic("pci_display_console: no device at %d/%d/%d",
82 		    bus, device, function);
83 	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
84 
85 	match = 0;
86 	fn = NULL;
87 
88 #if NVGA_PCI
89 	nmatch = DEVICE_IS_VGA_PCI(class);
90 	if (nmatch > match) {
91 		match = nmatch;
92 		fn = vga_pci_cnattach;
93 	}
94 #endif
95 #if NTGA
96 	nmatch = DEVICE_IS_TGA(class, id);
97 	if (nmatch > match) {
98 		match = nmatch;
99 		fn = tga_cnattach;
100 	}
101 #endif
102 
103 	if (fn != NULL)
104 		(*fn)(iot, memt, pc, bus, device, function);
105 	else
106 		panic("pci_display_console: unconfigured device at %d/%d/%d",
107 		    bus, device, function);
108 }
109 
110 int
alpha_sysctl_chipset(int * name,u_int namelen,char * where,size_t * sizep)111 alpha_sysctl_chipset(int *name, u_int namelen, char *where, size_t *sizep)
112 {
113 	if (namelen != 1)
114 		return (ENOTDIR);
115 
116 	if (alpha_pci_chipset == NULL)
117 		return (EOPNOTSUPP);
118 
119 	switch (name[0]) {
120 	case CPU_CHIPSET_TYPE:
121 		return (sysctl_rdstring(where, sizep, NULL,
122 		    alpha_pci_chipset->pc_name));
123 	case CPU_CHIPSET_BWX:
124 		return (sysctl_rdint(where, sizep, NULL,
125 		    alpha_pci_chipset->pc_bwx));
126 	case CPU_CHIPSET_MEM:
127 		return (sysctl_rdquad(where, sizep, NULL,
128 		    alpha_pci_chipset->pc_mem));
129 	case CPU_CHIPSET_DENSE:
130 		return (sysctl_rdquad(where, sizep, NULL,
131 		    alpha_pci_chipset->pc_dense));
132 	case CPU_CHIPSET_PORTS:
133 		return (sysctl_rdquad(where, sizep, NULL,
134 		    alpha_pci_chipset->pc_ports));
135 	case CPU_CHIPSET_HAE_MASK:
136 		return (sysctl_rdquad(where, sizep, NULL,
137 		    alpha_pci_chipset->pc_hae_mask));
138 	default:
139 		return (EOPNOTSUPP);
140 	}
141 	/* NOTREACHED */
142 }
143 
144 int
pci_intr_map(struct pci_attach_args * pa,pci_intr_handle_t * ihp)145 pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
146 {
147 	if (pa->pa_intrpin == 0)	/* No IRQ used. */
148 		return 1;
149 
150 	if (!(1 <= pa->pa_intrpin && pa->pa_intrpin <= 4))
151 		return 1;
152 
153 	return (*(pa->pa_pc)->pc_intr_map)(pa, ihp);
154 }
155