1library IEEE;
2use IEEE.std_logic_1164.all;
3
4entity sqrt32 is
5  port ( P : in  std_logic_vector(31 downto 0);
6         U : out std_logic_vector(15 downto 0));
7end sqrt32;
8
9architecture circuits of sqrt32 is
10
11component S0
12  port ( x  : in  std_logic;
13         u  : in  std_logic;
14         d  : out std_logic;
15         bo : out std_logic);
16end component;
17component S0b
18  port ( x  : in  std_logic;
19         bo : out std_logic);
20end component;
21component S1  -- subtractor multiplexor
22  port ( x  : in  std_logic;
23         b  : in  std_logic;
24         u  : in  std_logic;
25         d  : out std_logic;
26         bo : out std_logic);
27end component;
28component S1b
29  port ( x  : in  std_logic;
30         b  : in  std_logic;
31         bo : out std_logic);
32end component;
33component Sb
34  port ( x  : in  std_logic;
35         y  : in  std_logic;
36         b  : in  std_logic;
37         bo : out std_logic);
38end component;
39component Sm  -- subtractor multiplexor
40  port ( x  : in  std_logic;
41         y  : in  std_logic;
42         b  : in  std_logic;
43         u  : in  std_logic;
44         d  : out std_logic;
45         bo : out std_logic);
46end component;
47component Sn  -- subtractor multiplexor
48  port ( x  : in  std_logic;
49         b  : in  std_logic;
50         bo : out std_logic);
51end component;
52  signal b0000, b0001, b0002, b0003, b0004, b0005, b0006, b0007, b0008,
53         b0009, b0010, b0011, b0012, b0013, b0014, b0015, b0016,
54         b0017 : std_logic;
55  signal x0102, x0103, x0104, x0105, x0106, x0107, x0108, x0109, x0110,
56         x0111, x0112, x0113, x0114, x0115, x0116, x0117 : std_logic;
57  signal b0102, b0103, b0104, b0105, b0106, b0107, b0108, b0109, b0110,
58         b0111, b0112, b0113, b0114, b0115, b0116, b0117, b0118 : std_logic;
59  signal x0204, x0205, x0206, x0207, x0208, x0209, x0210, x0211, x0212,
60         x0213, x0214, x0215, x0216, x0217, x0218 : std_logic;
61  signal b0204, b0205, b0206, b0207, b0208, b0209, b0210, b0211, b0212,
62         b0213, b0214, b0215, b0216, b0217, b0218, b0219 : std_logic;
63  signal x0306, x0307, x0308, x0309, x0310, x0311, x0312, x0313, x0314,
64         x0315, x0316, x0317, x0318, x0319 : std_logic;
65  signal b0306, b0307, b0308, b0309, b0310, b0311, b0312, b0313, b0314,
66         b0315, b0316, b0317, b0318, b0319, b0320 : std_logic;
67  signal x0408, x0409, x0410, x0411, x0412, x0413, x0414, x0415, x0416,
68         x0417, x0418, x0419, x0420 : std_logic;
69  signal b0408, b0409, b0410, b0411, b0412, b0413, b0414, b0415, b0416,
70         b0417, b0418, b0419, b0420, b0421 : std_logic;
71  signal x0510, x0511, x0512, x0513, x0514, x0515, x0516, x0517, x0518,
72         x0519, x0520, x0521 : std_logic;
73  signal b0510, b0511, b0512, b0513, b0514, b0515, b0516, b0517, b0518,
74         b0519, b0520, b0521, b0522 : std_logic;
75  signal x0612, x0613, x0614, x0615, x0616, x0617, x0618, x0619, x0620,
76         x0621, x0622 : std_logic;
77  signal b0612, b0613, b0614, b0615, b0616, b0617, b0618, b0619, b0620,
78         b0621, b0622, b0623 : std_logic;
79  signal x0714, x0715, x0716, x0717, x0718, x0719, x0720, x0721, x0722,
80         x0723 : std_logic;
81  signal b0714, b0715, b0716, b0717, b0718, b0719, b0720, b0721, b0722,
82         b0723, b0724 : std_logic;
83  signal x0816, x0817, x0818, x0819, x0820, x0821, x0822, x0823,
84         x0824 : std_logic;
85  signal b0816, b0817, b0818, b0819, b0820, b0821, b0822, b0823,
86         b0824, b0825 : std_logic;
87  signal x0918, x0919, x0920, x0921, x0922, x0923, x0924, x0925 : std_logic;
88  signal b0918, b0919, b0920, b0921, b0922, b0923, b0924, b0925,
89         b0926 : std_logic;
90  signal x1020, x1021, x1022, x1023, x1024, x1025, x1026 : std_logic;
91  signal b1020, b1021, b1022, b1023, b1024, b1025, b1026, b1027 : std_logic;
92  signal x1122, x1123, x1124, x1125, x1126, x1127 : std_logic;
93  signal b1122, b1123, b1124, b1125, b1126, b1127, b1128 : std_logic;
94  signal x1224, x1225, x1226, x1227, x1228 : std_logic;
95  signal b1224, b1225, b1226, b1227, b1228, b1229 : std_logic;
96  signal x1326, x1327, x1328, x1329 : std_logic;
97  signal b1326, b1327, b1328, b1329, b1330 : std_logic;
98  signal x1428, x1429, x1430 : std_logic;
99  signal b1428, b1429, b1430, b1431 : std_logic;
100  signal x1530, x1531 : std_logic;
101  signal b1530, b1531, bxx : std_logic;
102begin  -- circuits of sqrt32
103  --                              x      y      b      u      d      bo
104  s1530: S0  port map(P(30),               b1531, x1530, b1530);
105  s1531: S1  port map(P(31),        b1530, b1531, x1531, bxx );
106  b1531 <= not bxx;
107
108  s1428: S0  port map(P(28),               b1431, x1428, b1428);
109  s1429: S1  port map(P(29),        b1428, b1431, x1429, b1429);
110  s1430: Sm  port map(x1530, b1531, b1429, b1431, x1430, b1430);
111  s1431: Sn  port map(x1531,        b1430,               b1431);
112
113  s1326: S0  port map(P(26),               b1330, x1326, b1326);
114  s1327: S1  port map(P(27),        b1326, b1330, x1327, b1327);
115  s1328: Sm  port map(x1428, b1431, b1327, b1330, x1328, b1328);
116  s1329: Sm  port map(x1429, b1531, b1328, b1330, x1329, b1329);
117  s1330: Sn  port map(x1430,        b1329,               b1330);
118
119  s1224: S0  port map(P(24),               b1229, x1224, b1224);
120  s1225: S1  port map(P(25),        b1224, b1229, x1225, b1225);
121  s1226: Sm  port map(x1326, b1330, b1225, b1229, x1226, b1226);
122  s1227: Sm  port map(x1327, b1431, b1226, b1229, x1227, b1227);
123  s1228: Sm  port map(x1328, b1531, b1227, b1229, x1228, b1228);
124  s1229: Sn  port map(x1329,        b1228,               b1229);
125
126  s1122: S0  port map(P(22),               b1128, x1122, b1122);
127  s1123: S1  port map(P(23),        b1122, b1128, x1123, b1123);
128  s1124: Sm  port map(x1224, b1229, b1123, b1128, x1124, b1124);
129  s1125: Sm  port map(x1225, b1330, b1124, b1128, x1125, b1125);
130  s1126: Sm  port map(x1226, b1431, b1125, b1128, x1126, b1126);
131  s1127: Sm  port map(x1227, b1531, b1126, b1128, x1127, b1127);
132  s1128: Sn  port map(x1228,        b1127,               b1128);
133
134  s1020: S0  port map(P(20),               b1027, x1020, b1020);
135  s1021: S1  port map(P(21),        b1020, b1027, x1021, b1021);
136  s1022: Sm  port map(x1122, b1128, b1021, b1027, x1022, b1022);
137  s1023: Sm  port map(x1123, b1229, b1022, b1027, x1023, b1023);
138  s1024: Sm  port map(x1124, b1330, b1023, b1027, x1024, b1024);
139  s1025: Sm  port map(x1125, b1431, b1024, b1027, x1025, b1025);
140  s1026: Sm  port map(x1126, b1531, b1025, b1027, x1026, b1026);
141  s1027: Sn  port map(x1127,        b1026,               b1027);
142
143  s0918: S0  port map(P(18),               b0926, x0918, b0918);
144  s0919: S1  port map(P(19),        b0918, b0926, x0919, b0919);
145  s0920: Sm  port map(x1020, b1027, b0919, b0926, x0920, b0920);
146  s0921: Sm  port map(x1021, b1128, b0920, b0926, x0921, b0921);
147  s0922: Sm  port map(x1022, b1229, b0921, b0926, x0922, b0922);
148  s0923: Sm  port map(x1023, b1330, b0922, b0926, x0923, b0923);
149  s0924: Sm  port map(x1024, b1431, b0923, b0926, x0924, b0924);
150  s0925: Sm  port map(x1025, b1531, b0924, b0926, x0925, b0925);
151  s0926: Sn  port map(x1026,        b0925,               b0926);
152
153  s0816: S0  port map(P(16),               b0825, x0816, b0816);
154  s0817: S1  port map(P(17),        b0816, b0825, x0817, b0817);
155  s0818: Sm  port map(x0918, b0926, b0817, b0825, x0818, b0818);
156  s0819: Sm  port map(x0919, b1027, b0818, b0825, x0819, b0819);
157  s0820: Sm  port map(x0920, b1128, b0819, b0825, x0820, b0820);
158  s0821: Sm  port map(x0921, b1229, b0820, b0825, x0821, b0821);
159  s0822: Sm  port map(x0922, b1330, b0821, b0825, x0822, b0822);
160  s0823: Sm  port map(x0923, b1431, b0822, b0825, x0823, b0823);
161  s0824: Sm  port map(x0924, b1531, b0823, b0825, x0824, b0824);
162  s0825: Sn  port map(x0925,        b0824,               b0825);
163
164  s0714: S0  port map(P(14),               b0724, x0714, b0714);
165  s0715: S1  port map(P(15),        b0714, b0724, x0715, b0715);
166  s0716: Sm  port map(x0816, b0825, b0715, b0724, x0716, b0716);
167  s0717: Sm  port map(x0817, b0926, b0716, b0724, x0717, b0717);
168  s0718: Sm  port map(x0818, b1027, b0717, b0724, x0718, b0718);
169  s0719: Sm  port map(x0819, b1128, b0718, b0724, x0719, b0719);
170  s0720: Sm  port map(x0820, b1229, b0719, b0724, x0720, b0720);
171  s0721: Sm  port map(x0821, b1330, b0720, b0724, x0721, b0721);
172  s0722: Sm  port map(x0822, b1431, b0721, b0724, x0722, b0722);
173  s0723: Sm  port map(x0823, b1531, b0722, b0724, x0723, b0723);
174  s0724: Sn  port map(x0824,        b0723,               b0724);
175
176  s0612: S0  port map(P(12),               b0623, x0612, b0612);
177  s0613: S1  port map(P(13),        b0612, b0623, x0613, b0613);
178  s0614: Sm  port map(x0714, b0724, b0613, b0623, x0614, b0614);
179  s0615: Sm  port map(x0715, b0825, b0614, b0623, x0615, b0615);
180  s0616: Sm  port map(x0716, b0926, b0615, b0623, x0616, b0616);
181  s0617: Sm  port map(x0717, b1027, b0616, b0623, x0617, b0617);
182  s0618: Sm  port map(x0718, b1128, b0617, b0623, x0618, b0618);
183  s0619: Sm  port map(x0719, b1229, b0618, b0623, x0619, b0619);
184  s0620: Sm  port map(x0720, b1330, b0619, b0623, x0620, b0620);
185  s0621: Sm  port map(x0721, b1431, b0620, b0623, x0621, b0621);
186  s0622: Sm  port map(x0722, b1531, b0621, b0623, x0622, b0622);
187  s0623: Sn  port map(x0723,        b0622,               b0623);
188
189  s0510: S0  port map(P(10),               b0522, x0510, b0510);
190  s0511: S1  port map(P(11),        b0510, b0522, x0511, b0511);
191  s0512: Sm  port map(x0612, b0622, b0511, b0522, x0512, b0512);
192  s0513: Sm  port map(x0613, b0723, b0512, b0522, x0513, b0513);
193  s0514: Sm  port map(x0614, b0825, b0513, b0522, x0514, b0514);
194  s0515: Sm  port map(x0615, b0926, b0514, b0522, x0515, b0515);
195  s0516: Sm  port map(x0616, b1027, b0515, b0522, x0516, b0516);
196  s0517: Sm  port map(x0617, b1128, b0516, b0522, x0517, b0517);
197  s0518: Sm  port map(x0618, b1229, b0517, b0522, x0518, b0518);
198  s0519: Sm  port map(x0619, b1330, b0518, b0522, x0519, b0519);
199  s0520: Sm  port map(x0620, b1431, b0519, b0522, x0520, b0520);
200  s0521: Sm  port map(x0621, b1531, b0520, b0522, x0521, b0521);
201  s0522: Sn  port map(x0622,        b0521,               b0522);
202
203  s0408: S0  port map(P(8),                b0421, x0408, b0408);
204  s0409: S1  port map(P(9),         b0408, b0421, x0409, b0409);
205  s0410: Sm  port map(x0510, b0522, b0409, b0421, x0410, b0410);
206  s0411: Sm  port map(x0511, b0623, b0410, b0421, x0411, b0411);
207  s0412: Sm  port map(x0512, b0724, b0411, b0421, x0412, b0412);
208  s0413: Sm  port map(x0513, b0825, b0412, b0421, x0413, b0413);
209  s0414: Sm  port map(x0514, b0926, b0413, b0421, x0414, b0414);
210  s0415: Sm  port map(x0515, b1027, b0414, b0421, x0415, b0415);
211  s0416: Sm  port map(x0516, b1128, b0415, b0421, x0416, b0416);
212  s0417: Sm  port map(x0517, b1229, b0416, b0421, x0417, b0417);
213  s0418: Sm  port map(x0518, b1330, b0417, b0421, x0418, b0418);
214  s0419: Sm  port map(x0519, b1431, b0418, b0421, x0419, b0419);
215  s0420: Sm  port map(x0520, b1531, b0419, b0421, x0420, b0420);
216  s0421: Sn  port map(x0521,        b0420,               b0421);
217
218  s0306: S0  port map(P(6),                b0320, x0306, b0306);
219  s0307: S1  port map(P(7),         b0306, b0320, x0307, b0307);
220  s0308: Sm  port map(x0408, b0421, b0307, b0320, x0308, b0308);
221  s0309: Sm  port map(x0409, b0522, b0308, b0320, x0309, b0309);
222  s0310: Sm  port map(x0410, b0623, b0309, b0320, x0310, b0310);
223  s0311: Sm  port map(x0411, b0724, b0310, b0320, x0311, b0311);
224  s0312: Sm  port map(x0412, b0825, b0311, b0320, x0312, b0312);
225  s0313: Sm  port map(x0413, b0926, b0312, b0320, x0313, b0313);
226  s0314: Sm  port map(x0414, b1027, b0313, b0320, x0314, b0314);
227  s0315: Sm  port map(x0415, b1128, b0314, b0320, x0315, b0315);
228  s0316: Sm  port map(x0416, b1229, b0315, b0320, x0316, b0316);
229  s0317: Sm  port map(x0417, b1330, b0316, b0320, x0317, b0317);
230  s0318: Sm  port map(x0418, b1431, b0317, b0320, x0318, b0318);
231  s0319: Sm  port map(x0419, b1531, b0318, b0320, x0319, b0319);
232  s0320: Sn  port map(x0420,        b0319,               b0320);
233
234  s0204: S0  port map(P(4),                b0219, x0204, b0204);
235  s0205: S1  port map(P(5),         b0204, b0219, x0205, b0205);
236  s0206: Sm  port map(x0306, b0320, b0205, b0219, x0206, b0206);
237  s0207: Sm  port map(x0307, b0421, b0206, b0219, x0207, b0207);
238  s0208: Sm  port map(x0308, b0522, b0207, b0219, x0208, b0208);
239  s0209: Sm  port map(x0309, b0623, b0208, b0219, x0209, b0209);
240  s0210: Sm  port map(x0310, b0724, b0209, b0219, x0210, b0210);
241  s0211: Sm  port map(x0311, b0825, b0210, b0219, x0211, b0211);
242  s0212: Sm  port map(x0312, b0926, b0211, b0219, x0212, b0212);
243  s0213: Sm  port map(x0313, b1027, b0212, b0219, x0213, b0213);
244  s0214: Sm  port map(x0314, b1128, b0213, b0219, x0214, b0214);
245  s0215: Sm  port map(x0315, b1229, b0214, b0219, x0215, b0215);
246  s0216: Sm  port map(x0316, b1330, b0215, b0219, x0216, b0216);
247  s0217: Sm  port map(x0317, b1431, b0216, b0219, x0217, b0217);
248  s0218: Sm  port map(x0318, b1531, b0217, b0219, x0218, b0218);
249  s0219: Sn  port map(x0319,        b0218,               b0219);
250
251  s0102: S0  port map(P(2),                b0118, x0102, b0102);
252  s0103: S1  port map(P(3),         b0102, b0118, x0103, b0103);
253  s0104: Sm  port map(x0204, b0219, b0103, b0118, x0104, b0104);
254  s0105: Sm  port map(x0205, b0320, b0104, b0118, x0105, b0105);
255  s0106: Sm  port map(x0206, b0421, b0105, b0118, x0106, b0106);
256  s0107: Sm  port map(x0207, b0522, b0106, b0118, x0107, b0107);
257  s0108: Sm  port map(x0208, b0623, b0107, b0118, x0108, b0108);
258  s0109: Sm  port map(x0209, b0724, b0108, b0118, x0109, b0109);
259  s0110: Sm  port map(x0210, b0825, b0109, b0118, x0110, b0110);
260  s0111: Sm  port map(x0211, b0926, b0110, b0118, x0111, b0111);
261  s0112: Sm  port map(x0212, b1027, b0111, b0118, x0112, b0112);
262  s0113: Sm  port map(x0213, b1128, b0112, b0118, x0113, b0113);
263  s0114: Sm  port map(x0214, b1229, b0113, b0118, x0114, b0114);
264  s0115: Sm  port map(x0215, b1330, b0114, b0118, x0115, b0115);
265  s0116: Sm  port map(x0216, b1431, b0115, b0118, x0116, b0116);
266  s0117: Sm  port map(x0217, b1531, b0116, b0118, x0117, b0117);
267  s0118: Sn  port map(x0218,        b0117,               b0118);
268
269  s0000: S0b port map(P(0),                              b0000);
270  s0001: S1b port map(P(1),         b0000,               b0001);
271  s0002: Sb  port map(x0102, b0118, b0001,               b0002);
272  s0003: Sb  port map(x0103, b0219, b0002,               b0003);
273  s0004: Sb  port map(x0104, b0320, b0003,               b0004);
274  s0005: Sb  port map(x0105, b0421, b0004,               b0005);
275  s0006: Sb  port map(x0106, b0522, b0005,               b0006);
276  s0007: Sb  port map(x0107, b0623, b0006,               b0007);
277  s0008: Sb  port map(x0108, b0724, b0007,               b0008);
278  s0009: Sb  port map(x0109, b0825, b0008,               b0009);
279  s0010: Sb  port map(x0110, b0926, b0009,               b0010);
280  s0011: Sb  port map(x0111, b1027, b0010,               b0011);
281  s0012: Sb  port map(x0112, b1128, b0011,               b0012);
282  s0013: Sb  port map(x0113, b1229, b0012,               b0013);
283  s0014: Sb  port map(x0114, b1330, b0013,               b0014);
284  s0015: Sb  port map(x0115, b1431, b0014,               b0015);
285  s0016: Sb  port map(x0116, b1531, b0015,               b0016);
286  s0017: Sn  port map(x0117,        b0016,               b0017);
287
288  U(0)  <= b0017; -- set output bits
289  U(1)  <= b0118;
290  U(2)  <= b0219;
291  U(3)  <= b0320;
292  U(4)  <= b0421;
293  U(5)  <= b0522;
294  U(6)  <= b0623;
295  U(7)  <= b0724;
296  U(8)  <= b0825;
297  U(9)  <= b0926;
298  U(10) <= b1027;
299  U(11) <= b1128;
300  U(12) <= b1229;
301  U(13) <= b1330;
302  U(14) <= b1431;
303  U(15) <= b1531;
304
305end circuits;  -- of sqrt32
306