1 /* GNU PIC processor definitions 2 Copyright (C) 2001, 2002, 2003, 2004, 2005 3 Craig Franklin 4 5 Copyright (C) 2014-2016 Molnar Karoly 6 7 This file is part of gputils. 8 9 gputils is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2, or (at your option) 12 any later version. 13 14 gputils is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with gputils; see the file COPYING. If not, write to 21 the Free Software Foundation, 59 Temple Place - Suite 330, 22 Boston, MA 02111-1307, USA. */ 23 24 #ifndef __GPPROCESSOR_H__ 25 #define __GPPROCESSOR_H__ 26 27 /****************************************** 28 PIC12 definitions 29 ******************************************/ 30 31 #define PIC12_BANK_SHIFT 5 32 #define PIC12_BANK_SIZE (1 << PIC12_BANK_SHIFT) /* 32 */ 33 #define PIC12_BANK_MASK (PIC12_BANK_SIZE - 1) 34 #define PIC12_RAM_ADDR_BITS PIC12_BANK_SHIFT 35 #define PIC12_BMSK_BANK 0x007 36 #define PIC12_PAGE_SHIFT 9 37 #define PIC12_PAGE_SIZE (1 << PIC12_PAGE_SHIFT) /* 512 */ 38 #define PIC12_PAGE_MASK (PIC12_PAGE_SIZE - 1) 39 #define PIC12_PAGE_BITS (PIC12_PC_MASK ^ PIC12_PAGE_MASK) 40 41 #define PIC12_REG_STATUS 0x03 42 43 #define PIC12_BIT_STATUS_PA0 5 44 #define PIC12_BIT_STATUS_PA1 6 45 #define PIC12_BIT_STATUS_PA2 7 46 47 #define PIC12_REG_FSR 0x04 48 49 #define PIC12_BIT_FSR_RP0 5 50 #define PIC12_BIT_FSR_RP1 6 51 #define PIC12_BIT_FSR_RP2 7 52 53 #define PIC12_IDLOCS_SIZE 4 54 55 /****************************************** 56 PIC12E definitions 57 ******************************************/ 58 59 #define PIC12E_BMSK_BANK 0x007 60 61 /****************************************** 62 SX definitions 63 ******************************************/ 64 65 #define MASK_SX_PAGE 0x007 66 #define SX_PAGE_BITS (SX_PC_MASK ^ PIC12_PAGE_MASK) 67 68 /****************************************** 69 PIC14 definitions 70 ******************************************/ 71 72 #define PIC14_BANK_SHIFT 7 73 #define PIC14_BANK_SIZE (1 << PIC14_BANK_SHIFT) /* 128 */ 74 #define PIC14_BANK_MASK (PIC14_BANK_SIZE - 1) 75 #define PIC14_RAM_ADDR_BITS PIC14_BANK_SHIFT 76 #define PIC14_PAGE_SHIFT 11 77 #define PIC14_PAGE_SIZE (1 << PIC14_PAGE_SHIFT) /* 2048 */ 78 #define PIC14_PAGE_MASK (PIC14_PAGE_SIZE - 1) 79 #define PIC14_PAGE_BITS (PIC14_PC_MASK ^ PIC14_PAGE_MASK) 80 81 #define PIC14_BMSK_BANK 0x0003 82 #define PIC14_BMSK_PAGE 0x0003 83 84 #define PIC14_REG_STATUS 0x03 85 86 #define PIC14_BIT_STATUS_RP0 5 87 #define PIC14_BIT_STATUS_RP1 6 88 #define PIC14_BIT_STATUS_IRP 7 89 90 #define PIC14_REG_PCLATH 0x0A 91 92 #define PIC14_BIT_PCLATH_3 3 93 #define PIC14_BIT_PCLATH_4 4 94 95 #define PIC14_IDLOCS_SIZE PIC12_IDLOCS_SIZE 96 97 /****************************************** 98 PIC14E definitions 99 ******************************************/ 100 101 #define PIC14E_BMSK_BANK 0x001F 102 #define PIC14E_BMSK_PAGE512 0x007F 103 #define PIC14E_PAGE_BITS (PIC14E_PC_MASK ^ PIC14_PAGE_MASK) 104 #define PIC14E_PAGE512_SHIFT 8 105 106 #define PIC14E_REG_INDF0 0x00 107 #define PIC14E_REG_FSR0 0x04 108 #define PIC14E_REG_FSR0L 0x04 109 #define PIC14E_REG_FSR0H 0x05 110 111 #define PIC14E_REG_INDF1 0x01 112 #define PIC14E_REG_FSR1 0x06 113 #define PIC14E_REG_FSR1L 0x06 114 #define PIC14E_REG_FSR1H 0x07 115 #define PIC14E_REG_BSR 0x08 116 #define PIC14E_REG_WREG 0x09 117 118 /* Flash (program) memory select bit in FSR0H and FSR1H registers. */ 119 #define PIC14E_FSRxH_FLASH_SEL 0x80 120 121 /****************************************** 122 PIC14EX definitions 123 ******************************************/ 124 125 #define PIC14EX_BMSK_BANK 0x003F 126 127 /****************************************** 128 PIC16 definitions 129 ******************************************/ 130 131 #define PIC16_BANK_SHIFT 8 132 #define PIC16_BANK_SIZE (1 << PIC16_BANK_SHIFT) /* 256 */ 133 #define PIC16_BANK_MASK (PIC16_BANK_SIZE - 1) 134 #define PIC16_RAM_ADDR_BITS PIC16_BANK_SHIFT 135 #define PIC16_PAGE_SHIFT 13 136 #define PIC16_PAGE_SIZE (1 << PIC16_PAGE_SHIFT) /* 8192 */ 137 #define PIC16_PAGE_MASK (PIC16_PAGE_SIZE - 1) 138 #define PIC16_PAGE_BITS (PIC16_PC_MASK ^ PIC16_PAGE_MASK) 139 140 #define PIC16_BMSK_BANK 0x00FF 141 #define PIC16_BMSK_PAGE 0x00FF 142 143 #define PIC16_REG_PCLATH 0x03 144 #define PIC16_REG_WREG 0x0A 145 #define PIC16_REG_BSR 0x0F 146 147 /****************************************** 148 PIC16E definitions 149 ******************************************/ 150 151 /* Call and goto address mask for lower 8 bits. */ 152 #define PIC16E_BMSK_BRANCH_LOWER 0x00FF 153 /* Call and goto address mask for higher 12 bits. */ 154 #define PIC16E_BMSK_BRANCH_HIGHER 0x0FFF 155 156 #define PIC16E_BMSK_SEC_INSN_WORD 0xF000 157 158 #define PIC16E_BMSK_BANK 0x000F 159 160 #define PIC16E_REG_BSR 0xFE0 161 #define PIC16E_REG_WREG 0xFE8 162 #define PIC16E_REG_PCL 0xFF9 163 #define PIC16E_REG_TOSL 0xFFD 164 #define PIC16E_REG_TOSH 0xFFE 165 #define PIC16E_REG_TOSU 0xFFF 166 167 #define PIC16E_IDLOCS_SIZE 8 168 169 /******************************************************************************/ 170 171 struct px; 172 struct gp_section; 173 174 typedef struct _core_sfr_ { 175 int address; 176 const char *name; 177 } core_sfr_t; 178 179 typedef struct _vector_ { 180 int address; 181 const char *name; 182 } vector_t; 183 184 struct proc_class { 185 /* Instruction used in making initialization data sections. */ 186 unsigned int retlw; 187 /* Value in COFF header. */ 188 unsigned int rom_width; 189 /* The page size of the program memory. */ 190 unsigned int page_size; 191 /* The bank size of the RAM memory. */ 192 unsigned int bank_size; 193 /* The shift value of bank bits in a RAM address. */ 194 unsigned int bank_bits_shift; 195 /* The number of address bits inside a bank. */ 196 int addr_bits_in_bank; 197 /* Bits to shift assembly code address for the COFF file byte address. */ 198 unsigned int org_to_byte_shift; 199 /* Mask of address bits for the Program Counter. */ 200 unsigned int pc_mask; 201 /* Mask of address bits for pages. */ 202 unsigned int page_mask; 203 /* Mask of address bits for banks. */ 204 unsigned int bank_mask; 205 /* Bitmask of bits that can be stored in the code section address. */ 206 unsigned int core_mask; 207 /* Bitmask of bits that can be stored in the config section address. */ 208 unsigned int config_mask; 209 /* Number of digits of the maximum possible flash address. */ 210 int addr_digits; 211 /* Number of digits of the instruction word. */ 212 int word_digits; 213 /* Number of digits of the config word. */ 214 int config_digits; 215 /* These SFRs exist in each MCU which fall within into the PIC1xx family. */ 216 const core_sfr_t *core_sfr_table; 217 /* Number of the core SFRs. */ 218 unsigned int core_sfr_number; 219 /* This table contains traits of the interrupt vectors. */ 220 const vector_t *vector_table; 221 /* Number of the interrupt vectors. */ 222 unsigned int vector_number; 223 /* Get the start address for ID location. */ 224 unsigned int (*id_location)(const struct px *Processor); 225 226 /* Determine which bank of data memory the address is located. */ 227 int (*bank_from_addr)(int Address); 228 229 /* Set the bank bits, return the number of instructions required. */ 230 unsigned int (*set_bank)(unsigned int Num_banks, unsigned int Bank, MemBlock_t *M, 231 unsigned int Byte_address, gp_boolean Mpasm_compatible); 232 233 unsigned int (*banksel_byte_length)(unsigned int Num_banks, gp_boolean Mpasm_compatible); 234 235 /* Determine which ibank of data memory the address is located. */ 236 int (*check_ibank)(int Address); 237 238 /* Set the ibank bits, return the number of instructions required. */ 239 unsigned int (*set_ibank)(unsigned int Num_banks, unsigned int Bank, MemBlock_t *M, 240 unsigned int Byte_address); 241 242 /* Determine which page of program memory the address is located. */ 243 unsigned int (*check_page)(unsigned int Insn_address); 244 245 /* Set the page bits, return the number of instructions required. */ 246 unsigned int (*set_page)(unsigned int Num_pages, unsigned int Page, MemBlock_t *M, 247 unsigned int Byte_address, gp_boolean Use_wreg); 248 249 unsigned int (*pagesel_byte_length)(unsigned int Num_pages, gp_boolean Use_wreg); 250 251 unsigned int (*page_addr)(unsigned int Insn_address); 252 253 unsigned int (*addr_from_page_bits)(unsigned int Bits); 254 255 /* These return the bits to set in instruction for given address. */ 256 unsigned int (*reloc_call)(unsigned int Insn_address); 257 unsigned int (*reloc_goto)(unsigned int Insn_address); 258 unsigned int (*reloc_f)(unsigned int Address); 259 unsigned int (*reloc_tris)(unsigned int Address); 260 unsigned int (*reloc_movlb)(unsigned int Address); 261 unsigned int (*reloc_bra)(const struct gp_section *Section, unsigned int Value, 262 unsigned int Byte_address); 263 264 unsigned int (*reloc_high)(gp_boolean Is_code, unsigned int Value); 265 266 const insn_t *instructions; 267 const unsigned int *num_instructions; 268 const insn_t *(*find_insn)(const struct proc_class *Class, unsigned int Opcode); 269 270 unsigned int (*i_memory_get)(const MemBlock_t *M, unsigned int Byte_address, uint16_t *Word, 271 const char **Section_name, const char **Symbol_name); 272 273 void (*i_memory_put)(MemBlock_t *M, unsigned int Byte_address, uint16_t Value, 274 const char *Section_name, const char *Symbol_name); 275 276 void (*patch_strict)(void); 277 }; 278 279 typedef const struct proc_class *proc_class_t; 280 281 #define PROC_CLASS_UNKNOWN ((proc_class_t)0) /* Unknown device. */ 282 283 extern const struct proc_class proc_class_eeprom8; /* 8 bit EEPROM */ 284 extern const struct proc_class proc_class_eeprom16; /* 16 bit EEPROM */ 285 extern const struct proc_class proc_class_generic; /* 12 bit device */ 286 extern const struct proc_class proc_class_pic12; /* 12 bit devices */ 287 extern const struct proc_class proc_class_pic12e; /* extended 12 bit devices */ 288 extern const struct proc_class proc_class_pic12i; /* extended 12 bit devices */ 289 extern const struct proc_class proc_class_sx; /* 12 bit devices */ 290 extern const struct proc_class proc_class_pic14; /* 14 bit devices */ 291 extern const struct proc_class proc_class_pic14e; /* enhanced 14 bit devices */ 292 extern const struct proc_class proc_class_pic14ex; /* enhanced 14 bit devices */ 293 extern const struct proc_class proc_class_pic16; /* 16 bit devices */ 294 extern const struct proc_class proc_class_pic16e; /* enhanced 16 bit devices */ 295 296 #define PROC_CLASS_EEPROM8 (&proc_class_eeprom8) 297 #define PROC_CLASS_EEPROM16 (&proc_class_eeprom16) 298 #define PROC_CLASS_GENERIC (&proc_class_generic) 299 #define PROC_CLASS_PIC12 (&proc_class_pic12) 300 #define PROC_CLASS_PIC12E (&proc_class_pic12e) 301 #define PROC_CLASS_PIC12I (&proc_class_pic12i) 302 #define PROC_CLASS_SX (&proc_class_sx) 303 #define PROC_CLASS_PIC14 (&proc_class_pic14) 304 #define PROC_CLASS_PIC14E (&proc_class_pic14e) 305 #define PROC_CLASS_PIC14EX (&proc_class_pic14ex) 306 #define PROC_CLASS_PIC16 (&proc_class_pic16) 307 #define PROC_CLASS_PIC16E (&proc_class_pic16e) 308 309 #define IS_EEPROM8 state.device.class == PROC_CLASS_EEPROM8 310 #define IS_EEPROM16 state.device.class == PROC_CLASS_EEPROM16 311 #define IS_PIC12_CORE state.device.class == PROC_CLASS_PIC12 312 #define IS_PIC12E_CORE state.device.class == PROC_CLASS_PIC12E 313 #define IS_PIC12I_CORE state.device.class == PROC_CLASS_PIC12I 314 #define IS_SX_CORE state.device.class == PROC_CLASS_SX 315 #define IS_PIC14_CORE state.device.class == PROC_CLASS_PIC14 316 #define IS_PIC14E_CORE state.device.class == PROC_CLASS_PIC14E 317 #define IS_PIC14EX_CORE state.device.class == PROC_CLASS_PIC14EX 318 #define IS_PIC16_CORE state.device.class == PROC_CLASS_PIC16 319 #define IS_PIC16E_CORE state.device.class == PROC_CLASS_PIC16E 320 321 #define MAX_NAMES 3 /* Maximum number of names a processor can have. */ 322 #define MAX_BADROM (1 * 2) /* Maximum number of BADROM ranges a processor can be initialized with. */ 323 324 #define PIC16E_FLAG_HAVE_EXTINST (1 << 0) /* The device supports the 16 bit extended instruction set. */ 325 #define PIC16E_FLAG_J_SUBFAMILY (1 << 1) /* The device member of the "J" series. (18f..J..) */ 326 327 struct px { 328 proc_class_t class; 329 const char *defined_as; 330 const char *names[MAX_NAMES]; 331 uint32_t coff_type; 332 int num_pages; 333 int num_banks; 334 /* These bank bits exists in the reality. */ 335 int bank_bits; 336 /* The bounds of common (access) RAM, if exist in the PIC12, PIC12E, PIC12I, PIC14, PIC14E, PIC14EX, PIC16 and PIC16E families. */ 337 int common_ram_addrs[2]; 338 int common_ram_max; 339 /* The bounds of linear RAM in the PIC14E family. */ 340 int linear_ram_addrs[2]; 341 /* These are in org to make it easier to fill from the datasheet. */ 342 int maxram; 343 int maxrom; 344 int prog_mem_size; 345 int badrom[MAX_BADROM]; 346 int idlocs_addrs[2]; 347 int config_addrs[2]; 348 int eeprom_addrs[2]; 349 /* This is an OR mask for the PIC12, PIC12E, PIC12I, PIC14, PIC14E and PIC14EX families. PIC12x: 0x0FF0, PIC14x: 0x3F80 */ 350 int idlocs_mask; 351 /* Use the gpdasm. */ 352 const char *header; 353 const char *script; 354 /* Used ony for the PROC_CLASS_PIC16E class. (PIC16E_FLAG_yyyyy) */ 355 unsigned int pic16e_flags; 356 }; 357 358 typedef const struct px *pic_processor_t; 359 360 /* CONFIG addresses for the 18xx parts */ 361 #define CONFIG1L 0x300000 362 #define CONFIG1H 0x300001 363 #define CONFIG2L 0x300002 364 #define CONFIG2H 0x300003 365 #define CONFIG3L 0x300004 366 #define CONFIG3H 0x300005 367 #define CONFIG4L 0x300006 368 #define CONFIG4H 0x300007 369 #define CONFIG5L 0x300008 370 #define CONFIG5H 0x300009 371 #define CONFIG6L 0x30000a 372 #define CONFIG6H 0x30000b 373 #define CONFIG7L 0x30000c 374 #define CONFIG7H 0x30000d 375 376 #define DEVID1 0x3ffffe 377 #define DEVID2 0x3fffff 378 379 extern void gp_dump_processor_list(gp_boolean List_all, proc_class_t Class0, proc_class_t Class1, 380 proc_class_t Class2); 381 382 extern void gp_processor_invoke_custom_lister(proc_class_t Class0, proc_class_t Class1, proc_class_t Class2, 383 void (*Custom_lister)(pic_processor_t)); 384 385 extern pic_processor_t gp_find_processor(const char *Name); 386 extern proc_class_t gp_processor_class(pic_processor_t Processor); 387 extern const char *gp_processor_class_to_str(proc_class_t Class); 388 extern unsigned int gp_processor_bsr_boundary(pic_processor_t Processor); 389 extern uint32_t gp_processor_coff_type(pic_processor_t Processor); 390 extern unsigned int gp_processor_num_pages(pic_processor_t Processor); 391 extern unsigned int gp_processor_num_banks(pic_processor_t Processor); 392 extern pic_processor_t gp_processor_coff_proc(uint32_t Coff_type); 393 extern const char *gp_processor_name(pic_processor_t Processor, unsigned int Choice); 394 extern const char *gp_processor_coff_name(uint32_t Coff_type, unsigned int Choice); 395 extern const char *gp_processor_header(pic_processor_t Processor); 396 extern const char *gp_processor_script(pic_processor_t Processor); 397 extern unsigned int gp_processor_id_location(pic_processor_t Processor); 398 399 extern int gp_byte_from_insn(unsigned int Shift, int Insn_address); 400 extern int gp_insn_from_byte(unsigned int Shift, int Byte_address); 401 402 extern int gp_processor_reg_offs(pic_processor_t Processor, int Address); 403 extern int gp_processor_bank_addr(pic_processor_t Processor, int Address); 404 extern int gp_processor_bank_num(pic_processor_t Processor, int Address); 405 extern int gp_processor_addr_from_bank_num(pic_processor_t Processor, int Number); 406 407 extern const int *gp_processor_common_ram_exist(pic_processor_t Processor); 408 extern int gp_processor_is_common_ram_addr(pic_processor_t Processor, int Address); 409 410 extern gp_boolean gp_processor_is_p16e_access_low(pic_processor_t Processor, int Address); 411 extern gp_boolean gp_processor_is_p16e_access_high(pic_processor_t Processor, int Address, 412 gp_boolean Mpasm_compatible); 413 414 extern gp_boolean gp_processor_is_p16e_access(pic_processor_t Processor, int Address, 415 gp_boolean Mpasm_compatible); 416 417 extern const int *gp_processor_linear_ram_exist(pic_processor_t Processor); 418 extern int gp_processor_is_linear_ram_addr(pic_processor_t Processor, int Address); 419 420 extern const int *gp_processor_idlocs_exist(pic_processor_t Processor); 421 extern int gp_processor_is_idlocs_org(pic_processor_t Processor, int Org); 422 extern int gp_processor_is_idlocs_byte_addr(pic_processor_t Processor, int Byte_address); 423 424 extern const int *gp_processor_config_exist(pic_processor_t Processor); 425 extern int gp_processor_is_config_org(pic_processor_t Processor, int Org); 426 extern int gp_processor_is_config_byte_addr(pic_processor_t Processor, int Byte_address); 427 428 extern const int *gp_processor_eeprom_exist(pic_processor_t Processor); 429 extern int gp_processor_is_eeprom_org(pic_processor_t Processor, int Org); 430 extern int gp_processor_is_eeprom_byte_addr(pic_processor_t Processor, int Byte_address); 431 432 extern unsigned int gp_processor_rom_width(proc_class_t Class); 433 extern int gp_processor_bank_from_addr(proc_class_t Class, int Address); 434 435 extern unsigned int gp_processor_set_bank(proc_class_t Class, unsigned int Num_banks, 436 unsigned int Bank, MemBlock_t *M, unsigned int Byte_address, 437 gp_boolean Mpasm_compatible); 438 439 extern int gp_processor_check_ibank(proc_class_t Class, int Address); 440 441 extern unsigned int gp_processor_set_ibank(proc_class_t Class, unsigned int Num_banks, 442 unsigned int Bank, MemBlock_t *M, unsigned int Byte_address); 443 444 extern unsigned int gp_processor_check_page(proc_class_t Class, unsigned int Address); 445 446 extern unsigned int gp_processor_set_page(proc_class_t Class, unsigned int Num_pages, unsigned int Page, 447 MemBlock_t *M, unsigned int Byte_address, gp_boolean Use_wreg); 448 449 extern unsigned int gp_processor_page_addr(proc_class_t Class, unsigned int Insn_address); 450 451 extern unsigned int gp_processor_addr_from_page_bits(proc_class_t Class, unsigned int Bits); 452 453 extern unsigned int gp_processor_retlw(proc_class_t Class); 454 455 extern int gp_processor_byte_from_insn_c(proc_class_t Class, int Insn_address); 456 extern int gp_processor_byte_from_insn_p(pic_processor_t Processor, int Insn_address); 457 458 extern int gp_processor_insn_from_byte_c(proc_class_t Class, int Byte_address); 459 extern int gp_processor_insn_from_byte_p(pic_processor_t Processor, int Byte_address); 460 461 extern const core_sfr_t *gp_processor_find_sfr(proc_class_t Class, unsigned int Address); 462 extern const char *gp_processor_find_sfr_name(proc_class_t Class, unsigned int Address); 463 extern const vector_t *gp_processor_find_vector(proc_class_t Class, unsigned int Address); 464 465 #endif /* __GPPROCESSOR_H__ */ 466