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/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h142 #define radeon_set_uconfig_reg_idx(screen, chip_class, reg, idx, value) do { \ argument
284 si_get_user_data_base(enum chip_class chip_class, enum si_has_tess has_tess, in si_get_user_data_base()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h142 #define radeon_set_uconfig_reg_idx(screen, chip_class, reg, idx, value) do { \ argument
284 si_get_user_data_base(enum chip_class chip_class, enum si_has_tess has_tess, in si_get_user_data_base()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h142 #define radeon_set_uconfig_reg_idx(screen, chip_class, reg, idx, value) do { \ argument
284 si_get_user_data_base(enum chip_class chip_class, enum si_has_tess has_tess, in si_get_user_data_base()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h142 #define radeon_set_uconfig_reg_idx(screen, chip_class, reg, idx, value) do { \ argument
284 si_get_user_data_base(enum chip_class chip_class, enum si_has_tess has_tess, in si_get_user_data_base()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h142 #define radeon_set_uconfig_reg_idx(screen, chip_class, reg, idx, value) do { \ argument
284 si_get_user_data_base(enum chip_class chip_class, enum si_has_tess has_tess, in si_get_user_data_base()
/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h142 #define radeon_set_uconfig_reg_idx(screen, chip_class, reg, idx, value) do { \ argument
284 si_get_user_data_base(enum chip_class chip_class, enum si_has_tess has_tess, in si_get_user_data_base()
/dports/lang/clover/mesa-21.3.6/src/amd/compiler/tests/
H A Dhelpers.cpp75 void create_program(enum chip_class chip_class, Stage stage, unsigned wave_size, enum radeon_family… in create_program()
101 bool setup_cs(const char *input_spec, enum chip_class chip_class, in setup_cs()
278 VkDevice get_vk_device(enum chip_class chip_class) in get_vk_device()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/compiler/tests/
H A Dhelpers.cpp75 void create_program(enum chip_class chip_class, Stage stage, unsigned wave_size, enum radeon_family… in create_program()
101 bool setup_cs(const char *input_spec, enum chip_class chip_class, in setup_cs()
278 VkDevice get_vk_device(enum chip_class chip_class) in get_vk_device()
/dports/graphics/libosmesa/mesa-21.3.6/src/amd/compiler/tests/
H A Dhelpers.cpp75 void create_program(enum chip_class chip_class, Stage stage, unsigned wave_size, enum radeon_family… in create_program()
101 bool setup_cs(const char *input_spec, enum chip_class chip_class, in setup_cs()
278 VkDevice get_vk_device(enum chip_class chip_class) in get_vk_device()
/dports/graphics/mesa-libs/mesa-21.3.6/src/amd/compiler/tests/
H A Dhelpers.cpp75 void create_program(enum chip_class chip_class, Stage stage, unsigned wave_size, enum radeon_family… in create_program()
101 bool setup_cs(const char *input_spec, enum chip_class chip_class, in setup_cs()
278 VkDevice get_vk_device(enum chip_class chip_class) in get_vk_device()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/amd/compiler/tests/
H A Dhelpers.cpp75 void create_program(enum chip_class chip_class, Stage stage, unsigned wave_size, enum radeon_family… in create_program()
101 bool setup_cs(const char *input_spec, enum chip_class chip_class, in setup_cs()
278 VkDevice get_vk_device(enum chip_class chip_class) in get_vk_device()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/amd/compiler/tests/
H A Dhelpers.cpp75 void create_program(enum chip_class chip_class, Stage stage, unsigned wave_size, enum radeon_family… in create_program()
101 bool setup_cs(const char *input_spec, enum chip_class chip_class, in setup_cs()
278 VkDevice get_vk_device(enum chip_class chip_class) in get_vk_device()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/amd/compiler/tests/
H A Dhelpers.cpp75 void create_program(enum chip_class chip_class, Stage stage, unsigned wave_size, enum radeon_family… in create_program()
101 bool setup_cs(const char *input_spec, enum chip_class chip_class, in setup_cs()
278 VkDevice get_vk_device(enum chip_class chip_class) in get_vk_device()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/compiler/tests/
H A Dhelpers.cpp75 void create_program(enum chip_class chip_class, Stage stage, unsigned wave_size, enum radeon_family… in create_program()
101 bool setup_cs(const char *input_spec, enum chip_class chip_class, in setup_cs()
278 VkDevice get_vk_device(enum chip_class chip_class) in get_vk_device()
/dports/graphics/mesa-dri/mesa-21.3.6/src/amd/compiler/tests/
H A Dhelpers.cpp75 void create_program(enum chip_class chip_class, Stage stage, unsigned wave_size, enum radeon_family… in create_program()
101 bool setup_cs(const char *input_spec, enum chip_class chip_class, in setup_cs()
278 VkDevice get_vk_device(enum chip_class chip_class) in get_vk_device()
/dports/lang/clover/mesa-21.3.6/src/amd/vulkan/
H A Dsi_cmd_buffer.c719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec, in si_cs_emit_write_event_eop()
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in gfx10_cs_emit_cache_flush()
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/vulkan/
H A Dsi_cmd_buffer.c719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec, in si_cs_emit_write_event_eop()
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in gfx10_cs_emit_cache_flush()
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
/dports/graphics/mesa-libs/mesa-21.3.6/src/amd/vulkan/
H A Dsi_cmd_buffer.c719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec, in si_cs_emit_write_event_eop()
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in gfx10_cs_emit_cache_flush()
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/amd/vulkan/
H A Dsi_cmd_buffer.c719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec, in si_cs_emit_write_event_eop()
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in gfx10_cs_emit_cache_flush()
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/amd/vulkan/
H A Dsi_cmd_buffer.c719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec, in si_cs_emit_write_event_eop()
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in gfx10_cs_emit_cache_flush()
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/amd/vulkan/
H A Dsi_cmd_buffer.c719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec, in si_cs_emit_write_event_eop()
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in gfx10_cs_emit_cache_flush()
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/vulkan/
H A Dsi_cmd_buffer.c719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec, in si_cs_emit_write_event_eop()
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in gfx10_cs_emit_cache_flush()
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
/dports/graphics/libosmesa/mesa-21.3.6/src/amd/vulkan/
H A Dsi_cmd_buffer.c719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec, in si_cs_emit_write_event_eop()
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in gfx10_cs_emit_cache_flush()
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
/dports/graphics/mesa-dri/mesa-21.3.6/src/amd/vulkan/
H A Dsi_cmd_buffer.c719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum chip_class chip_class, bool is_mec, in si_cs_emit_write_event_eop()
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in gfx10_cs_emit_cache_flush()
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum chip_class chip_class, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/amd/vulkan/
H A Dsi_cmd_buffer.c784 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; in si_get_ia_multi_vgt_param() local
914 enum chip_class chip_class, in si_cs_emit_write_event_eop()
1025 enum chip_class chip_class, in gfx10_cs_emit_cache_flush()
1202 enum chip_class chip_class, in si_cs_emit_cache_flush()

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