1 /* generic byte-sized write handler */
2 #define WRITEBYTE(name,type,abits) \
3 void name(offs_t address,data_t data) \
4 { \
5 MHELE hw; \
6 \
7 /* first-level lookup */ \
8 hw = cur_mwhard[(UINT32)address >> (ABITS2_##abits + ABITS_MIN_##abits)]; \
9 \
10 /* for compatibility with setbankhandler, 8-bit systems must call handlers */ \
11 /* for banked memory reads/writes */ \
12 if (type == TYPE_8BIT && hw == HT_RAM) \
13 { \
14 cpu_bankbase[HT_RAM][address] = data; \
15 return; \
16 } \
17 else if (type != TYPE_8BIT && hw <= HT_BANKMAX) \
18 { \
19 if (type == TYPE_16BIT_BE) \
20 cpu_bankbase[hw][BYTE_XOR_BE(address) - memorywriteoffset[hw]] = data; \
21 else if (type == TYPE_16BIT_LE) \
22 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data; \
23 return; \
24 } \
25 \
26 /* second-level lookup */ \
27 if (hw >= MH_HARDMAX) \
28 { \
29 hw -= MH_HARDMAX; \
30 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_##abits) & MHMASK(ABITS2_##abits))]; \
31 \
32 /* for compatibility with setbankhandler, 8-bit systems must call handlers */ \
33 /* for banked memory reads/writes */ \
34 if (type == TYPE_8BIT && hw == HT_RAM) \
35 { \
36 cpu_bankbase[HT_RAM][address] = data; \
37 return; \
38 } \
39 else if (type != TYPE_8BIT && hw <= HT_BANKMAX) \
40 { \
41 if (type == TYPE_16BIT_BE) \
42 cpu_bankbase[hw][BYTE_XOR_BE(address) - memorywriteoffset[hw]] = data; \
43 else if (type == TYPE_16BIT_LE) \
44 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data; \
45 return; \
46 } \
47 } \
48 \
49 /* fall back to handler */ \
50 if (type != TYPE_8BIT) \
51 { \
52 int shift = (address & 1) << 3; \
53 if (type == TYPE_16BIT_BE) \
54 shift ^= 8; \
55 data = (0xff000000 >> shift) | ((data & 0xff) << shift); \
56 address &= ~1; \
57 } \
58 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data); \
59 }
60
61 /* generic word-sized write handler (16-bit aligned only!) */
62 #define WRITEWORD(name,type,abits,align) \
63 void name##_word(offs_t address,data_t data) \
64 { \
65 MHELE hw; \
66 \
67 /* only supports 16-bit memory systems */ \
68 if (type == TYPE_8BIT) \
69 printf("Unsupported type for WRITEWORD macro!\n"); \
70 \
71 /* handle aligned case first */ \
72 if (align == ALWAYS_ALIGNED || !(address & 1)) \
73 { \
74 /* first-level lookup */ \
75 hw = cur_mwhard[(UINT32)address >> (ABITS2_##abits + ABITS_MIN_##abits)]; \
76 if (hw <= HT_BANKMAX) \
77 { \
78 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data); \
79 return; \
80 } \
81 \
82 /* second-level lookup */ \
83 if (hw >= MH_HARDMAX) \
84 { \
85 hw -= MH_HARDMAX; \
86 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_##abits) & MHMASK(ABITS2_##abits))]; \
87 if (hw <= HT_BANKMAX) \
88 { \
89 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data); \
90 return; \
91 } \
92 } \
93 \
94 /* fall back to handler */ \
95 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data & 0xffff); \
96 } \
97 \
98 /* unaligned case */ \
99 else if (type == TYPE_16BIT_BE) \
100 { \
101 name(address, data >> 8); \
102 name(address + 1, data & 0xff); \
103 } \
104 else if (type == TYPE_16BIT_LE) \
105 { \
106 name(address, data & 0xff); \
107 name(address + 1, data >> 8); \
108 } \
109 }
110
111 /* generic dword-sized write handler (16-bit aligned only!) */
112 #define WRITELONG(name,type,abits,align) \
113 void name##_dword(offs_t address,data_t data) \
114 { \
115 UINT16 word1, word2; \
116 MHELE hw1, hw2; \
117 \
118 /* only supports 16-bit memory systems */ \
119 if (type == TYPE_8BIT) \
120 printf("Unsupported type for WRITELONG macro!\n"); \
121 \
122 /* handle aligned case first */ \
123 if (align == ALWAYS_ALIGNED || !(address & 1)) \
124 { \
125 int address2 = (address + 2) & ADDRESS_MASK(abits); \
126 \
127 /* first-level lookup */ \
128 hw1 = cur_mwhard[(UINT32)address >> (ABITS2_##abits + ABITS_MIN_##abits)]; \
129 hw2 = cur_mwhard[(UINT32)address2 >> (ABITS2_##abits + ABITS_MIN_##abits)]; \
130 \
131 /* second-level lookup */ \
132 if (hw1 >= MH_HARDMAX) \
133 { \
134 hw1 -= MH_HARDMAX; \
135 hw1 = writehardware[(hw1 << MH_SBITS) + (((UINT32)address >> ABITS_MIN_##abits) & MHMASK(ABITS2_##abits))]; \
136 } \
137 if (hw2 >= MH_HARDMAX) \
138 { \
139 hw2 -= MH_HARDMAX; \
140 hw2 = writehardware[(hw2 << MH_SBITS) + (((UINT32)address2 >> ABITS_MIN_##abits) & MHMASK(ABITS2_##abits))]; \
141 } \
142 \
143 /* extract words */ \
144 if (type == TYPE_16BIT_BE) \
145 { \
146 word1 = data >> 16; \
147 word2 = data & 0xffff; \
148 } \
149 else if (type == TYPE_16BIT_LE) \
150 { \
151 word1 = data & 0xffff; \
152 word2 = data >> 16; \
153 } \
154 \
155 /* process each word */ \
156 if (hw1 <= HT_BANKMAX) \
157 WRITE_WORD(&cpu_bankbase[hw1][address - memorywriteoffset[hw1]], word1); \
158 else \
159 (*memorywritehandler[hw1])(address - memorywriteoffset[hw1], word1); \
160 if (hw2 <= HT_BANKMAX) \
161 WRITE_WORD(&cpu_bankbase[hw2][address2 - memorywriteoffset[hw2]], word2); \
162 else \
163 (*memorywritehandler[hw2])(address2 - memorywriteoffset[hw2], word2); \
164 } \
165 \
166 /* unaligned case */ \
167 else if (type == TYPE_16BIT_BE) \
168 { \
169 name(address, data >> 24); \
170 name##_word(address + 1, (data >> 8) & 0xffff); \
171 name(address + 3, data & 0xff); \
172 } \
173 else if (type == TYPE_16BIT_LE) \
174 { \
175 name(address, data & 0xff); \
176 name##_word(address + 1, (data >> 8) & 0xffff); \
177 name(address + 3, data >> 24); \
178 } \
179 }
180
181
182 /* the handlers we need to generate */
183 //WRITEBYTE(cpu_writemem16, TYPE_8BIT, 16)
184 #ifdef MAME_MEMINLINE
185 INLINE
186 #endif
cpu_writemem16(offs_t address,data_t data)187 void cpu_writemem16(offs_t address,data_t data)
188 {
189 MHELE hw;
190
191 /* first-level lookup */
192 hw = cur_mwhard[(UINT32)address >> (ABITS2_16 + ABITS_MIN_16)];
193
194 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
195 /* for banked memory reads/writes */
196 if (hw == HT_RAM)
197 {
198 cpu_bankbase[HT_RAM][address] = data;
199 return;
200 }
201
202 /* second-level lookup */
203 if (hw >= MH_HARDMAX)
204 {
205 hw -= MH_HARDMAX;
206 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_16) & MHMASK(ABITS2_16))];
207
208 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
209 /* for banked memory reads/writes */
210 if (hw == HT_RAM)
211 {
212 cpu_bankbase[HT_RAM][address] = data;
213 return;
214 }
215 }
216
217 /* fall back to handler */
218 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
219 }
220
221 //WRITEBYTE(cpu_writemem20, TYPE_8BIT, 20)
222 #ifdef MAME_MEMINLINE
223 INLINE
224 #endif
cpu_writemem20(offs_t address,data_t data)225 void cpu_writemem20(offs_t address,data_t data)
226 {
227 MHELE hw;
228
229 /* first-level lookup */
230 hw = cur_mwhard[(UINT32)address >> (ABITS2_20 + ABITS_MIN_20)];
231
232 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
233 /* for banked memory reads/writes */
234 if (hw == HT_RAM)
235 {
236 cpu_bankbase[HT_RAM][address] = data;
237 return;
238 }
239
240 /* second-level lookup */
241 if (hw >= MH_HARDMAX)
242 {
243 hw -= MH_HARDMAX;
244 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_20) & MHMASK(ABITS2_20))];
245
246 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
247 /* for banked memory reads/writes */
248 if (hw == HT_RAM)
249 {
250 cpu_bankbase[HT_RAM][address] = data;
251 return;
252 }
253 }
254
255 /* fall back to handler */
256 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
257 }
258
259 //WRITEBYTE(cpu_writemem21, TYPE_8BIT, 21)
260 #ifdef MAME_MEMINLINE
261 INLINE
262 #endif
cpu_writemem21(offs_t address,data_t data)263 void cpu_writemem21(offs_t address,data_t data)
264 {
265 MHELE hw;
266
267 /* first-level lookup */
268 hw = cur_mwhard[(UINT32)address >> (ABITS2_21 + ABITS_MIN_21)];
269
270 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
271 /* for banked memory reads/writes */
272 if (hw == HT_RAM)
273 {
274 cpu_bankbase[HT_RAM][address] = data;
275 return;
276 }
277
278 /* second-level lookup */
279 if (hw >= MH_HARDMAX)
280 {
281 hw -= MH_HARDMAX;
282 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_21) & MHMASK(ABITS2_21))];
283
284 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
285 /* for banked memory reads/writes */
286 if (hw == HT_RAM)
287 {
288 cpu_bankbase[HT_RAM][address] = data;
289 return;
290 }
291 }
292
293 /* fall back to handler */
294 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
295 }
296
297
298 //WRITEBYTE(cpu_writemem16bew, TYPE_16BIT_BE, 16BEW)
299 #ifdef MAME_MEMINLINE
300 INLINE
301 #endif
cpu_writemem16bew(offs_t address,data_t data)302 void cpu_writemem16bew(offs_t address,data_t data)
303 {
304 MHELE hw;
305
306 /* first-level lookup */
307 hw = cur_mwhard[(UINT32)address >> (ABITS2_16BEW + ABITS_MIN_16BEW)];
308
309 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
310 /* for banked memory reads/writes */
311 if (hw <= HT_BANKMAX)
312 {
313 cpu_bankbase[hw][BYTE_XOR_BE(address) - memorywriteoffset[hw]] = data;
314 }
315
316 /* second-level lookup */
317 if (hw >= MH_HARDMAX)
318 {
319 hw -= MH_HARDMAX;
320 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_16BEW) & MHMASK(ABITS2_16BEW))];
321
322 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
323 /* for banked memory reads/writes */
324 if (hw <= HT_BANKMAX)
325 {
326 cpu_bankbase[hw][BYTE_XOR_BE(address) - memorywriteoffset[hw]] = data;
327 }
328 }
329
330 /* fall back to handler */
331 {
332 int shift = ((address & 1) << 3)^8;
333 data = (0xff000000 >> shift) | ((data & 0xff) << shift);
334 address &= ~1;
335 }
336 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
337 }
338
339 //WRITEWORD(cpu_writemem16bew, TYPE_16BIT_BE, 16BEW, ALWAYS_ALIGNED)
340 #ifdef MAME_MEMINLINE
341 INLINE
342 #endif
cpu_writemem16bew_word(offs_t address,data_t data)343 void cpu_writemem16bew_word(offs_t address,data_t data)
344 {
345 MHELE hw;
346
347 /* first-level lookup */
348 hw = cur_mwhard[(UINT32)address >> (ABITS2_16BEW + ABITS_MIN_16BEW)];
349 if (hw <= HT_BANKMAX)
350 {
351 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
352 return;
353 }
354
355 /* second-level lookup */
356 if (hw >= MH_HARDMAX)
357 {
358 hw -= MH_HARDMAX;
359 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_16BEW) & MHMASK(ABITS2_16BEW))];
360 if (hw <= HT_BANKMAX)
361 {
362 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
363 return;
364 }
365 }
366
367 /* fall back to handler */
368 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data & 0xffff);
369 }
370
371 //WRITEBYTE(cpu_writemem16lew, TYPE_16BIT_LE, 16LEW)
372 #ifdef MAME_MEMINLINE
373 INLINE
374 #endif
cpu_writemem16lew(offs_t address,data_t data)375 void cpu_writemem16lew(offs_t address,data_t data)
376 {
377 MHELE hw;
378
379 /* first-level lookup */
380 hw = cur_mwhard[(UINT32)address >> (ABITS2_16LEW + ABITS_MIN_16LEW)];
381
382 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
383 /* for banked memory reads/writes */
384 if (hw <= HT_BANKMAX)
385 {
386 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data;
387 return;
388 }
389
390 /* second-level lookup */
391 if (hw >= MH_HARDMAX)
392 {
393 hw -= MH_HARDMAX;
394 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_16LEW) & MHMASK(ABITS2_16LEW))];
395
396 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
397 /* for banked memory reads/writes */
398 if (hw <= HT_BANKMAX)
399 {
400 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data;
401 return;
402 }
403 }
404
405 /* fall back to handler */
406 {
407 int shift = (address & 1) << 3;
408 data = (0xff000000 >> shift) | ((data & 0xff) << shift);
409 address &= ~1;
410 }
411 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
412 }
413
414 //WRITEWORD(cpu_writemem16lew, TYPE_16BIT_LE, 16LEW, ALWAYS_ALIGNED)
415 #ifdef MAME_MEMINLINE
416 INLINE
417 #endif
cpu_writemem16lew_word(offs_t address,data_t data)418 void cpu_writemem16lew_word(offs_t address,data_t data)
419 {
420 MHELE hw;
421
422 /* first-level lookup */
423 hw = cur_mwhard[(UINT32)address >> (ABITS2_16LEW + ABITS_MIN_16LEW)];
424 if (hw <= HT_BANKMAX)
425 {
426 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
427 return;
428 }
429
430 /* second-level lookup */
431 if (hw >= MH_HARDMAX)
432 {
433 hw -= MH_HARDMAX;
434 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_16LEW) & MHMASK(ABITS2_16LEW))];
435 if (hw <= HT_BANKMAX)
436 {
437 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
438 return;
439 }
440 }
441
442 /* fall back to handler */
443 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data & 0xffff);
444 }
445
446 //WRITEBYTE(cpu_writemem24, TYPE_8BIT, 24)
447 #ifdef MAME_MEMINLINE
448 INLINE
449 #endif
cpu_writemem24(offs_t address,data_t data)450 void cpu_writemem24(offs_t address,data_t data)
451 {
452 MHELE hw;
453
454 /* first-level lookup */
455 hw = cur_mwhard[(UINT32)address >> (ABITS2_24 + ABITS_MIN_24)];
456
457 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
458 /* for banked memory reads/writes */
459 if (hw == HT_RAM)
460 {
461 cpu_bankbase[HT_RAM][address] = data;
462 return;
463 }
464
465 /* second-level lookup */
466 if (hw >= MH_HARDMAX)
467 {
468 hw -= MH_HARDMAX;
469 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_24) & MHMASK(ABITS2_24))];
470
471 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
472 /* for banked memory reads/writes */
473 if (hw == HT_RAM)
474 {
475 cpu_bankbase[HT_RAM][address] = data;
476 return;
477 }
478 }
479
480 /* fall back to handler */
481 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
482 }
483
484
485 //WRITEBYTE(cpu_writemem24bew, TYPE_16BIT_BE, 24BEW)
486 #ifdef MAME_MEMINLINE
487 INLINE
488 #endif
cpu_writemem24bew(offs_t address,data_t data)489 void cpu_writemem24bew(offs_t address,data_t data)
490 {
491 MHELE hw;
492
493 /* first-level lookup */
494 hw = cur_mwhard[(UINT32)address >> (ABITS2_24BEW + ABITS_MIN_24BEW)];
495
496 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
497 /* for banked memory reads/writes */
498 if (hw <= HT_BANKMAX)
499 {
500 cpu_bankbase[hw][BYTE_XOR_BE(address) - memorywriteoffset[hw]] = data;
501 return;
502 }
503
504 /* second-level lookup */
505 if (hw >= MH_HARDMAX)
506 {
507 hw -= MH_HARDMAX;
508 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_24BEW) & MHMASK(ABITS2_24BEW))];
509
510 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
511 /* for banked memory reads/writes */
512 if (hw <= HT_BANKMAX)
513 {
514 cpu_bankbase[hw][BYTE_XOR_BE(address) - memorywriteoffset[hw]] = data;
515 return;
516 }
517 }
518
519 /* fall back to handler */
520 {
521 int shift = ((address & 1) << 3)^8;
522 data = (0xff000000 >> shift) | ((data & 0xff) << shift);
523 address &= ~1;
524 }
525 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
526 }
527
528 //WRITEWORD(cpu_writemem24bew, TYPE_16BIT_BE, 24BEW, CAN_BE_MISALIGNED)
529 #ifdef MAME_MEMINLINE
530 INLINE
531 #endif
cpu_writemem24bew_word(offs_t address,data_t data)532 void cpu_writemem24bew_word(offs_t address,data_t data)
533 {
534 MHELE hw;
535
536 /* handle aligned case first */
537 if (!(address & 1))
538 {
539 /* first-level lookup */
540 hw = cur_mwhard[(UINT32)address >> (ABITS2_24BEW + ABITS_MIN_24BEW)];
541 if (hw <= HT_BANKMAX)
542 {
543 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
544 return;
545 }
546
547 /* second-level lookup */
548 if (hw >= MH_HARDMAX)
549 {
550 hw -= MH_HARDMAX;
551 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_24BEW) & MHMASK(ABITS2_24BEW))];
552 if (hw <= HT_BANKMAX)
553 {
554 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
555 return;
556 }
557 }
558
559 /* fall back to handler */
560 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data & 0xffff);
561 }
562
563 /* unaligned case */
564 else
565 {
566 cpu_writemem24bew(address, data >> 8);
567 cpu_writemem24bew(address + 1, data & 0xff);
568 }
569 }
570
571 //WRITELONG(cpu_writemem24bew, TYPE_16BIT_BE, 24BEW, CAN_BE_MISALIGNED)
572 #ifdef MAME_MEMINLINE
573 INLINE
574 #endif
cpu_writemem24bew_dword(offs_t address,data_t data)575 void cpu_writemem24bew_dword(offs_t address,data_t data)
576 {
577 UINT16 word1, word2;
578 MHELE hw1, hw2;
579
580 /* handle aligned case first */
581 if (!(address & 1))
582 {
583 int address2 = (address + 2) & ADDRESS_MASK(24BEW);
584
585 /* first-level lookup */
586 hw1 = cur_mwhard[(UINT32)address >> (ABITS2_24BEW + ABITS_MIN_24BEW)];
587 hw2 = cur_mwhard[(UINT32)address2 >> (ABITS2_24BEW + ABITS_MIN_24BEW)];
588
589 /* second-level lookup */
590 if (hw1 >= MH_HARDMAX)
591 {
592 hw1 -= MH_HARDMAX;
593 hw1 = writehardware[(hw1 << MH_SBITS) + (((UINT32)address >> ABITS_MIN_24BEW) & MHMASK(ABITS2_24BEW))];
594 }
595 if (hw2 >= MH_HARDMAX)
596 {
597 hw2 -= MH_HARDMAX;
598 hw2 = writehardware[(hw2 << MH_SBITS) + (((UINT32)address2 >> ABITS_MIN_24BEW) & MHMASK(ABITS2_24BEW))];
599 }
600
601 /* extract words */
602 word1 = data >> 16;
603 word2 = data & 0xffff;
604
605 /* process each word */
606 if (hw1 <= HT_BANKMAX)
607 WRITE_WORD(&cpu_bankbase[hw1][address - memorywriteoffset[hw1]], word1);
608 else
609 (*memorywritehandler[hw1])(address - memorywriteoffset[hw1], word1);
610 if (hw2 <= HT_BANKMAX)
611 WRITE_WORD(&cpu_bankbase[hw2][address2 - memorywriteoffset[hw2]], word2);
612 else
613 (*memorywritehandler[hw2])(address2 - memorywriteoffset[hw2], word2);
614 }
615
616 /* unaligned case */
617 else
618 {
619 cpu_writemem24bew(address, data >> 24);
620 cpu_writemem24bew_word(address + 1, (data >> 8) & 0xffff);
621 cpu_writemem24bew(address + 3, data & 0xff);
622 }
623 }
624
625
626 //WRITEBYTE(cpu_writemem26lew, TYPE_16BIT_LE, 26LEW)
627 #ifdef MAME_MEMINLINE
628 INLINE
629 #endif
cpu_writemem26lew(offs_t address,data_t data)630 void cpu_writemem26lew(offs_t address,data_t data)
631 {
632 MHELE hw;
633
634 /* first-level lookup */
635 hw = cur_mwhard[(UINT32)address >> (ABITS2_26LEW + ABITS_MIN_26LEW)];
636
637 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
638 /* for banked memory reads/writes */
639 if (hw <= HT_BANKMAX)
640 {
641 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data;
642 return;
643 }
644
645 /* second-level lookup */
646 if (hw >= MH_HARDMAX)
647 {
648 hw -= MH_HARDMAX;
649 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_26LEW) & MHMASK(ABITS2_26LEW))];
650
651 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
652 /* for banked memory reads/writes */
653 if (hw <= HT_BANKMAX)
654 {
655 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data;
656 return;
657 }
658 }
659
660 /* fall back to handler */
661 {
662 int shift = (address & 1) << 3;
663 data = (0xff000000 >> shift) | ((data & 0xff) << shift);
664 address &= ~1;
665 }
666 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
667 }
668
669 //WRITEWORD(cpu_writemem26lew, TYPE_16BIT_LE, 26LEW, ALWAYS_ALIGNED)
670 #ifdef MAME_MEMINLINE
671 INLINE
672 #endif
cpu_writemem26lew_word(offs_t address,data_t data)673 void cpu_writemem26lew_word(offs_t address,data_t data)
674 {
675 MHELE hw;
676
677 /* first-level lookup */
678 hw = cur_mwhard[(UINT32)address >> (ABITS2_26LEW + ABITS_MIN_26LEW)];
679 if (hw <= HT_BANKMAX)
680 {
681 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
682 return;
683 }
684
685 /* second-level lookup */
686 if (hw >= MH_HARDMAX)
687 {
688 hw -= MH_HARDMAX;
689 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_26LEW) & MHMASK(ABITS2_26LEW))];
690 if (hw <= HT_BANKMAX)
691 {
692 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
693 return;
694 }
695 }
696
697 /* fall back to handler */
698 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data & 0xffff);
699 }
700
701 //WRITELONG(cpu_writemem26lew, TYPE_16BIT_LE, 26LEW, ALWAYS_ALIGNED)
702 #ifdef MAME_MEMINLINE
703 INLINE
704 #endif
cpu_writemem26lew_dword(offs_t address,data_t data)705 void cpu_writemem26lew_dword(offs_t address,data_t data)
706 {
707 UINT16 word1, word2;
708 MHELE hw1, hw2;
709
710 int address2 = (address + 2) & ADDRESS_MASK(26LEW);
711
712 /* first-level lookup */
713 hw1 = cur_mwhard[(UINT32)address >> (ABITS2_26LEW + ABITS_MIN_26LEW)];
714 hw2 = cur_mwhard[(UINT32)address2 >> (ABITS2_26LEW + ABITS_MIN_26LEW)];
715
716 /* second-level lookup */
717 if (hw1 >= MH_HARDMAX)
718 {
719 hw1 -= MH_HARDMAX;
720 hw1 = writehardware[(hw1 << MH_SBITS) + (((UINT32)address >> ABITS_MIN_26LEW) & MHMASK(ABITS2_26LEW))];
721 }
722 if (hw2 >= MH_HARDMAX)
723 {
724 hw2 -= MH_HARDMAX;
725 hw2 = writehardware[(hw2 << MH_SBITS) + (((UINT32)address2 >> ABITS_MIN_26LEW) & MHMASK(ABITS2_26LEW))];
726 }
727
728 /* extract words */
729 word1 = data & 0xffff;
730 word2 = data >> 16;
731
732 /* process each word */
733 if (hw1 <= HT_BANKMAX)
734 WRITE_WORD(&cpu_bankbase[hw1][address - memorywriteoffset[hw1]], word1);
735 else
736 (*memorywritehandler[hw1])(address - memorywriteoffset[hw1], word1);
737 if (hw2 <= HT_BANKMAX)
738 WRITE_WORD(&cpu_bankbase[hw2][address2 - memorywriteoffset[hw2]], word2);
739 else
740 (*memorywritehandler[hw2])(address2 - memorywriteoffset[hw2], word2);
741 }
742
743 //WRITEBYTE(cpu_writemem29, TYPE_16BIT_LE, 29)
744 #ifdef MAME_MEMINLINE
745 INLINE
746 #endif
cpu_writemem29(offs_t address,data_t data)747 void cpu_writemem29(offs_t address,data_t data)
748 {
749 MHELE hw;
750
751 /* first-level lookup */
752 hw = cur_mwhard[(UINT32)address >> (ABITS2_29 + ABITS_MIN_29)];
753
754 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
755 /* for banked memory reads/writes */
756 if (hw <= HT_BANKMAX)
757 {
758 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data;
759 return;
760 }
761
762 /* second-level lookup */
763 if (hw >= MH_HARDMAX)
764 {
765 hw -= MH_HARDMAX;
766 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_29) & MHMASK(ABITS2_29))];
767
768 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
769 /* for banked memory reads/writes */
770 if (hw <= HT_BANKMAX)
771 {
772 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data;
773 return;
774 }
775 }
776
777 /* fall back to handler */
778 {
779 int shift = (address & 1) << 3;
780 data = (0xff000000 >> shift) | ((data & 0xff) << shift);
781 address &= ~1;
782 }
783 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
784 }
785
786 //WRITEWORD(cpu_writemem29, TYPE_16BIT_LE, 29, CAN_BE_MISALIGNED)
787 #ifdef MAME_MEMINLINE
788 INLINE
789 #endif
cpu_writemem29_word(offs_t address,data_t data)790 void cpu_writemem29_word(offs_t address,data_t data)
791 {
792 MHELE hw;
793
794 /* handle aligned case first */
795 if (!(address & 1))
796 {
797 /* first-level lookup */
798 hw = cur_mwhard[(UINT32)address >> (ABITS2_29 + ABITS_MIN_29)];
799 if (hw <= HT_BANKMAX)
800 {
801 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
802 return;
803 }
804
805 /* second-level lookup */
806 if (hw >= MH_HARDMAX)
807 {
808 hw -= MH_HARDMAX;
809 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_29) & MHMASK(ABITS2_29))];
810 if (hw <= HT_BANKMAX)
811 {
812 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
813 return;
814 }
815 }
816
817 /* fall back to handler */
818 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data & 0xffff);
819 }
820 /* unaligned case */
821 else
822 {
823 cpu_writemem29(address, data & 0xff);
824 cpu_writemem29(address + 1, data >> 8);
825 }
826 }
827
828 //WRITELONG(cpu_writemem29, TYPE_16BIT_LE, 29, CAN_BE_MISALIGNED)
829 #ifdef MAME_MEMINLINE
830 INLINE
831 #endif
cpu_writemem29_dword(offs_t address,data_t data)832 void cpu_writemem29_dword(offs_t address,data_t data)
833 {
834 UINT16 word1, word2;
835 MHELE hw1, hw2;
836
837 /* handle aligned case first */
838 if (!(address & 1))
839 {
840 int address2 = (address + 2) & ADDRESS_MASK(29);
841
842 /* first-level lookup */
843 hw1 = cur_mwhard[(UINT32)address >> (ABITS2_29 + ABITS_MIN_29)];
844 hw2 = cur_mwhard[(UINT32)address2 >> (ABITS2_29 + ABITS_MIN_29)];
845
846 /* second-level lookup */
847 if (hw1 >= MH_HARDMAX)
848 {
849 hw1 -= MH_HARDMAX;
850 hw1 = writehardware[(hw1 << MH_SBITS) + (((UINT32)address >> ABITS_MIN_29) & MHMASK(ABITS2_29))];
851 }
852 if (hw2 >= MH_HARDMAX)
853 {
854 hw2 -= MH_HARDMAX;
855 hw2 = writehardware[(hw2 << MH_SBITS) + (((UINT32)address2 >> ABITS_MIN_29) & MHMASK(ABITS2_29))];
856 }
857
858 /* extract words */
859 word1 = data & 0xffff;
860 word2 = data >> 16;
861
862 /* process each word */
863 if (hw1 <= HT_BANKMAX)
864 WRITE_WORD(&cpu_bankbase[hw1][address - memorywriteoffset[hw1]], word1);
865 else
866 (*memorywritehandler[hw1])(address - memorywriteoffset[hw1], word1);
867 if (hw2 <= HT_BANKMAX)
868 WRITE_WORD(&cpu_bankbase[hw2][address2 - memorywriteoffset[hw2]], word2);
869 else
870 (*memorywritehandler[hw2])(address2 - memorywriteoffset[hw2], word2);
871 }
872
873 /* unaligned case */
874 else
875 {
876 cpu_writemem29(address, data & 0xff);
877 cpu_writemem29_word(address + 1, (data >> 8) & 0xffff);
878 cpu_writemem29(address + 3, data >> 24);
879 }
880 }
881
882 //WRITEBYTE(cpu_writemem32, TYPE_16BIT_BE, 32)
883 #ifdef MAME_MEMINLINE
884 INLINE
885 #endif
cpu_writemem32(offs_t address,data_t data)886 void cpu_writemem32(offs_t address,data_t data)
887 {
888 MHELE hw;
889
890 /* first-level lookup */
891 hw = cur_mwhard[(UINT32)address >> (ABITS2_32 + ABITS_MIN_32)];
892
893 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
894 /* for banked memory reads/writes */
895 if (hw <= HT_BANKMAX)
896 {
897 cpu_bankbase[hw][BYTE_XOR_BE(address) - memorywriteoffset[hw]] = data;
898 return;
899 }
900
901 /* second-level lookup */
902 if (hw >= MH_HARDMAX)
903 {
904 hw -= MH_HARDMAX;
905 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_32) & MHMASK(ABITS2_32))];
906
907 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
908 /* for banked memory reads/writes */
909 if (hw <= HT_BANKMAX)
910 {
911 cpu_bankbase[hw][BYTE_XOR_BE(address) - memorywriteoffset[hw]] = data;
912 return;
913 }
914 }
915
916 /* fall back to handler */
917 {
918 int shift = ((address & 1) << 3)^8;
919 data = (0xff000000 >> shift) | ((data & 0xff) << shift);
920 address &= ~1;
921 }
922 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
923 }
924
925 //WRITEWORD(cpu_writemem32, TYPE_16BIT_BE, 32, CAN_BE_MISALIGNED)
926 #ifdef MAME_MEMINLINE
927 INLINE
928 #endif
cpu_writemem32_word(offs_t address,data_t data)929 void cpu_writemem32_word(offs_t address,data_t data)
930 {
931 MHELE hw;
932
933 /* handle aligned case first */
934 if (!(address & 1))
935 {
936 /* first-level lookup */
937 hw = cur_mwhard[(UINT32)address >> (ABITS2_32 + ABITS_MIN_32)];
938 if (hw <= HT_BANKMAX)
939 {
940 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
941 return;
942 }
943
944 /* second-level lookup */
945 if (hw >= MH_HARDMAX)
946 {
947 hw -= MH_HARDMAX;
948 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_32) & MHMASK(ABITS2_32))];
949 if (hw <= HT_BANKMAX)
950 {
951 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
952 return;
953 }
954 }
955
956 /* fall back to handler */
957 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data & 0xffff);
958 }
959 /* unaligned case */
960 else
961 {
962 cpu_writemem32(address, data >> 8);
963 cpu_writemem32(address + 1, data & 0xff);
964 }
965 }
966
967 //WRITELONG(cpu_writemem32, TYPE_16BIT_BE, 32, CAN_BE_MISALIGNED)
968 #ifdef MAME_MEMINLINE
969 INLINE
970 #endif
cpu_writemem32_dword(offs_t address,data_t data)971 void cpu_writemem32_dword(offs_t address,data_t data)
972 {
973 UINT16 word1, word2;
974 MHELE hw1, hw2;
975
976 /* handle aligned case first */
977 if (!(address & 1))
978 {
979 int address2 = (address + 2) & ADDRESS_MASK(32);
980
981 /* first-level lookup */
982 hw1 = cur_mwhard[(UINT32)address >> (ABITS2_32 + ABITS_MIN_32)];
983 hw2 = cur_mwhard[(UINT32)address2 >> (ABITS2_32 + ABITS_MIN_32)];
984
985 /* second-level lookup */
986 if (hw1 >= MH_HARDMAX)
987 {
988 hw1 -= MH_HARDMAX;
989 hw1 = writehardware[(hw1 << MH_SBITS) + (((UINT32)address >> ABITS_MIN_32) & MHMASK(ABITS2_32))];
990 }
991 if (hw2 >= MH_HARDMAX)
992 {
993 hw2 -= MH_HARDMAX;
994 hw2 = writehardware[(hw2 << MH_SBITS) + (((UINT32)address2 >> ABITS_MIN_32) & MHMASK(ABITS2_32))];
995 }
996
997 /* extract words */
998 word1 = data >> 16;
999 word2 = data & 0xffff;
1000
1001 /* process each word */
1002 if (hw1 <= HT_BANKMAX)
1003 WRITE_WORD(&cpu_bankbase[hw1][address - memorywriteoffset[hw1]], word1);
1004 else
1005 (*memorywritehandler[hw1])(address - memorywriteoffset[hw1], word1);
1006 if (hw2 <= HT_BANKMAX)
1007 WRITE_WORD(&cpu_bankbase[hw2][address2 - memorywriteoffset[hw2]], word2);
1008 else
1009 (*memorywritehandler[hw2])(address2 - memorywriteoffset[hw2], word2);
1010 }
1011
1012 /* unaligned case */
1013 else
1014 {
1015 cpu_writemem32(address, data >> 24);
1016 cpu_writemem32_word(address + 1, (data >> 8) & 0xffff);
1017 cpu_writemem32(address + 3, data & 0xff);
1018 }
1019 }
1020
1021 //WRITEBYTE(cpu_writemem32lew, TYPE_16BIT_LE, 32LEW)
1022 #ifdef MAME_MEMINLINE
1023 INLINE
1024 #endif
cpu_writemem32lew(offs_t address,data_t data)1025 void cpu_writemem32lew(offs_t address,data_t data)
1026 {
1027 MHELE hw;
1028
1029 /* first-level lookup */
1030 hw = cur_mwhard[(UINT32)address >> (ABITS2_32LEW + ABITS_MIN_32LEW)];
1031
1032 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
1033 /* for banked memory reads/writes */
1034 if (hw <= HT_BANKMAX)
1035 {
1036 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data;
1037 return;
1038 }
1039
1040 /* second-level lookup */
1041 if (hw >= MH_HARDMAX)
1042 {
1043 hw -= MH_HARDMAX;
1044 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_32LEW) & MHMASK(ABITS2_32LEW))];
1045
1046 /* for compatibility with setbankhandler, 8-bit systems must call handlers */
1047 /* for banked memory reads/writes */
1048 if (hw <= HT_BANKMAX)
1049 {
1050 cpu_bankbase[hw][BYTE_XOR_LE(address) - memorywriteoffset[hw]] = data;
1051 return;
1052 }
1053 }
1054
1055 /* fall back to handler */
1056 {
1057 int shift = (address & 1) << 3;
1058 data = (0xff000000 >> shift) | ((data & 0xff) << shift);
1059 address &= ~1;
1060 }
1061 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data);
1062 }
1063
1064 //WRITEWORD(cpu_writemem32lew, TYPE_16BIT_LE, 32LEW, CAN_BE_MISALIGNED)
1065 #ifdef MAME_MEMINLINE
1066 INLINE
1067 #endif
cpu_writemem32lew_word(offs_t address,data_t data)1068 void cpu_writemem32lew_word(offs_t address,data_t data)
1069 {
1070 MHELE hw;
1071
1072 /* handle aligned case first */
1073 if (!(address & 1))
1074 {
1075 /* first-level lookup */
1076 hw = cur_mwhard[(UINT32)address >> (ABITS2_32LEW + ABITS_MIN_32LEW)];
1077 if (hw <= HT_BANKMAX)
1078 {
1079 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
1080 return;
1081 }
1082
1083 /* second-level lookup */
1084 if (hw >= MH_HARDMAX)
1085 {
1086 hw -= MH_HARDMAX;
1087 hw = writehardware[(hw << MH_SBITS) + (((UINT32)address >> ABITS_MIN_32LEW) & MHMASK(ABITS2_32LEW))];
1088 if (hw <= HT_BANKMAX)
1089 {
1090 WRITE_WORD(&cpu_bankbase[hw][address - memorywriteoffset[hw]], data);
1091 return;
1092 }
1093 }
1094
1095 /* fall back to handler */
1096 (*memorywritehandler[hw])(address - memorywriteoffset[hw], data & 0xffff);
1097 }
1098
1099 /* unaligned case */
1100 else
1101 {
1102 cpu_writemem32lew(address, data & 0xff);
1103 cpu_writemem32lew(address + 1, data >> 8);
1104 }
1105 }
1106
1107 //WRITELONG(cpu_writemem32lew, TYPE_16BIT_LE, 32LEW, CAN_BE_MISALIGNED)
1108 #ifdef MAME_MEMINLINE
1109 INLINE
1110 #endif
cpu_writemem32lew_dword(offs_t address,data_t data)1111 void cpu_writemem32lew_dword(offs_t address,data_t data)
1112 {
1113 UINT16 word1, word2;
1114 MHELE hw1, hw2;
1115
1116 /* handle aligned case first */
1117 if (!(address & 1))
1118 {
1119 int address2 = (address + 2) & ADDRESS_MASK(32LEW);
1120
1121 /* first-level lookup */
1122 hw1 = cur_mwhard[(UINT32)address >> (ABITS2_32LEW + ABITS_MIN_32LEW)];
1123 hw2 = cur_mwhard[(UINT32)address2 >> (ABITS2_32LEW + ABITS_MIN_32LEW)];
1124
1125 /* second-level lookup */
1126 if (hw1 >= MH_HARDMAX)
1127 {
1128 hw1 -= MH_HARDMAX;
1129 hw1 = writehardware[(hw1 << MH_SBITS) + (((UINT32)address >> ABITS_MIN_32LEW) & MHMASK(ABITS2_32LEW))];
1130 }
1131 if (hw2 >= MH_HARDMAX)
1132 {
1133 hw2 -= MH_HARDMAX;
1134 hw2 = writehardware[(hw2 << MH_SBITS) + (((UINT32)address2 >> ABITS_MIN_32LEW) & MHMASK(ABITS2_32LEW))];
1135 }
1136
1137 /* extract words */
1138 word1 = data & 0xffff;
1139 word2 = data >> 16;
1140
1141 /* process each word */
1142 if (hw1 <= HT_BANKMAX)
1143 WRITE_WORD(&cpu_bankbase[hw1][address - memorywriteoffset[hw1]], word1);
1144 else
1145 (*memorywritehandler[hw1])(address - memorywriteoffset[hw1], word1);
1146 if (hw2 <= HT_BANKMAX)
1147 WRITE_WORD(&cpu_bankbase[hw2][address2 - memorywriteoffset[hw2]], word2);
1148 else
1149 (*memorywritehandler[hw2])(address2 - memorywriteoffset[hw2], word2);
1150 }
1151
1152 /* unaligned case */
1153 else
1154 {
1155 cpu_writemem32lew(address, data & 0xff);
1156 cpu_writemem32lew_word(address + 1, (data >> 8) & 0xffff);
1157 cpu_writemem32lew(address + 3, data >> 24);
1158 }
1159 }
1160