Home
last modified time | relevance | path

Searched defs:csr_swap (Results 1 – 25 of 71) sorted by relevance

123

/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/riscv/include/asm/
H A Dcsr.h66 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/riscv/include/asm/
H A Dcsr.h66 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/riscv/include/asm/
H A Dcsr.h66 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/riscv/include/asm/
H A Dcsr.h66 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/riscv/include/asm/
H A Dcsr.h66 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/opensbi/include/sbi/
H A Driscv_asm.h84 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/opensbi/include/sbi/
H A Driscv_asm.h84 #define csr_swap(csr, val) \ macro
/dports/sysutils/opensbi/opensbi-0.9/include/sbi/
H A Driscv_asm.h84 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu/qemu-6.2.0/roms/opensbi/include/sbi/
H A Driscv_asm.h84 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/opensbi/include/sbi/
H A Driscv_asm.h86 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/opensbi/include/sbi/
H A Driscv_asm.h86 #define csr_swap(csr, val) \ macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/opensbi/include/sbi/
H A Driscv_asm.h86 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-tools/u-boot-2020.07/arch/riscv/include/asm/
H A Dcsr.h109 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/riscv/include/asm/
H A Dcsr.h149 #define csr_swap(csr, val) \ macro

123