1 #ifndef _OPENCV_OCL4DNN_DEFAULT_KERNEL_CONFIG_HPP_ 2 #define _OPENCV_OCL4DNN_DEFAULT_KERNEL_CONFIG_HPP_ 3 const char *default_kernel_config_intel_fp32[] = { 4 // Below is the information for OpenCL based on which these configurations tuned 5 /******************************************************************************* 6 Number of platforms 1 7 Platform Name Intel(R) OpenCL HD Graphics 8 Platform Vendor Intel(R) Corporation 9 Platform Version OpenCL 2.1 10 Platform Profile FULL_PROFILE 11 Platform Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_khr_fp64 cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation 12 Platform Host timer resolution 1ns 13 Platform Extensions function suffix INTEL 14 15 Platform Name Intel(R) OpenCL HD Graphics 16 Number of devices 1 17 Device Name Intel(R) Gen9 HD Graphics NEO 18 Device Vendor Intel(R) Corporation 19 Device Vendor ID 0x8086 20 Device Version OpenCL 2.1 NEO 21 Driver Version 2018ww15-010713 22 Device OpenCL C Version OpenCL C 2.0 23 Device Type GPU 24 Device Profile FULL_PROFILE 25 Max compute units 72 26 Max clock frequency 950MHz 27 Device Partition (core) 28 Max number of sub-devices 0 29 Supported partition types None 30 Max work item dimensions 3 31 Max work item sizes 256x256x256 32 Max work group size 256 33 Preferred work group size multiple 32 34 Max sub-groups per work group 32 35 Preferred / native vector sizes 36 char 16 / 16 37 short 8 / 8 38 int 4 / 4 39 long 1 / 1 40 half 8 / 8 (cl_khr_fp16) 41 float 1 / 1 42 double 1 / 1 (cl_khr_fp64) 43 Half-precision Floating-point support (cl_khr_fp16) 44 Denormals Yes 45 Infinity and NANs Yes 46 Round to nearest Yes 47 Round to zero Yes 48 Round to infinity Yes 49 IEEE754-2008 fused multiply-add Yes 50 Support is emulated in software No 51 Correctly-rounded divide and sqrt operations No 52 Single-precision Floating-point support (core) 53 Denormals Yes 54 Infinity and NANs Yes 55 Round to nearest Yes 56 Round to zero Yes 57 Round to infinity Yes 58 IEEE754-2008 fused multiply-add Yes 59 Support is emulated in software No 60 Correctly-rounded divide and sqrt operations Yes 61 Double-precision Floating-point support (cl_khr_fp64) 62 Denormals Yes 63 Infinity and NANs Yes 64 Round to nearest Yes 65 Round to zero Yes 66 Round to infinity Yes 67 IEEE754-2008 fused multiply-add Yes 68 Support is emulated in software No 69 Correctly-rounded divide and sqrt operations No 70 Address bits 64, Little-Endian 71 Global memory size 26892222464 (25.05GiB) 72 Error Correction support No 73 Max memory allocation 4294959104 (4GiB) 74 Unified memory for Host and Device Yes 75 Shared Virtual Memory (SVM) capabilities (core) 76 Coarse-grained buffer sharing Yes 77 Fine-grained buffer sharing No 78 Fine-grained system sharing No 79 Atomics No 80 Minimum alignment for any data type 128 bytes 81 Alignment of base address 1024 bits (128 bytes) 82 Preferred alignment for atomics 83 SVM 64 bytes 84 Global 64 bytes 85 Local 64 bytes 86 Max size for global variable 65536 (64KiB) 87 Preferred total size of global vars 4294959104 (4GiB) 88 Global Memory cache type Read/Write 89 Global Memory cache size 1572864 90 Global Memory cache line 64 bytes 91 Image support Yes 92 Max number of samplers per kernel 16 93 Max size for 1D images from buffer 268434944 pixels 94 Max 1D or 2D image array size 2048 images 95 Base address alignment for 2D image buffers 4 bytes 96 Pitch alignment for 2D image buffers 4 bytes 97 Max 2D image size 16384x16384 pixels 98 Max 3D image size 16384x16384x2048 pixels 99 Max number of read image args 128 100 Max number of write image args 128 101 Max number of read/write image args 128 102 Max number of pipe args 16 103 Max active pipe reservations 1 104 Max pipe packet size 1024 105 Local memory type Local 106 Local memory size 65536 (64KiB) 107 Max constant buffer size 4294959104 (4GiB) 108 Max number of constant args 8 109 Max size of kernel argument 1024 110 Queue properties (on host) 111 Out-of-order execution Yes 112 Profiling Yes 113 Queue properties (on device) 114 Out-of-order execution Yes 115 Profiling Yes 116 Preferred size 131072 (128KiB) 117 Max size 67108864 (64MiB) 118 Max queues on device 1 119 Max events on device 1024 120 Prefer user sync for interop Yes 121 Profiling timer resolution 83ns 122 Execution capabilities 123 Run OpenCL kernels Yes 124 Run native kernels No 125 Sub-group independent forward progress Yes 126 IL version SPIR-V_1.0 127 SPIR versions 1.2 128 printf() buffer size 4194304 (4MiB) 129 Built-in kernels block_motion_estimate_intel;block_advanced_motion_estimate_check_intel;block_advanced_motion_estimate_bidirectional_check_intel; 130 Motion Estimation accelerator version (Intel) 2 131 Device Available Yes 132 Compiler Available Yes 133 Linker Available Yes 134 Device Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_khr_fp64 cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation 135 136 NULL platform behavior 137 clGetPlatformInfo(NULL, CL_PLATFORM_NAME, ...) Intel(R) OpenCL HD Graphics 138 clGetDeviceIDs(NULL, CL_DEVICE_TYPE_ALL, ...) Success [INTEL] 139 clCreateContext(NULL, ...) [default] Success [INTEL] 140 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CPU) No devices found in platform 141 clCreateContextFromType(NULL, CL_DEVICE_TYPE_GPU) Success (1) 142 Platform Name Intel(R) OpenCL HD Graphics 143 Device Name Intel(R) Gen9 HD Graphics NEO 144 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ACCELERATOR) No devices found in platform 145 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CUSTOM) No devices found in platform 146 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ALL) Success (1) 147 Platform Name Intel(R) OpenCL HD Graphics 148 Device Name Intel(R) Gen9 HD Graphics NEO 149 150 ICD loader properties 151 ICD loader Name OpenCL ICD Loader 152 ICD loader Vendor OCL Icd free software 153 ICD loader Version 2.2.8 154 ICD loader Profile OpenCL 1.2 155 NOTE: your OpenCL library declares to support OpenCL 1.2, 156 but it seems to support up to OpenCL 2.1 too. 157 ********************************************************************************/ 158 159 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"EU72_k3x3_cn32_g32_s1x1_d1x1_b1_in160x160_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 250 "EU72_k3x3_cn32_g32_s1x1_d1x1_b1_in160x160_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 251 "EU72_k3x3_cn3_g1_s2x2_d1x1_b1_in256x256_p0x0_num1_M32_activ5_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 252 "EU72_k3x3_cn3_g1_s2x2_d1x1_b1_in256x256_p1x1_num1_M32_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 253 "EU72_k3x3_cn512_g512_s1x1_d1x1_b1_in32x32_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 254 "EU72_k3x3_cn512_g512_s1x1_d1x1_b1_in32x32_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 255 "EU72_k3x3_cn512_g512_s2x2_d1x1_b1_in32x32_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 256 "EU72_k3x3_cn512_g512_s2x2_d1x1_b1_in32x32_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 257 "EU72_k3x3_cn64_g1_s1x1_d1x1_b1_in64x64_p1x1_num1_M192_activ1_eltwise0_FP32", "14 2 16 2 1 1 16 1 0", 258 "EU72_k3x3_cn64_g1_s2x2_d1x1_b1_in16x16_p0x0_num1_M128_activ5_eltwise0_FP32", "1 1 8 2 1 1 8 1 0", 259 "EU72_k3x3_cn64_g1_s2x2_d1x1_b1_in16x16_p1x1_num1_M128_activ1_eltwise0_FP32", "1 1 16 2 1 1 16 1 0", 260 "EU72_k3x3_cn64_g64_s2x2_d1x1_b1_in160x160_p0x0_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 261 "EU72_k3x3_cn64_g64_s2x2_d1x1_b1_in160x160_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 262 "EU72_k3x3_cn96_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M208_activ1_eltwise0_FP32", "7 2 16 2 1 1 16 1 0", 263 "EU72_k3x3_cn96_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M128_activ1_eltwise0_FP32", "7 2 16 2 1 1 16 1 0", 264 "EU72_k5x5_cn16_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M48_activ1_eltwise0_FP32", "4 2 8 2 1 1 8 1 0", 265 "EU72_k5x5_cn16_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M32_activ1_eltwise0_FP32", "6 1 16 2 1 1 16 1 0", 266 "EU72_k5x5_cn24_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP32", "5 1 16 2 1 1 16 1 0", 267 "EU72_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP32", "5 1 16 2 1 1 16 1 0", 268 "EU72_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP32", "6 1 16 2 1 1 16 1 0", 269 "EU72_k5x5_cn32_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M96_activ1_eltwise0_FP32", "7 2 16 2 1 1 16 1 0", 270 "EU72_k5x5_cn48_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP32", "4 1 16 2 1 1 16 1 0", 271 "EU72_k7x7_cn3_g1_s2x2_d1x1_b1_in224x224_p3x3_num1_M64_activ1_eltwise0_FP32", "4 3 16 2 1 1 16 1 0", 272 // Below is the information for OpenCL based on which these configurations tuned 273 /******************************************************************************* 274 Number of platforms 1 275 Platform Name Intel(R) OpenCL HD Graphics 276 Platform Vendor Intel(R) Corporation 277 Platform Version OpenCL 2.1 278 Platform Profile FULL_PROFILE 279 Platform Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_khr_fp64 cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation 280 Platform Host timer resolution 1ns 281 Platform Extensions function suffix INTEL 282 283 Platform Name Intel(R) OpenCL HD Graphics 284 Number of devices 1 285 Device Name Intel(R) Gen9 HD Graphics NEO 286 Device Vendor Intel(R) Corporation 287 Device Vendor ID 0x8086 288 Device Version OpenCL 2.1 NEO 289 Driver Version 18.21.10858 290 Device OpenCL C Version OpenCL C 2.0 291 Device Type GPU 292 Device Profile FULL_PROFILE 293 Max compute units 48 294 Max clock frequency 950MHz 295 Device Partition (core) 296 Max number of sub-devices 0 297 Supported partition types None 298 Max work item dimensions 3 299 Max work item sizes 256x256x256 300 Max work group size 256 301 Preferred work group size multiple 32 302 Max sub-groups per work group 32 303 Preferred / native vector sizes 304 char 16 / 16 305 short 8 / 8 306 int 4 / 4 307 long 1 / 1 308 half 8 / 8 (cl_khr_fp16) 309 float 1 / 1 310 double 1 / 1 (cl_khr_fp64) 311 Half-precision Floating-point support (cl_khr_fp16) 312 Denormals Yes 313 Infinity and NANs Yes 314 Round to nearest Yes 315 Round to zero Yes 316 Round to infinity Yes 317 IEEE754-2008 fused multiply-add Yes 318 Support is emulated in software No 319 Correctly-rounded divide and sqrt operations No 320 Single-precision Floating-point support (core) 321 Denormals Yes 322 Infinity and NANs Yes 323 Round to nearest Yes 324 Round to zero Yes 325 Round to infinity Yes 326 IEEE754-2008 fused multiply-add Yes 327 Support is emulated in software No 328 Correctly-rounded divide and sqrt operations Yes 329 Double-precision Floating-point support (cl_khr_fp64) 330 Denormals Yes 331 Infinity and NANs Yes 332 Round to nearest Yes 333 Round to zero Yes 334 Round to infinity Yes 335 IEEE754-2008 fused multiply-add Yes 336 Support is emulated in software No 337 Correctly-rounded divide and sqrt operations No 338 Address bits 64, Little-Endian 339 Global memory size 13364170752 (12.45GiB) 340 Error Correction support No 341 Max memory allocation 4294959104 (4GiB) 342 Unified memory for Host and Device Yes 343 Shared Virtual Memory (SVM) capabilities (core) 344 Coarse-grained buffer sharing Yes 345 Fine-grained buffer sharing No 346 Fine-grained system sharing No 347 Atomics No 348 Minimum alignment for any data type 128 bytes 349 Alignment of base address 1024 bits (128 bytes) 350 Preferred alignment for atomics 351 SVM 64 bytes 352 Global 64 bytes 353 Local 64 bytes 354 Max size for global variable 65536 (64KiB) 355 Preferred total size of global vars 4294959104 (4GiB) 356 Global Memory cache type Read/Write 357 Global Memory cache size 1048576 358 Global Memory cache line 64 bytes 359 Image support Yes 360 Max number of samplers per kernel 16 361 Max size for 1D images from buffer 268434944 pixels 362 Max 1D or 2D image array size 2048 images 363 Base address alignment for 2D image buffers 4 bytes 364 Pitch alignment for 2D image buffers 4 bytes 365 Max 2D image size 16384x16384 pixels 366 Max 3D image size 16384x16384x2048 pixels 367 Max number of read image args 128 368 Max number of write image args 128 369 Max number of read/write image args 128 370 Max number of pipe args 16 371 Max active pipe reservations 1 372 Max pipe packet size 1024 373 Local memory type Local 374 Local memory size 65536 (64KiB) 375 Max constant buffer size 4294959104 (4GiB) 376 Max number of constant args 8 377 Max size of kernel argument 1024 378 Queue properties (on host) 379 Out-of-order execution Yes 380 Profiling Yes 381 Queue properties (on device) 382 Out-of-order execution Yes 383 Profiling Yes 384 Preferred size 131072 (128KiB) 385 Max size 67108864 (64MiB) 386 Max queues on device 1 387 Max events on device 1024 388 Prefer user sync for interop Yes 389 Profiling timer resolution 83ns 390 Execution capabilities 391 Run OpenCL kernels Yes 392 Run native kernels No 393 Sub-group independent forward progress Yes 394 IL version SPIR-V_1.0 395 SPIR versions 1.2 396 printf() buffer size 4194304 (4MiB) 397 Built-in kernels block_motion_estimate_intel;block_advanced_motion_estimate_check_intel;block_advanced_motion_estimate_bidirectional_check_intel; 398 Motion Estimation accelerator version (Intel) 2 399 Device Available Yes 400 Compiler Available Yes 401 Linker Available Yes 402 Device Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_khr_fp64 cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation 403 404 NULL platform behavior 405 clGetPlatformInfo(NULL, CL_PLATFORM_NAME, ...) No platform 406 clGetDeviceIDs(NULL, CL_DEVICE_TYPE_ALL, ...) No platform 407 clCreateContext(NULL, ...) [default] No platform 408 clCreateContext(NULL, ...) [other] Success [INTEL] 409 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CPU) No platform 410 clCreateContextFromType(NULL, CL_DEVICE_TYPE_GPU) No platform 411 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ACCELERATOR) No platform 412 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CUSTOM) No platform 413 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ALL) No platform 414 ********************************************************************************/ 415 "EU48_k1x1_cn1024_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M1024_activ1_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 416 "EU48_k1x1_cn1024_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M1024_activ5_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 417 "EU48_k1x1_cn1024_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M126_activ0_eltwise0_FP32", "10 1 16 2 1 1 16 1 0", 418 "EU48_k1x1_cn1024_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M24_activ0_eltwise0_FP32", "5 1 8 2 1 1 8 1 0", 419 "EU48_k1x1_cn1024_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ1_eltwise0_FP32", "10 1 16 2 1 1 16 1 0", 420 "EU48_k1x1_cn1024_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ5_eltwise0_FP32", "10 1 16 2 1 1 16 1 0", 421 "EU48_k1x1_cn1024_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M546_activ0_eltwise0_FP32", "10 1 16 2 1 1 16 1 0", 422 "EU48_k1x1_cn128_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M126_activ0_eltwise0_FP32", "1 1 8 2 1 1 8 1 0", 423 "EU48_k1x1_cn128_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M24_activ0_eltwise0_FP32", "1 1 8 2 1 1 8 1 0", 424 "EU48_k1x1_cn128_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M546_activ0_eltwise0_FP32", "1 1 16 2 1 1 16 1 0", 425 "EU48_k1x1_cn128_g1_s1x1_d1x1_b1_in48x48_p0x0_num1_M256_activ1_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 426 "EU48_k1x1_cn128_g1_s1x1_d1x1_b1_in48x48_p0x0_num1_M256_activ5_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 427 "EU48_k1x1_cn128_g1_s1x1_d1x1_b1_in80x80_p0x0_num1_M128_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 428 "EU48_k1x1_cn128_g1_s1x1_d1x1_b1_in80x80_p0x0_num1_M128_activ5_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 429 "EU48_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M16_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 430 "EU48_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M32_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 431 "EU48_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M64_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 432 "EU48_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M96_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 433 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M126_activ0_eltwise0_FP32", "3 1 8 2 1 1 8 1 0", 434 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP32", "3 1 8 2 1 1 8 1 0", 435 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ5_eltwise0_FP32", "3 1 8 2 1 1 8 1 0", 436 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M24_activ0_eltwise0_FP32", "1 1 8 2 1 1 8 1 0", 437 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M546_activ0_eltwise0_FP32", "3 1 16 2 1 1 16 1 0", 438 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M64_activ1_eltwise0_FP32", "2 1 8 2 1 1 8 1 0", 439 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M64_activ5_eltwise0_FP32", "1 1 8 2 1 1 8 1 0", 440 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M128_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 441 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M32_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 442 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M512_activ1_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 443 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M512_activ5_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 444 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M64_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 445 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in48x48_p0x0_num1_M256_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 446 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in48x48_p0x0_num1_M256_activ5_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 447 "EU48_k1x1_cn32_g1_s1x1_d1x1_b1_in160x160_p0x0_num1_M64_activ1_eltwise0_FP32", "1 16 32 5 1 16 1 1 0", 448 "EU48_k1x1_cn32_g1_s1x1_d1x1_b1_in160x160_p0x0_num1_M64_activ5_eltwise0_FP32", "1 16 32 5 1 16 1 1 0", 449 "EU48_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M16_activ1_eltwise0_FP32", "8 1 8 2 1 1 8 1 0", 450 "EU48_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M192_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 451 "EU48_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M64_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 452 "EU48_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M96_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 453 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M1024_activ1_eltwise0_FP32", "10 1 16 2 1 1 16 1 0", 454 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M1024_activ5_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 455 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M112_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 456 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M126_activ0_eltwise0_FP32", "5 1 8 2 1 1 8 1 0", 457 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 458 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ5_eltwise0_FP32", "5 1 8 2 1 1 8 1 0", 459 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M144_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 460 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 461 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M24_activ0_eltwise0_FP32", "4 1 8 2 1 1 8 1 0", 462 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M24_activ1_eltwise0_FP32", "8 1 8 2 1 1 8 1 0", 463 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M32_activ1_eltwise0_FP32", "8 1 8 2 1 1 8 1 0", 464 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M546_activ0_eltwise0_FP32", "5 1 16 2 1 1 16 1 0", 465 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M64_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 466 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M12_activ0_eltwise0_FP32", "9 1 16 2 1 1 16 1 0", 467 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M273_activ0_eltwise0_FP32", "10 1 16 2 1 1 16 1 0", 468 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M512_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 469 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M512_activ5_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 470 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M63_activ0_eltwise0_FP32", "10 1 16 2 1 1 16 1 0", 471 "EU48_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 472 "EU48_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 473 "EU48_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 474 "EU48_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M32_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 475 "EU48_k1x1_cn64_g1_s1x1_d1x1_b1_in64x64_p0x0_num1_M64_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 476 "EU48_k1x1_cn64_g1_s1x1_d1x1_b1_in80x80_p0x0_num1_M128_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 477 "EU48_k1x1_cn64_g1_s1x1_d1x1_b1_in80x80_p0x0_num1_M128_activ5_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 478 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP32", "7 2 8 2 1 1 8 1 0", 479 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 480 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M192_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 481 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 482 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M32_activ1_eltwise0_FP32", "4 1 8 2 1 1 8 1 0", 483 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M384_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 484 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M48_activ1_eltwise0_FP32", "4 1 8 2 1 1 8 1 0", 485 "EU48_k3x3_cn1024_g1024_s1x1_d1x1_b1_in16x16_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 486 "EU48_k3x3_cn1024_g1024_s1x1_d1x1_b1_in16x16_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 487 "EU48_k3x3_cn112_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M224_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 488 "EU48_k3x3_cn128_g128_s1x1_d1x1_b1_in80x80_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 489 "EU48_k3x3_cn128_g128_s1x1_d1x1_b1_in80x80_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 490 "EU48_k3x3_cn128_g128_s2x2_d1x1_b1_in80x80_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 491 "EU48_k3x3_cn128_g128_s2x2_d1x1_b1_in80x80_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 492 "EU48_k3x3_cn128_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M256_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 493 "EU48_k3x3_cn128_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M192_activ1_eltwise0_FP32", "14 2 16 2 1 1 16 1 0", 494 "EU48_k3x3_cn128_g1_s2x2_d1x1_b1_in16x16_p0x0_num1_M256_activ5_eltwise0_FP32", "2 1 16 2 1 1 16 1 0", 495 "EU48_k3x3_cn128_g1_s2x2_d1x1_b1_in16x16_p1x1_num1_M256_activ1_eltwise0_FP32", "3 1 8 2 1 1 8 1 0", 496 "EU48_k3x3_cn144_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M288_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 497 "EU48_k3x3_cn160_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M320_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 498 "EU48_k3x3_cn192_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M384_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 499 "EU48_k3x3_cn256_g1_s2x2_d1x1_b1_in16x16_p0x0_num1_M512_activ5_eltwise0_FP32", "5 1 16 2 1 1 16 1 0", 500 "EU48_k3x3_cn256_g1_s2x2_d1x1_b1_in16x16_p1x1_num1_M512_activ1_eltwise0_FP32", "5 1 16 2 1 1 16 1 0", 501 "EU48_k3x3_cn256_g256_s1x1_d1x1_b1_in48x48_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 502 "EU48_k3x3_cn256_g256_s1x1_d1x1_b1_in48x48_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 503 "EU48_k3x3_cn256_g256_s2x2_d1x1_b1_in48x48_p0x0_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 504 "EU48_k3x3_cn256_g256_s2x2_d1x1_b1_in48x48_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 505 "EU48_k3x3_cn32_g32_s1x1_d1x1_b1_in160x160_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 506 "EU48_k3x3_cn32_g32_s1x1_d1x1_b1_in160x160_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 507 "EU48_k3x3_cn3_g1_s2x2_d1x1_b1_in256x256_p0x0_num1_M32_activ5_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 508 "EU48_k3x3_cn3_g1_s2x2_d1x1_b1_in256x256_p1x1_num1_M32_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 509 "EU48_k3x3_cn512_g512_s1x1_d1x1_b1_in32x32_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 510 "EU48_k3x3_cn512_g512_s1x1_d1x1_b1_in32x32_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 511 "EU48_k3x3_cn512_g512_s2x2_d1x1_b1_in32x32_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 512 "EU48_k3x3_cn512_g512_s2x2_d1x1_b1_in32x32_p1x1_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 513 "EU48_k3x3_cn64_g1_s1x1_d1x1_b1_in64x64_p1x1_num1_M192_activ1_eltwise0_FP32", "14 2 16 2 1 1 16 1 0", 514 "EU48_k3x3_cn64_g1_s2x2_d1x1_b1_in16x16_p0x0_num1_M128_activ5_eltwise0_FP32", "1 1 8 2 1 1 8 1 0", 515 "EU48_k3x3_cn64_g1_s2x2_d1x1_b1_in16x16_p1x1_num1_M128_activ1_eltwise0_FP32", "1 1 8 2 1 1 8 1 0", 516 "EU48_k3x3_cn64_g64_s2x2_d1x1_b1_in160x160_p0x0_num1_M1_activ5_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 517 "EU48_k3x3_cn64_g64_s2x2_d1x1_b1_in160x160_p1x1_num1_M1_activ1_eltwise0_FP32", "1 1 1 6 1 1 1 0 0", 518 "EU48_k3x3_cn96_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M208_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 519 "EU48_k3x3_cn96_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M128_activ1_eltwise0_FP32", "14 2 16 2 1 1 16 1 0", 520 "EU48_k5x5_cn16_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M48_activ1_eltwise0_FP32", "4 2 8 2 1 1 8 1 0", 521 "EU48_k5x5_cn16_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M32_activ1_eltwise0_FP32", "4 3 8 2 1 1 8 1 0", 522 "EU48_k5x5_cn24_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP32", "4 1 16 2 1 1 16 1 0", 523 "EU48_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 524 "EU48_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP32", "4 2 8 2 1 1 8 1 0", 525 "EU48_k5x5_cn32_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M96_activ1_eltwise0_FP32", "4 7 8 2 1 1 8 1 0", 526 "EU48_k5x5_cn48_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP32", "4 1 16 2 1 1 16 1 0", 527 "EU48_k7x7_cn3_g1_s2x2_d1x1_b1_in224x224_p3x3_num1_M64_activ1_eltwise0_FP32", "5 4 16 2 1 1 16 1 0", 528 "EU48_k11x11_cn3_g1_s4x4_d1x1_b1_in240x240_p0x0_num1_M96_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 529 "EU48_k3x3_cn256_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M384_activ1_eltwise0_FP32", "13 1 16 2 1 1 16 1 0", 530 "EU48_k3x3_cn384_g2_s1x1_d1x1_b1_in16x16_p1x1_num1_M128_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 531 "EU48_k3x3_cn384_g2_s1x1_d1x1_b1_in16x16_p1x1_num1_M192_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 532 "EU48_k5x5_cn96_g2_s1x1_d1x1_b1_in32x32_p2x2_num1_M128_activ1_eltwise0_FP32", "3 9 8 2 1 1 8 1 0", 533 // Below is the information for OpenCL based on which these configurations tuned 534 /******************************************************************************* 535 Number of platforms 1 536 Platform Name Intel(R) OpenCL HD Graphics 537 Platform Vendor Intel(R) Corporation 538 Platform Version OpenCL 2.1 539 Platform Profile FULL_PROFILE 540 Platform Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_fp64 cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation cl_intel_va_api_media_sharing 541 Platform Host timer resolution 1ns 542 Platform Extensions function suffix INTEL 543 544 Platform Name Intel(R) OpenCL HD Graphics 545 Number of devices 1 546 Device Name Intel(R) Gen9 HD Graphics NEO 547 Device Vendor Intel(R) Corporation 548 Device Vendor ID 0x8086 549 Device Version OpenCL 2.1 NEO 550 Driver Version 18.23.10915 551 Device OpenCL C Version OpenCL C 2.0 552 Device Type GPU 553 Device Profile FULL_PROFILE 554 Max compute units 24 555 Max clock frequency 1150MHz 556 Device Partition (core) 557 Max number of sub-devices 0 558 Supported partition types None 559 Max work item dimensions 3 560 Max work item sizes 256x256x256 561 Max work group size 256 562 Preferred work group size multiple 32 563 Max sub-groups per work group 32 564 Preferred / native vector sizes 565 char 16 / 16 566 short 8 / 8 567 int 4 / 4 568 long 1 / 1 569 half 8 / 8 (cl_khr_fp16) 570 float 1 / 1 571 double 1 / 1 (cl_khr_fp64) 572 Half-precision Floating-point support (cl_khr_fp16) 573 Denormals Yes 574 Infinity and NANs Yes 575 Round to nearest Yes 576 Round to zero Yes 577 Round to infinity Yes 578 IEEE754-2008 fused multiply-add Yes 579 Support is emulated in software No 580 Correctly-rounded divide and sqrt operations No 581 Single-precision Floating-point support (core) 582 Denormals Yes 583 Infinity and NANs Yes 584 Round to nearest Yes 585 Round to zero Yes 586 Round to infinity Yes 587 IEEE754-2008 fused multiply-add Yes 588 Support is emulated in software No 589 Correctly-rounded divide and sqrt operations Yes 590 Double-precision Floating-point support (cl_khr_fp64) 591 Denormals Yes 592 Infinity and NANs Yes 593 Round to nearest Yes 594 Round to zero Yes 595 Round to infinity Yes 596 IEEE754-2008 fused multiply-add Yes 597 Support is emulated in software No 598 Correctly-rounded divide and sqrt operations No 599 Address bits 64, Little-Endian 600 Global memory size 6575288320 (6.124GiB) 601 Error Correction support No 602 Max memory allocation 3287644160 (3.062GiB) 603 Unified memory for Host and Device Yes 604 Shared Virtual Memory (SVM) capabilities (core) 605 Coarse-grained buffer sharing Yes 606 Fine-grained buffer sharing No 607 Fine-grained system sharing No 608 Atomics No 609 Minimum alignment for any data type 128 bytes 610 Alignment of base address 1024 bits (128 bytes) 611 Preferred alignment for atomics 612 SVM 64 bytes 613 Global 64 bytes 614 Local 64 bytes 615 Max size for global variable 65536 (64KiB) 616 Preferred total size of global vars 3287644160 (3.062GiB) 617 Global Memory cache type Read/Write 618 Global Memory cache size 524288 619 Global Memory cache line 64 bytes 620 Image support Yes 621 Max number of samplers per kernel 16 622 Max size for 1D images from buffer 205477760 pixels 623 Max 1D or 2D image array size 2048 images 624 Base address alignment for 2D image buffers 4 bytes 625 Pitch alignment for 2D image buffers 4 bytes 626 Max 2D image size 16384x16384 pixels 627 Max 3D image size 16384x16384x2048 pixels 628 Max number of read image args 128 629 Max number of write image args 128 630 Max number of read/write image args 128 631 Max number of pipe args 16 632 Max active pipe reservations 1 633 Max pipe packet size 1024 634 Local memory type Local 635 Local memory size 65536 (64KiB) 636 Max constant buffer size 3287644160 (3.062GiB) 637 Max number of constant args 8 638 Max size of kernel argument 1024 639 Queue properties (on host) 640 Out-of-order execution Yes 641 Profiling Yes 642 Queue properties (on device) 643 Out-of-order execution Yes 644 Profiling Yes 645 Preferred size 131072 (128KiB) 646 Max size 67108864 (64MiB) 647 Max queues on device 1 648 Max events on device 1024 649 Prefer user sync for interop Yes 650 Profiling timer resolution 83ns 651 Execution capabilities 652 Run OpenCL kernels Yes 653 Run native kernels No 654 Sub-group independent forward progress Yes 655 IL version SPIR-V_1.0 656 SPIR versions 1.2 657 printf() buffer size 4194304 (4MiB) 658 Built-in kernels block_motion_estimate_intel;block_advanced_motion_estimate_check_intel;block_advanced_motion_estimate_bidirectional_check_intel; 659 Motion Estimation accelerator version (Intel) 2 660 Device Available Yes 661 Compiler Available Yes 662 Linker Available Yes 663 Device Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_fp64 cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation cl_intel_va_api_media_sharing 664 665 NULL platform behavior 666 clGetPlatformInfo(NULL, CL_PLATFORM_NAME, ...) Intel(R) OpenCL HD Graphics 667 clGetDeviceIDs(NULL, CL_DEVICE_TYPE_ALL, ...) Success [INTEL] 668 clCreateContext(NULL, ...) [default] Success [INTEL] 669 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CPU) No devices found in platform 670 clCreateContextFromType(NULL, CL_DEVICE_TYPE_GPU) Success (1) 671 Platform Name Intel(R) OpenCL HD Graphics 672 Device Name Intel(R) Gen9 HD Graphics NEO 673 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ACCELERATOR) No devices found in platform 674 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CUSTOM) No devices found in platform 675 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ALL) Success (1) 676 Platform Name Intel(R) OpenCL HD Graphics 677 Device Name Intel(R) Gen9 HD Graphics NEO 678 679 ICD loader properties 680 ICD loader Name OpenCL ICD Loader 681 ICD loader Vendor OCL Icd free software 682 ICD loader Version 2.2.8 683 ICD loader Profile OpenCL 1.2 684 NOTE: your OpenCL library declares to support OpenCL 1.2, 685 but it seems to support up to OpenCL 2.1 too. 686 ********************************************************************************/ 687 "EU24_k11x11_cn3_g1_s4x4_d1x1_b1_in240x240_p0x0_num1_M96_activ1_eltwise0_FP32", "2 5 16 2 1 1 16 1 0", 688 "EU24_k1x1_cn1024_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 689 "EU24_k1x1_cn1024_g1_s2x2_d1x1_b1_in16x16_p0x0_num1_M2048_activ0_eltwise0_FP32", "7 4 16 2 1 1 16 1 0", 690 "EU24_k1x1_cn1024_g1_s2x2_d1x1_b1_in16x16_p0x0_num1_M512_activ1_eltwise0_FP32", "7 2 16 2 1 1 16 1 0", 691 "EU24_k1x1_cn128_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M512_activ1_eltwise1_FP32", "2 8 32 5 1 8 1 1 0", 692 "EU24_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M16_activ1_eltwise0_FP32", "10 1 16 2 1 1 16 1 0", 693 "EU24_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M32_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 694 "EU24_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M64_activ1_eltwise0_FP32", "10 2 16 2 1 1 16 1 0", 695 "EU24_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M96_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 696 "EU24_k1x1_cn2048_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M512_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 697 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M1024_activ1_eltwise1_FP32", "14 1 16 2 1 1 16 1 0", 698 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M128_activ1_eltwise0_FP32", "14 2 16 2 1 1 16 1 0", 699 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M32_activ1_eltwise0_FP32", "10 1 16 2 1 1 16 1 0", 700 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M64_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 701 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in64x64_p0x0_num1_M64_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 702 "EU24_k1x1_cn256_g1_s2x2_d1x1_b1_in64x64_p0x0_num1_M128_activ1_eltwise0_FP32", "1 8 32 5 1 8 1 1 0", 703 "EU24_k1x1_cn256_g1_s2x2_d1x1_b1_in64x64_p0x0_num1_M512_activ0_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 704 "EU24_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M16_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 705 "EU24_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M192_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 706 "EU24_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M64_activ1_eltwise0_FP32", "8 1 16 2 1 1 16 1 0", 707 "EU24_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M96_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 708 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M112_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 709 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP32", "8 1 16 2 1 1 16 1 0", 710 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M144_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 711 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 712 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M2048_activ1_eltwise1_FP32", "7 1 16 2 1 1 16 1 0", 713 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M24_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 714 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M32_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 715 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M64_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 716 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M128_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 717 "EU24_k1x1_cn512_g1_s2x2_d1x1_b1_in32x32_p0x0_num1_M1024_activ0_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 718 "EU24_k1x1_cn512_g1_s2x2_d1x1_b1_in32x32_p0x0_num1_M256_activ1_eltwise0_FP32", "7 3 16 2 1 1 16 1 0", 719 "EU24_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 720 "EU24_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 721 "EU24_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 722 "EU24_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M32_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 723 "EU24_k1x1_cn64_g1_s1x1_d1x1_b1_in64x64_p0x0_num1_M256_activ0_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 724 "EU24_k1x1_cn64_g1_s1x1_d1x1_b1_in64x64_p0x0_num1_M256_activ1_eltwise1_FP32", "1 16 32 5 1 16 1 1 0", 725 "EU24_k1x1_cn64_g1_s1x1_d1x1_b1_in64x64_p0x0_num1_M64_activ1_eltwise0_FP32", "2 8 32 5 1 8 1 1 0", 726 "EU24_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 727 "EU24_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 728 "EU24_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M192_activ1_eltwise0_FP32", "7 2 16 2 1 1 16 1 0", 729 "EU24_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 730 "EU24_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M32_activ1_eltwise0_FP32", "7 1 8 2 1 1 8 1 0", 731 "EU24_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M384_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 732 "EU24_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M48_activ1_eltwise0_FP32", "4 1 16 2 1 1 16 1 0", 733 "EU24_k3x3_cn112_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M224_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 734 "EU24_k3x3_cn128_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M256_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 735 "EU24_k3x3_cn128_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M128_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 736 "EU24_k3x3_cn128_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M192_activ1_eltwise0_FP32", "14 2 16 2 1 1 16 1 0", 737 "EU24_k3x3_cn144_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M288_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 738 "EU24_k3x3_cn160_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M320_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 739 "EU24_k3x3_cn192_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M384_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 740 "EU24_k3x3_cn256_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M256_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 741 "EU24_k3x3_cn256_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M384_activ1_eltwise0_FP32", "13 1 16 2 1 1 16 1 0", 742 "EU24_k3x3_cn384_g2_s1x1_d1x1_b1_in16x16_p1x1_num1_M128_activ1_eltwise0_FP32", "13 1 16 2 1 1 16 1 0", 743 "EU24_k3x3_cn384_g2_s1x1_d1x1_b1_in16x16_p1x1_num1_M192_activ1_eltwise0_FP32", "13 1 16 2 1 1 16 1 0", 744 "EU24_k3x3_cn512_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M512_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 745 "EU24_k3x3_cn64_g1_s1x1_d1x1_b1_in64x64_p1x1_num1_M192_activ1_eltwise0_FP32", "14 2 16 2 1 1 16 1 0", 746 "EU24_k3x3_cn64_g1_s1x1_d1x1_b1_in64x64_p1x1_num1_M64_activ1_eltwise0_FP32", "14 2 16 2 1 1 16 1 0", 747 "EU24_k3x3_cn96_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M208_activ1_eltwise0_FP32", "14 2 16 2 1 1 16 1 0", 748 "EU24_k3x3_cn96_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M128_activ1_eltwise0_FP32", "14 1 16 2 1 1 16 1 0", 749 "EU24_k5x5_cn16_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M48_activ1_eltwise0_FP32", "5 1 16 2 1 1 16 1 0", 750 "EU24_k5x5_cn16_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M32_activ1_eltwise0_FP32", "4 3 8 2 1 1 8 1 0", 751 "EU24_k5x5_cn24_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP32", "5 1 16 2 1 1 16 1 0", 752 "EU24_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP32", "4 1 16 2 1 1 16 1 0", 753 "EU24_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP32", "7 1 16 2 1 1 16 1 0", 754 "EU24_k5x5_cn32_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M96_activ1_eltwise0_FP32", "7 2 16 2 1 1 16 1 0", 755 "EU24_k5x5_cn48_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP32", "3 7 8 2 1 1 8 1 0", 756 "EU24_k5x5_cn96_g2_s1x1_d1x1_b1_in32x32_p2x2_num1_M128_activ1_eltwise0_FP32", "9 3 16 2 1 1 16 1 0", 757 "EU24_k7x7_cn3_g1_s2x2_d1x1_b1_in224x224_p3x3_num1_M64_activ1_eltwise0_FP32", "4 4 16 2 1 1 16 1 0", 758 }; 759 760 const char *default_kernel_config_intel_fp16[] = { 761 // Below is the information for OpenCL based on which these configurations tuned 762 /******************************************************************************* 763 Number of platforms 1 764 Platform Name Intel(R) OpenCL HD Graphics 765 Platform Vendor Intel(R) Corporation 766 Platform Version OpenCL 2.1 767 Platform Profile FULL_PROFILE 768 Platform Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_khr_fp64 cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation 769 Platform Host timer resolution 1ns 770 Platform Extensions function suffix INTEL 771 772 Platform Name Intel(R) OpenCL HD Graphics 773 Number of devices 1 774 Device Name Intel(R) Gen9 HD Graphics NEO 775 Device Vendor Intel(R) Corporation 776 Device Vendor ID 0x8086 777 Device Version OpenCL 2.1 NEO 778 Driver Version 18.21.10858 779 Device OpenCL C Version OpenCL C 2.0 780 Device Type GPU 781 Device Profile FULL_PROFILE 782 Max compute units 48 783 Max clock frequency 950MHz 784 Device Partition (core) 785 Max number of sub-devices 0 786 Supported partition types None 787 Max work item dimensions 3 788 Max work item sizes 256x256x256 789 Max work group size 256 790 Preferred work group size multiple 32 791 Max sub-groups per work group 32 792 Preferred / native vector sizes 793 char 16 / 16 794 short 8 / 8 795 int 4 / 4 796 long 1 / 1 797 half 8 / 8 (cl_khr_fp16) 798 float 1 / 1 799 double 1 / 1 (cl_khr_fp64) 800 Half-precision Floating-point support (cl_khr_fp16) 801 Denormals Yes 802 Infinity and NANs Yes 803 Round to nearest Yes 804 Round to zero Yes 805 Round to infinity Yes 806 IEEE754-2008 fused multiply-add Yes 807 Support is emulated in software No 808 Correctly-rounded divide and sqrt operations No 809 Single-precision Floating-point support (core) 810 Denormals Yes 811 Infinity and NANs Yes 812 Round to nearest Yes 813 Round to zero Yes 814 Round to infinity Yes 815 IEEE754-2008 fused multiply-add Yes 816 Support is emulated in software No 817 Correctly-rounded divide and sqrt operations Yes 818 Double-precision Floating-point support (cl_khr_fp64) 819 Denormals Yes 820 Infinity and NANs Yes 821 Round to nearest Yes 822 Round to zero Yes 823 Round to infinity Yes 824 IEEE754-2008 fused multiply-add Yes 825 Support is emulated in software No 826 Correctly-rounded divide and sqrt operations No 827 Address bits 64, Little-Endian 828 Global memory size 13364170752 (12.45GiB) 829 Error Correction support No 830 Max memory allocation 4294959104 (4GiB) 831 Unified memory for Host and Device Yes 832 Shared Virtual Memory (SVM) capabilities (core) 833 Coarse-grained buffer sharing Yes 834 Fine-grained buffer sharing No 835 Fine-grained system sharing No 836 Atomics No 837 Minimum alignment for any data type 128 bytes 838 Alignment of base address 1024 bits (128 bytes) 839 Preferred alignment for atomics 840 SVM 64 bytes 841 Global 64 bytes 842 Local 64 bytes 843 Max size for global variable 65536 (64KiB) 844 Preferred total size of global vars 4294959104 (4GiB) 845 Global Memory cache type Read/Write 846 Global Memory cache size 1048576 847 Global Memory cache line 64 bytes 848 Image support Yes 849 Max number of samplers per kernel 16 850 Max size for 1D images from buffer 268434944 pixels 851 Max 1D or 2D image array size 2048 images 852 Base address alignment for 2D image buffers 4 bytes 853 Pitch alignment for 2D image buffers 4 bytes 854 Max 2D image size 16384x16384 pixels 855 Max 3D image size 16384x16384x2048 pixels 856 Max number of read image args 128 857 Max number of write image args 128 858 Max number of read/write image args 128 859 Max number of pipe args 16 860 Max active pipe reservations 1 861 Max pipe packet size 1024 862 Local memory type Local 863 Local memory size 65536 (64KiB) 864 Max constant buffer size 4294959104 (4GiB) 865 Max number of constant args 8 866 Max size of kernel argument 1024 867 Queue properties (on host) 868 Out-of-order execution Yes 869 Profiling Yes 870 Queue properties (on device) 871 Out-of-order execution Yes 872 Profiling Yes 873 Preferred size 131072 (128KiB) 874 Max size 67108864 (64MiB) 875 Max queues on device 1 876 Max events on device 1024 877 Prefer user sync for interop Yes 878 Profiling timer resolution 83ns 879 Execution capabilities 880 Run OpenCL kernels Yes 881 Run native kernels No 882 Sub-group independent forward progress Yes 883 IL version SPIR-V_1.0 884 SPIR versions 1.2 885 printf() buffer size 4194304 (4MiB) 886 Built-in kernels block_motion_estimate_intel;block_advanced_motion_estimate_check_intel;block_advanced_motion_estimate_bidirectional_check_intel; 887 Motion Estimation accelerator version (Intel) 2 888 Device Available Yes 889 Compiler Available Yes 890 Linker Available Yes 891 Device Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_khr_fp64 cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation 892 893 NULL platform behavior 894 clGetPlatformInfo(NULL, CL_PLATFORM_NAME, ...) No platform 895 clGetDeviceIDs(NULL, CL_DEVICE_TYPE_ALL, ...) No platform 896 clCreateContext(NULL, ...) [default] No platform 897 clCreateContext(NULL, ...) [other] Success [INTEL] 898 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CPU) No platform 899 clCreateContextFromType(NULL, CL_DEVICE_TYPE_GPU) No platform 900 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ACCELERATOR) No platform 901 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CUSTOM) No platform 902 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ALL) No platform 903 ********************************************************************************/ 904 "EU48_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M16_activ1_eltwise0_FP16", "11 1 16 2 1 1 16 1 0", 905 "EU48_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M32_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 906 "EU48_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M64_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 907 "EU48_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M96_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 908 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M128_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 909 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M32_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 910 "EU48_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M64_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 911 "EU48_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M16_activ1_eltwise0_FP16", "8 1 8 2 1 1 8 1 0", 912 "EU48_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M192_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 913 "EU48_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M64_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 914 "EU48_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M96_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 915 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M112_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 916 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 917 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M144_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 918 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 919 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M24_activ1_eltwise0_FP16", "7 1 8 2 1 1 8 1 0", 920 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M32_activ1_eltwise0_FP16", "8 1 16 2 1 1 16 1 0", 921 "EU48_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M64_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 922 "EU48_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 923 "EU48_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 924 "EU48_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 925 "EU48_k1x1_cn528_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M32_activ1_eltwise0_FP16", "6 1 16 2 1 1 16 1 0", 926 "EU48_k1x1_cn64_g1_s1x1_d1x1_b1_in64x64_p0x0_num1_M64_activ1_eltwise0_FP16", "1 16 32 5 1 16 1 1 0", 927 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 928 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 929 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M192_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 930 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 931 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M32_activ1_eltwise0_FP16", "4 1 8 2 1 1 8 1 0", 932 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M384_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 933 "EU48_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M48_activ1_eltwise0_FP16", "7 1 8 2 1 1 8 1 0", 934 "EU48_k3x3_cn112_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M224_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 935 "EU48_k3x3_cn128_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M256_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 936 "EU48_k3x3_cn128_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M192_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 937 "EU48_k3x3_cn144_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M288_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 938 "EU48_k3x3_cn160_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M320_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 939 "EU48_k3x3_cn192_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M384_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 940 "EU48_k3x3_cn64_g1_s1x1_d1x1_b1_in64x64_p1x1_num1_M192_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 941 "EU48_k3x3_cn96_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M208_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 942 "EU48_k3x3_cn96_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M128_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 943 "EU48_k5x5_cn16_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M48_activ1_eltwise0_FP16", "5 1 16 2 1 1 16 1 0", 944 "EU48_k5x5_cn16_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M32_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 945 "EU48_k5x5_cn24_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP16", "5 1 16 2 1 1 16 1 0", 946 "EU48_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP16", "8 1 16 2 1 1 16 1 0", 947 "EU48_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 948 "EU48_k5x5_cn32_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M96_activ1_eltwise0_FP16", "10 2 16 2 1 1 16 1 0", 949 "EU48_k5x5_cn48_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP16", "5 1 16 2 1 1 16 1 0", 950 "EU48_k7x7_cn3_g1_s2x2_d1x1_b1_in224x224_p3x3_num1_M64_activ1_eltwise0_FP16", "5 6 16 2 1 1 16 1 0", 951 "EU48_k11x11_cn3_g1_s4x4_d1x1_b1_in240x240_p0x0_num1_M96_activ1_eltwise0_FP16", "2 8 16 2 1 1 16 1 0", 952 "EU48_k3x3_cn256_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M384_activ1_eltwise0_FP16", "13 1 16 2 1 1 16 1 0", 953 "EU48_k3x3_cn384_g2_s1x1_d1x1_b1_in16x16_p1x1_num1_M128_activ1_eltwise0_FP16", "13 1 16 2 1 1 16 1 0", 954 "EU48_k3x3_cn384_g2_s1x1_d1x1_b1_in16x16_p1x1_num1_M192_activ1_eltwise0_FP16", "13 1 16 2 1 1 16 1 0", 955 "EU48_k5x5_cn96_g2_s1x1_d1x1_b1_in32x32_p2x2_num1_M128_activ1_eltwise0_FP16", "9 2 16 2 1 1 16 1 0", 956 // Below is the information for OpenCL based on which these configurations tuned 957 /******************************************************************************* 958 Number of platforms 1 959 Platform Name Intel(R) OpenCL HD Graphics 960 Platform Vendor Intel(R) Corporation 961 Platform Version OpenCL 2.1 962 Platform Profile FULL_PROFILE 963 Platform Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_fp64 cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation cl_intel_va_api_media_sharing 964 Platform Host timer resolution 1ns 965 Platform Extensions function suffix INTEL 966 967 Platform Name Intel(R) OpenCL HD Graphics 968 Number of devices 1 969 Device Name Intel(R) Gen9 HD Graphics NEO 970 Device Vendor Intel(R) Corporation 971 Device Vendor ID 0x8086 972 Device Version OpenCL 2.1 NEO 973 Driver Version 18.23.10915 974 Device OpenCL C Version OpenCL C 2.0 975 Device Type GPU 976 Device Profile FULL_PROFILE 977 Max compute units 24 978 Max clock frequency 1150MHz 979 Device Partition (core) 980 Max number of sub-devices 0 981 Supported partition types None 982 Max work item dimensions 3 983 Max work item sizes 256x256x256 984 Max work group size 256 985 Preferred work group size multiple 32 986 Max sub-groups per work group 32 987 Preferred / native vector sizes 988 char 16 / 16 989 short 8 / 8 990 int 4 / 4 991 long 1 / 1 992 half 8 / 8 (cl_khr_fp16) 993 float 1 / 1 994 double 1 / 1 (cl_khr_fp64) 995 Half-precision Floating-point support (cl_khr_fp16) 996 Denormals Yes 997 Infinity and NANs Yes 998 Round to nearest Yes 999 Round to zero Yes 1000 Round to infinity Yes 1001 IEEE754-2008 fused multiply-add Yes 1002 Support is emulated in software No 1003 Correctly-rounded divide and sqrt operations No 1004 Single-precision Floating-point support (core) 1005 Denormals Yes 1006 Infinity and NANs Yes 1007 Round to nearest Yes 1008 Round to zero Yes 1009 Round to infinity Yes 1010 IEEE754-2008 fused multiply-add Yes 1011 Support is emulated in software No 1012 Correctly-rounded divide and sqrt operations Yes 1013 Double-precision Floating-point support (cl_khr_fp64) 1014 Denormals Yes 1015 Infinity and NANs Yes 1016 Round to nearest Yes 1017 Round to zero Yes 1018 Round to infinity Yes 1019 IEEE754-2008 fused multiply-add Yes 1020 Support is emulated in software No 1021 Correctly-rounded divide and sqrt operations No 1022 Address bits 64, Little-Endian 1023 Global memory size 6575288320 (6.124GiB) 1024 Error Correction support No 1025 Max memory allocation 3287644160 (3.062GiB) 1026 Unified memory for Host and Device Yes 1027 Shared Virtual Memory (SVM) capabilities (core) 1028 Coarse-grained buffer sharing Yes 1029 Fine-grained buffer sharing No 1030 Fine-grained system sharing No 1031 Atomics No 1032 Minimum alignment for any data type 128 bytes 1033 Alignment of base address 1024 bits (128 bytes) 1034 Preferred alignment for atomics 1035 SVM 64 bytes 1036 Global 64 bytes 1037 Local 64 bytes 1038 Max size for global variable 65536 (64KiB) 1039 Preferred total size of global vars 3287644160 (3.062GiB) 1040 Global Memory cache type Read/Write 1041 Global Memory cache size 524288 1042 Global Memory cache line 64 bytes 1043 Image support Yes 1044 Max number of samplers per kernel 16 1045 Max size for 1D images from buffer 205477760 pixels 1046 Max 1D or 2D image array size 2048 images 1047 Base address alignment for 2D image buffers 4 bytes 1048 Pitch alignment for 2D image buffers 4 bytes 1049 Max 2D image size 16384x16384 pixels 1050 Max 3D image size 16384x16384x2048 pixels 1051 Max number of read image args 128 1052 Max number of write image args 128 1053 Max number of read/write image args 128 1054 Max number of pipe args 16 1055 Max active pipe reservations 1 1056 Max pipe packet size 1024 1057 Local memory type Local 1058 Local memory size 65536 (64KiB) 1059 Max constant buffer size 3287644160 (3.062GiB) 1060 Max number of constant args 8 1061 Max size of kernel argument 1024 1062 Queue properties (on host) 1063 Out-of-order execution Yes 1064 Profiling Yes 1065 Queue properties (on device) 1066 Out-of-order execution Yes 1067 Profiling Yes 1068 Preferred size 131072 (128KiB) 1069 Max size 67108864 (64MiB) 1070 Max queues on device 1 1071 Max events on device 1024 1072 Prefer user sync for interop Yes 1073 Profiling timer resolution 83ns 1074 Execution capabilities 1075 Run OpenCL kernels Yes 1076 Run native kernels No 1077 Sub-group independent forward progress Yes 1078 IL version SPIR-V_1.0 1079 SPIR versions 1.2 1080 printf() buffer size 4194304 (4MiB) 1081 Built-in kernels block_motion_estimate_intel;block_advanced_motion_estimate_check_intel;block_advanced_motion_estimate_bidirectional_check_intel; 1082 Motion Estimation accelerator version (Intel) 2 1083 Device Available Yes 1084 Compiler Available Yes 1085 Linker Available Yes 1086 Device Extensions cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_fp16 cl_khr_depth_images cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_icd cl_khr_image2d_from_buffer cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_intel_subgroups cl_intel_required_subgroup_size cl_intel_subgroups_short cl_khr_spir cl_intel_accelerator cl_intel_media_block_io cl_intel_driver_diagnostics cl_intel_device_side_avc_motion_estimation cl_khr_priority_hints cl_khr_throttle_hints cl_khr_create_command_queue cl_khr_fp64 cl_khr_subgroups cl_khr_il_program cl_khr_mipmap_image cl_khr_mipmap_image_writes cl_intel_planar_yuv cl_intel_packed_yuv cl_intel_motion_estimation cl_intel_advanced_motion_estimation cl_intel_va_api_media_sharing 1087 1088 NULL platform behavior 1089 clGetPlatformInfo(NULL, CL_PLATFORM_NAME, ...) Intel(R) OpenCL HD Graphics 1090 clGetDeviceIDs(NULL, CL_DEVICE_TYPE_ALL, ...) Success [INTEL] 1091 clCreateContext(NULL, ...) [default] Success [INTEL] 1092 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CPU) No devices found in platform 1093 clCreateContextFromType(NULL, CL_DEVICE_TYPE_GPU) Success (1) 1094 Platform Name Intel(R) OpenCL HD Graphics 1095 Device Name Intel(R) Gen9 HD Graphics NEO 1096 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ACCELERATOR) No devices found in platform 1097 clCreateContextFromType(NULL, CL_DEVICE_TYPE_CUSTOM) No devices found in platform 1098 clCreateContextFromType(NULL, CL_DEVICE_TYPE_ALL) Success (1) 1099 Platform Name Intel(R) OpenCL HD Graphics 1100 Device Name Intel(R) Gen9 HD Graphics NEO 1101 1102 ICD loader properties 1103 ICD loader Name OpenCL ICD Loader 1104 ICD loader Vendor OCL Icd free software 1105 ICD loader Version 2.2.8 1106 ICD loader Profile OpenCL 1.2 1107 NOTE: your OpenCL library declares to support OpenCL 1.2, 1108 but it seems to support up to OpenCL 2.1 too. 1109 ********************************************************************************/ 1110 "EU24_k11x11_cn3_g1_s4x4_d1x1_b1_in240x240_p0x0_num1_M96_activ1_eltwise0_FP16", "2 7 16 2 1 1 16 1 0", 1111 "EU24_k1x1_cn1024_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M256_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1112 "EU24_k1x1_cn1024_g1_s2x2_d1x1_b1_in16x16_p0x0_num1_M2048_activ0_eltwise0_FP16", "7 4 16 2 1 1 16 1 0", 1113 "EU24_k1x1_cn1024_g1_s2x2_d1x1_b1_in16x16_p0x0_num1_M512_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 1114 "EU24_k1x1_cn128_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M512_activ1_eltwise1_FP16", "1 16 32 5 1 16 1 1 0", 1115 "EU24_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M16_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1116 "EU24_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M32_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1117 "EU24_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M64_activ1_eltwise0_FP16", "10 3 16 2 1 1 16 1 0", 1118 "EU24_k1x1_cn192_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M96_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1119 "EU24_k1x1_cn2048_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M512_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 1120 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M1024_activ1_eltwise1_FP16", "14 2 16 2 1 1 16 1 0", 1121 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M128_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1122 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M32_activ1_eltwise0_FP16", "10 2 16 2 1 1 16 1 0", 1123 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in32x32_p0x0_num1_M64_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1124 "EU24_k1x1_cn256_g1_s1x1_d1x1_b1_in64x64_p0x0_num1_M64_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1125 "EU24_k1x1_cn256_g1_s2x2_d1x1_b1_in64x64_p0x0_num1_M128_activ1_eltwise0_FP16", "8 4 16 2 1 1 16 1 0", 1126 "EU24_k1x1_cn256_g1_s2x2_d1x1_b1_in64x64_p0x0_num1_M512_activ0_eltwise0_FP16", "1 16 32 5 1 16 1 1 0", 1127 "EU24_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M16_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 1128 "EU24_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M192_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1129 "EU24_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M64_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1130 "EU24_k1x1_cn480_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M96_activ1_eltwise0_FP16", "7 2 16 2 1 1 16 1 0", 1131 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M112_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1132 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M128_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1133 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M144_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1134 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M160_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1135 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M2048_activ1_eltwise1_FP16", "7 1 16 2 1 1 16 1 0", 1136 "EU24_k1x1_cn512_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M24_activ1_eltwise0_FP16", "10 1 16 2 1 1 16 1 0", 1137 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"EU24_k1x1_cn832_g1_s1x1_d1x1_b1_in16x16_p0x0_num1_M48_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 1156 "EU24_k3x3_cn112_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M224_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1157 "EU24_k3x3_cn128_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M256_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1158 "EU24_k3x3_cn128_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M128_activ1_eltwise0_FP16", "10 2 16 2 1 1 16 1 0", 1159 "EU24_k3x3_cn128_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M192_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1160 "EU24_k3x3_cn144_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M288_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1161 "EU24_k3x3_cn160_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M320_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1162 "EU24_k3x3_cn192_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M384_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 1163 "EU24_k3x3_cn256_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M256_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1164 "EU24_k3x3_cn256_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M384_activ1_eltwise0_FP16", "13 2 16 2 1 1 16 1 0", 1165 "EU24_k3x3_cn384_g2_s1x1_d1x1_b1_in16x16_p1x1_num1_M128_activ1_eltwise0_FP16", "13 1 16 2 1 1 16 1 0", 1166 "EU24_k3x3_cn384_g2_s1x1_d1x1_b1_in16x16_p1x1_num1_M192_activ1_eltwise0_FP16", "13 1 16 2 1 1 16 1 0", 1167 "EU24_k3x3_cn512_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M512_activ1_eltwise0_FP16", "7 2 16 2 1 1 16 1 0", 1168 "EU24_k3x3_cn64_g1_s1x1_d1x1_b1_in64x64_p1x1_num1_M192_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1169 "EU24_k3x3_cn64_g1_s1x1_d1x1_b1_in64x64_p1x1_num1_M64_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1170 "EU24_k3x3_cn96_g1_s1x1_d1x1_b1_in16x16_p1x1_num1_M208_activ1_eltwise0_FP16", "14 2 16 2 1 1 16 1 0", 1171 "EU24_k3x3_cn96_g1_s1x1_d1x1_b1_in32x32_p1x1_num1_M128_activ1_eltwise0_FP16", "14 1 16 2 1 1 16 1 0", 1172 "EU24_k5x5_cn16_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M48_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 1173 "EU24_k5x5_cn16_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M32_activ1_eltwise0_FP16", "7 2 16 2 1 1 16 1 0", 1174 "EU24_k5x5_cn24_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 1175 "EU24_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP16", "7 2 16 2 1 1 16 1 0", 1176 "EU24_k5x5_cn32_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M64_activ1_eltwise0_FP16", "7 1 16 2 1 1 16 1 0", 1177 "EU24_k5x5_cn32_g1_s1x1_d1x1_b1_in32x32_p2x2_num1_M96_activ1_eltwise0_FP16", "7 2 16 2 1 1 16 1 0", 1178 "EU24_k5x5_cn48_g1_s1x1_d1x1_b1_in16x16_p2x2_num1_M128_activ1_eltwise0_FP16", "4 1 16 2 1 1 16 1 0", 1179 "EU24_k5x5_cn96_g2_s1x1_d1x1_b1_in32x32_p2x2_num1_M128_activ1_eltwise0_FP16", "7 3 16 2 1 1 16 1 0", 1180 "EU24_k7x7_cn3_g1_s2x2_d1x1_b1_in224x224_p3x3_num1_M64_activ1_eltwise0_FP16", "4 7 16 2 1 1 16 1 0", 1181 }; 1182 #endif 1183