| /dports/science/quantum-espresso/q-e-qe-6.7.0/PP/src/ |
| H A D | initial_state.f90 | 36 INTEGER :: ios, ik, excite(ntypx) variable
38 NAMELIST / inputpp / outdir, prefix, excite local
|
| H A D | do_initial_state.f90 | 10 SUBROUTINE do_initial_state (excite) argument
47 INTEGER :: excite(ntypx) local
|
| /dports/science/openems/openEMS-0.0.35-71-g4c24b6e/matlab/ |
| H A D | AddLumpedPort.m | 92 excite = false; variable
99 excite = true; variable
101 excite = false; variable
|
| H A D | AddMSLPort.m | 73 excite = false; variable
100 excite = true; variable
102 excite = false; variable
105 excite = varargin{n+1}; variable
|
| H A D | AddCPWPort.m | 72 excite = false; variable
99 excite = true; variable
101 excite = false; variable
104 excite = varargin{n+1}; variable
|
| H A D | AddStripLinePort.m | 72 excite = false; variable
99 excite = true; variable
101 excite = false; variable
104 excite = varargin{n+1}; variable
|
| H A D | AddCurvePort.m | 155 excite = false; variable
162 excite = true; variable
164 excite = false; variable
|
| /dports/science/nwchem/nwchem-7b21660b82ebd85ef659f6fba7e1e73433b0bd0a/src/nwdft/rt_tddft/input/ |
| H A D | rt_tddft_input_excite.F | 277 subroutine rt_tddft_excite_rtdb_put (rtdb, i, excite) argument
328 subroutine rt_tddft_excite_rtdb_get (rtdb, i, excite) argument
|
| /dports/science/nwchem-data/nwchem-7.0.2-release/src/nwdft/rt_tddft/input/ |
| H A D | rt_tddft_input_excite.F | 277 subroutine rt_tddft_excite_rtdb_put (rtdb, i, excite) argument
328 subroutine rt_tddft_excite_rtdb_get (rtdb, i, excite) argument
|
| /dports/science/openems/openEMS-0.0.35-71-g4c24b6e/python/openEMS/ |
| H A D | ports.py | 63 def __init__(self, CSX, port_nr, start, stop, excite, **kw): argument
151 def __init__(self, CSX, port_nr, R, start, stop, exc_dir, excite=0, **kw): argument
206 def __init__(self, CSX, port_nr, metal_prop, start, stop, prop_dir, exc_dir, excite=0, **kw): argument
329 … def __init__(self, CSX, port_nr, start, stop, exc_dir, E_WG_func, H_WG_func, kc, excite=0, **kw): argument
389 def __init__(self, CSX, port_nr, start, stop, exc_dir, a, b, mode_name, excite=0, **kw): argument
|
| H A D | openEMS.pyx | 265 def AddLumpedPort(self, port_nr, R, start, stop, p_dir, excite=0, **kw): argument
286 def AddWaveGuidePort(self, port_nr, start, stop, p_dir, E_func, H_func, kc, excite=0, **kw): argument
299 def AddRectWaveGuidePort(self, port_nr, start, stop, p_dir, a, b, mode_name, excite=0, **kw): argument
312 def AddMSLPort(self, port_nr, metal_prop, start, stop, prop_dir, exc_dir, excite=0, **kw): argument
|
| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/streams/ |
| H A D | envelope.cc | 62 int16_t excite, in Process()
|
| H A D | vactrol.cc | 51 int16_t excite, in Process()
|
| H A D | lorenz_generator.cc | 51 int16_t excite, in Process()
|
| H A D | follower.cc | 59 int16_t excite, in Process()
|
| H A D | filter_controller.h | 47 int16_t excite, in Process()
|
| H A D | compressor.cc | 109 int16_t excite, in Process()
|
| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/streams/ |
| H A D | envelope.cc | 62 int16_t excite, in Process()
|
| H A D | lorenz_generator.cc | 51 int16_t excite, in Process()
|
| H A D | vactrol.cc | 51 int16_t excite, in Process()
|
| H A D | follower.cc | 59 int16_t excite, in Process()
|
| H A D | filter_controller.h | 47 int16_t excite, in Process()
|
| H A D | compressor.cc | 109 int16_t excite, in Process()
|
| /dports/multimedia/libmpeg3/libmpeg3-1.8/audio/ |
| H A D | bit_allocation.c | 238 short excite[]) in mpeg3audio_ac3_ba_compute_excitation()
313 short excite[], in mpeg3audio_ac3_ba_compute_mask()
|
| /dports/misc/dartsim/dart-6.11.1/dart/constraint/ |
| H A D | WeldJointConstraint.cpp | 311 void WeldJointConstraint::excite() in excite() function in dart::constraint::WeldJointConstraint
|