1 /* 2002 MJ */
2 /*
3 * UAE - The Un*x Amiga Emulator
4 *
5 * Read 68000 CPU specs from file "table68k"
6 *
7 * Copyright 1995,1996 Bernd Schmidt
8 */
9
10 #include "sysdeps.h"
11 #include "readcpu.h"
12
13 #include <cstdio>
14 #include <cstdlib>
15 #include <cstring>
16 #include <cctype>
17
18 using std::strncmp;
19 using std::abort;
20 using std::fprintf;
21 using std::strcmp;
22 using std::strlen;
23 using std::malloc;
24
25 int nr_cpuop_funcs;
26 struct instr *table68k;
27 static int readcpu_mismatch;
28
29 struct mnemolookup lookuptab[] = {
30 { i_ILLG, "ILLEGAL" },
31 { i_OR, "OR" },
32 { i_CHK, "CHK" },
33 { i_CHK2, "CHK2" },
34 { i_AND, "AND" },
35 { i_EOR, "EOR" },
36 { i_ORSR, "ORSR" },
37 { i_ANDSR, "ANDSR" },
38 { i_EORSR, "EORSR" },
39 { i_SUB, "SUB" },
40 { i_SUBA, "SUBA" },
41 { i_SUBX, "SUBX" },
42 { i_SBCD, "SBCD" },
43 { i_ADD, "ADD" },
44 { i_ADDA, "ADDA" },
45 { i_ADDX, "ADDX" },
46 { i_ABCD, "ABCD" },
47 { i_NEG, "NEG" },
48 { i_NEGX, "NEGX" },
49 { i_NBCD, "NBCD" },
50 { i_CLR, "CLR" },
51 { i_NOT, "NOT" },
52 { i_TST, "TST" },
53 { i_BTST, "BTST" },
54 { i_BCHG, "BCHG" },
55 { i_BCLR, "BCLR" },
56 { i_BSET, "BSET" },
57 { i_CMP, "CMP" },
58 { i_CMPM, "CMPM" },
59 { i_CMPA, "CMPA" },
60 { i_MVPRM, "MVPRM" },
61 { i_MVPMR, "MVPMR" },
62 { i_MOVE, "MOVE" },
63 { i_MOVEA, "MOVEA" },
64 { i_MVSR2, "MVSR2" },
65 { i_MV2SR, "MV2SR" },
66 { i_SWAP, "SWAP" },
67 { i_EXG, "EXG" },
68 { i_EXT, "EXT" },
69 { i_MVMEL, "MVMEL" },
70 { i_MVMLE, "MVMLE" },
71 { i_TRAP, "TRAP" },
72 { i_MVR2USP, "MVR2USP" },
73 { i_MVUSP2R, "MVUSP2R" },
74 { i_NOP, "NOP" },
75 { i_RESET, "RESET" },
76 { i_RTE, "RTE" },
77 { i_RTD, "RTD" },
78 { i_LINK, "LINK" },
79 { i_UNLK, "UNLK" },
80 { i_RTS, "RTS" },
81 { i_STOP, "STOP" },
82 { i_TRAPV, "TRAPV" },
83 { i_RTR, "RTR" },
84 { i_JSR, "JSR" },
85 { i_JMP, "JMP" },
86 { i_BSR, "BSR" },
87 { i_Bcc, "Bcc" },
88 { i_LEA, "LEA" },
89 { i_PEA, "PEA" },
90 { i_DBcc, "DBcc" },
91 { i_Scc, "Scc" },
92 { i_DIVU, "DIVU" },
93 { i_DIVS, "DIVS" },
94 { i_MULU, "MULU" },
95 { i_MULS, "MULS" },
96 { i_ASR, "ASR" },
97 { i_ASL, "ASL" },
98 { i_LSR, "LSR" },
99 { i_LSL, "LSL" },
100 { i_ROL, "ROL" },
101 { i_ROR, "ROR" },
102 { i_ROXL, "ROXL" },
103 { i_ROXR, "ROXR" },
104 { i_ASRW, "ASRW" },
105 { i_ASLW, "ASLW" },
106 { i_LSRW, "LSRW" },
107 { i_LSLW, "LSLW" },
108 { i_ROLW, "ROLW" },
109 { i_RORW, "RORW" },
110 { i_ROXLW, "ROXLW" },
111 { i_ROXRW, "ROXRW" },
112
113 { i_MOVE2C, "MOVE2C" },
114 { i_MOVEC2, "MOVEC2" },
115 { i_CAS, "CAS" },
116 { i_CAS2, "CAS2" },
117 { i_MULL, "MULL" },
118 { i_DIVL, "DIVL" },
119 { i_BFTST, "BFTST" },
120 { i_BFEXTU, "BFEXTU" },
121 { i_BFCHG, "BFCHG" },
122 { i_BFEXTS, "BFEXTS" },
123 { i_BFCLR, "BFCLR" },
124 { i_BFFFO, "BFFFO" },
125 { i_BFSET, "BFSET" },
126 { i_BFINS, "BFINS" },
127 { i_PACK, "PACK" },
128 { i_UNPK, "UNPK" },
129 { i_TAS, "TAS" },
130 { i_BKPT, "BKPT" },
131 { i_CALLM, "CALLM" },
132 { i_RTM, "RTM" },
133 { i_TRAPcc, "TRAPcc" },
134 { i_MOVES, "MOVES" },
135 { i_FPP, "FPP" },
136 { i_FDBcc, "FDBcc" },
137 { i_FScc, "FScc" },
138 { i_FTRAPcc, "FTRAPcc" },
139 { i_FBcc, "FBcc" },
140 { i_FBcc, "FBcc" },
141 { i_FSAVE, "FSAVE" },
142 { i_FRESTORE, "FRESTORE" },
143
144 { i_CINVL, "CINVL" },
145 { i_CINVP, "CINVP" },
146 { i_CINVA, "CINVA" },
147 { i_CPUSHL, "CPUSHL" },
148 { i_CPUSHP, "CPUSHP" },
149 { i_CPUSHA, "CPUSHA" },
150 { i_MOVE16, "MOVE16" },
151
152 { i_EMULOP_RETURN, "EMULOP_RETURN" },
153 { i_EMULOP, "EMULOP" },
154
155 { i_MMUOP, "MMUOP" },
156
157 {i_NATFEAT_ID, "NATFEAT_ID" },
158 {i_NATFEAT_CALL, "NATFEAT_CALL" },
159
160 { i_ILLG, "" },
161 };
162
163
mode_from_str(const char * str)164 static inline amodes mode_from_str (const char *str)
165 {
166 if (strncmp (str, "Dreg", 4) == 0) return Dreg;
167 if (strncmp (str, "Areg", 4) == 0) return Areg;
168 if (strncmp (str, "Aind", 4) == 0) return Aind;
169 if (strncmp (str, "Apdi", 4) == 0) return Apdi;
170 if (strncmp (str, "Aipi", 4) == 0) return Aipi;
171 if (strncmp (str, "Ad16", 4) == 0) return Ad16;
172 if (strncmp (str, "Ad8r", 4) == 0) return Ad8r;
173 if (strncmp (str, "absw", 4) == 0) return absw;
174 if (strncmp (str, "absl", 4) == 0) return absl;
175 if (strncmp (str, "PC16", 4) == 0) return PC16;
176 if (strncmp (str, "PC8r", 4) == 0) return PC8r;
177 if (strncmp (str, "Immd", 4) == 0) return imm;
178 abort ();
179 return (amodes)0;
180 }
181
mode_from_mr(int mode,int reg)182 static inline amodes mode_from_mr (int mode, int reg)
183 {
184 switch (mode) {
185 case 0: return Dreg;
186 case 1: return Areg;
187 case 2: return Aind;
188 case 3: return Aipi;
189 case 4: return Apdi;
190 case 5: return Ad16;
191 case 6: return Ad8r;
192 case 7:
193 switch (reg) {
194 case 0: return absw;
195 case 1: return absl;
196 case 2: return PC16;
197 case 3: return PC8r;
198 case 4: return imm;
199 case 5:
200 case 6:
201 case 7: return am_illg;
202 }
203 }
204 abort ();
205 return (amodes)0;
206 }
207
build_insn(int insn)208 static void build_insn (int insn)
209 {
210 int find = -1;
211 int variants;
212 struct instr_def id;
213 const char *opcstr;
214 int i, n;
215
216 int flaglive = 0, flagdead = 0;
217 int cflow = 0;
218
219 id = defs68k[insn];
220
221 // Control flow information
222 cflow = id.cflow;
223
224 // Mask of flags set/used
225 unsigned char flags_set(0), flags_used(0);
226
227 for (i = 0, n = 4; i < 5; i++, n--) {
228 switch (id.flaginfo[i].flagset) {
229 case fa_unset: case fa_isjmp: break;
230 default: flags_set |= (1 << n);
231 }
232
233 switch (id.flaginfo[i].flaguse) {
234 case fu_unused: case fu_isjmp: break;
235 default: flags_used |= (1 << n);
236 }
237 }
238
239 for (i = 0; i < 5; i++) {
240 switch (id.flaginfo[i].flagset){
241 case fa_unset: break;
242 case fa_isjmp: break;
243 case fa_zero: flagdead |= 1 << i; break;
244 case fa_one: flagdead |= 1 << i; break;
245 case fa_dontcare: flagdead |= 1 << i; break;
246 case fa_unknown: flagdead = -1; goto out1;
247 case fa_set: flagdead |= 1 << i; break;
248 }
249 }
250
251 out1:
252 for (i = 0; i < 5; i++) {
253 switch (id.flaginfo[i].flaguse) {
254 case fu_unused: break;
255 case fu_isjmp: flaglive |= 1 << i; break;
256 case fu_maybecc: flaglive |= 1 << i; break;
257 case fu_unknown: flaglive = -1; goto out2;
258 case fu_used: flaglive |= 1 << i; break;
259 }
260 }
261 out2:
262
263 opcstr = id.opcstr;
264 for (variants = 0; variants < (1 << id.n_variable); variants++) {
265 int bitcnt[lastbit];
266 int bitval[lastbit];
267 int bitpos[lastbit];
268 int i;
269 uae_u16 opc = id.bits;
270 uae_u16 msk, vmsk;
271 int pos = 0;
272 int mnp = 0;
273 int bitno = 0;
274 char mnemonic[64];
275
276 wordsizes sz = sz_long;
277 int srcgather = 0, dstgather = 0;
278 int usesrc = 0, usedst = 0;
279 int srctype = 0;
280 int srcpos = -1, dstpos = -1;
281
282 amodes srcmode = am_unknown, destmode = am_unknown;
283 int srcreg = -1, destreg = -1;
284
285 for (i = 0; i < lastbit; i++)
286 bitcnt[i] = bitval[i] = 0;
287
288 vmsk = 1 << id.n_variable;
289
290 for (i = 0, msk = 0x8000; i < 16; i++, msk >>= 1) {
291 if (!(msk & id.mask)) {
292 int currbit = id.bitpos[bitno++];
293 int bit_set;
294 vmsk >>= 1;
295 bit_set = variants & vmsk ? 1 : 0;
296 if (bit_set)
297 opc |= msk;
298 bitpos[currbit] = 15 - i;
299 bitcnt[currbit]++;
300 bitval[currbit] <<= 1;
301 bitval[currbit] |= bit_set;
302 }
303 }
304
305 if (bitval[bitj] == 0) bitval[bitj] = 8;
306 /* first check whether this one does not match after all */
307 if (bitval[bitz] == 3 || bitval[bitC] == 1)
308 continue;
309 if (bitcnt[bitI] && (bitval[bitI] == 0x00 || bitval[bitI] == 0xff))
310 continue;
311
312 if (bitcnt[bitE] && (bitval[bitE] == 0x00))
313 continue;
314
315 /* bitI and bitC get copied to biti and bitc */
316 if (bitcnt[bitI]) {
317 bitval[biti] = bitval[bitI]; bitpos[biti] = bitpos[bitI];
318 }
319 if (bitcnt[bitC])
320 bitval[bitc] = bitval[bitC];
321
322 pos = 0;
323 while (opcstr[pos] && !isspace(opcstr[pos])) {
324 if (opcstr[pos] == '.') {
325 pos++;
326 switch (opcstr[pos]) {
327
328 case 'B': sz = sz_byte; break;
329 case 'W': sz = sz_word; break;
330 case 'L': sz = sz_long; break;
331 case 'z':
332 switch (bitval[bitz]) {
333 case 0: sz = sz_byte; break;
334 case 1: sz = sz_word; break;
335 case 2: sz = sz_long; break;
336 default: abort();
337 }
338 break;
339 default: abort();
340 }
341 } else {
342 mnemonic[mnp] = opcstr[pos];
343 if (mnemonic[mnp] == 'f') {
344 find = -1;
345 switch (bitval[bitf]) {
346 case 0: mnemonic[mnp] = 'R'; break;
347 case 1: mnemonic[mnp] = 'L'; break;
348 default: abort();
349 }
350 }
351 mnp++;
352 if ((unsigned)mnp >= (sizeof(mnemonic)-1)) {
353 mnemonic[sizeof(mnemonic)-1] = '\0';
354 fprintf(stderr, "WTF!!! Instruction '%s' overflow\n", mnemonic);
355 abort();
356 }
357 }
358 pos++;
359 }
360 mnemonic[mnp] = 0;
361
362 /* now, we have read the mnemonic and the size */
363 while (opcstr[pos] && isspace(opcstr[pos]))
364 pos++;
365
366 /* A goto a day keeps the D******a away. */
367 if (opcstr[pos] == 0)
368 goto endofline;
369
370 /* parse the source address */
371 usesrc = 1;
372 switch (opcstr[pos++]) {
373 case 'D':
374 srcmode = Dreg;
375 switch (opcstr[pos++]) {
376 case 'r': srcreg = bitval[bitr]; srcgather = 1; srcpos = bitpos[bitr]; break;
377 case 'R': srcreg = bitval[bitR]; srcgather = 1; srcpos = bitpos[bitR]; break;
378 default: abort();
379 }
380
381 break;
382 case 'A':
383 srcmode = Areg;
384 switch (opcstr[pos++]) {
385 case 'l': srcmode = absl; break;
386 case 'r': srcreg = bitval[bitr]; srcgather = 1; srcpos = bitpos[bitr]; break;
387 case 'R': srcreg = bitval[bitR]; srcgather = 1; srcpos = bitpos[bitR]; break;
388 default: abort();
389 }
390 switch (opcstr[pos]) {
391 case 'p': srcmode = Apdi; pos++; break;
392 case 'P': srcmode = Aipi; pos++; break;
393 }
394 break;
395 #if 0
396 case 'L':
397 srcmode = absl;
398 break;
399 #endif
400 case '#':
401 switch (opcstr[pos++]) {
402 case 'z': srcmode = imm; break;
403 case '0': srcmode = imm0; break;
404 case '1': srcmode = imm1; break;
405 case '2': srcmode = imm2; break;
406 case 'i': srcmode = immi; srcreg = (uae_s32)(uae_s8)bitval[biti];
407 if (CPU_EMU_SIZE < 4) {
408 /* Used for branch instructions */
409 srctype = 1;
410 srcgather = 1;
411 srcpos = bitpos[biti];
412 }
413 break;
414 case 'j': srcmode = immi; srcreg = bitval[bitj];
415 if (CPU_EMU_SIZE < 3) {
416 /* 1..8 for ADDQ/SUBQ and rotshi insns */
417 srcgather = 1;
418 srctype = 3;
419 srcpos = bitpos[bitj];
420 }
421 break;
422 case 'J': srcmode = immi; srcreg = bitval[bitJ];
423 if (CPU_EMU_SIZE < 5) {
424 /* 0..15 */
425 srcgather = 1;
426 srctype = 2;
427 srcpos = bitpos[bitJ];
428 }
429 break;
430 case 'k': srcmode = immi; srcreg = bitval[bitk];
431 if (CPU_EMU_SIZE < 3) {
432 srcgather = 1;
433 srctype = 4;
434 srcpos = bitpos[bitk];
435 }
436 break;
437 case 'K': srcmode = immi; srcreg = bitval[bitK];
438 if (CPU_EMU_SIZE < 5) {
439 /* 0..15 */
440 srcgather = 1;
441 srctype = 5;
442 srcpos = bitpos[bitK];
443 }
444 break;
445 case 'E': srcmode = immi; srcreg = bitval[bitE];
446 if (CPU_EMU_SIZE < 5) { // gb-- what is CPU_EMU_SIZE used for ??
447 /* 1..255 */
448 srcgather = 1;
449 srctype = 6;
450 srcpos = bitpos[bitE];
451 }
452 break;
453 case 'p': srcmode = immi; srcreg = bitval[bitp];
454 if (CPU_EMU_SIZE < 5) { // gb-- what is CPU_EMU_SIZE used for ??
455 /* 0..3 */
456 srcgather = 1;
457 srctype = 7;
458 srcpos = bitpos[bitp];
459 }
460 break;
461 default: abort();
462 }
463 break;
464 case 'd':
465 srcreg = bitval[bitD];
466 srcmode = mode_from_mr(bitval[bitd],bitval[bitD]);
467 if (srcmode == am_illg)
468 continue;
469 if (CPU_EMU_SIZE < 2 &&
470 (srcmode == Areg || srcmode == Dreg || srcmode == Aind
471 || srcmode == Ad16 || srcmode == Ad8r || srcmode == Aipi
472 || srcmode == Apdi))
473 {
474 srcgather = 1; srcpos = bitpos[bitD];
475 }
476 if (opcstr[pos] == '[') {
477 pos++;
478 if (opcstr[pos] == '!') {
479 /* exclusion */
480 do {
481 pos++;
482 if (mode_from_str(opcstr+pos) == srcmode)
483 goto nomatch;
484 pos += 4;
485 } while (opcstr[pos] == ',');
486 pos++;
487 } else {
488 if (opcstr[pos+4] == '-') {
489 /* replacement */
490 if (mode_from_str(opcstr+pos) == srcmode)
491 srcmode = mode_from_str(opcstr+pos+5);
492 else
493 goto nomatch;
494 pos += 10;
495 } else {
496 /* normal */
497 while(mode_from_str(opcstr+pos) != srcmode) {
498 pos += 4;
499 if (opcstr[pos] == ']')
500 goto nomatch;
501 pos++;
502 }
503 while(opcstr[pos] != ']') pos++;
504 pos++;
505 break;
506 }
507 }
508 }
509 /* Some addressing modes are invalid as destination */
510 if (srcmode == imm || srcmode == PC16 || srcmode == PC8r)
511 goto nomatch;
512 break;
513 case 's':
514 srcreg = bitval[bitS];
515 srcmode = mode_from_mr(bitval[bits],bitval[bitS]);
516
517 if (srcmode == am_illg)
518 continue;
519 if (CPU_EMU_SIZE < 2 &&
520 (srcmode == Areg || srcmode == Dreg || srcmode == Aind
521 || srcmode == Ad16 || srcmode == Ad8r || srcmode == Aipi
522 || srcmode == Apdi))
523 {
524 srcgather = 1; srcpos = bitpos[bitS];
525 }
526 if (opcstr[pos] == '[') {
527 pos++;
528 if (opcstr[pos] == '!') {
529 /* exclusion */
530 do {
531 pos++;
532 if (mode_from_str(opcstr+pos) == srcmode)
533 goto nomatch;
534 pos += 4;
535 } while (opcstr[pos] == ',');
536 pos++;
537 } else {
538 if (opcstr[pos+4] == '-') {
539 /* replacement */
540 if (mode_from_str(opcstr+pos) == srcmode)
541 srcmode = mode_from_str(opcstr+pos+5);
542 else
543 goto nomatch;
544 pos += 10;
545 } else {
546 /* normal */
547 while(mode_from_str(opcstr+pos) != srcmode) {
548 pos += 4;
549 if (opcstr[pos] == ']')
550 goto nomatch;
551 pos++;
552 }
553 while(opcstr[pos] != ']') pos++;
554 pos++;
555 }
556 }
557 }
558 break;
559 default: abort();
560 }
561 /* safety check - might have changed */
562 if (srcmode != Areg && srcmode != Dreg && srcmode != Aind
563 && srcmode != Ad16 && srcmode != Ad8r && srcmode != Aipi
564 && srcmode != Apdi && srcmode != immi)
565 {
566 srcgather = 0;
567 }
568 if (srcmode == Areg && sz == sz_byte)
569 goto nomatch;
570
571 if (opcstr[pos] != ',')
572 goto endofline;
573 pos++;
574
575 /* parse the destination address */
576 usedst = 1;
577 switch (opcstr[pos++]) {
578 case 'D':
579 destmode = Dreg;
580 switch (opcstr[pos++]) {
581 case 'r': destreg = bitval[bitr]; dstgather = 1; dstpos = bitpos[bitr]; break;
582 case 'R': destreg = bitval[bitR]; dstgather = 1; dstpos = bitpos[bitR]; break;
583 default: abort();
584 }
585 if (dstpos < 0 || dstpos >= 32)
586 abort();
587 break;
588 case 'A':
589 destmode = Areg;
590 switch (opcstr[pos++]) {
591 case 'l': destmode = absl; break;
592 case 'r': destreg = bitval[bitr]; dstgather = 1; dstpos = bitpos[bitr]; break;
593 case 'R': destreg = bitval[bitR]; dstgather = 1; dstpos = bitpos[bitR]; break;
594 case 'x': destreg = 0; dstgather = 0; dstpos = 0; break;
595 default: abort();
596 }
597 switch (opcstr[pos]) {
598 case 'p': destmode = Apdi; pos++; break;
599 case 'P': destmode = Aipi; pos++; break;
600 }
601 break;
602 #if 0
603 case 'L':
604 destmode = absl;
605 break;
606 #endif
607 case '#':
608 switch (opcstr[pos++]) {
609 case 'z': destmode = imm; break;
610 case '0': destmode = imm0; break;
611 case '1': destmode = imm1; break;
612 case '2': destmode = imm2; break;
613 case 'i': destmode = immi; destreg = (uae_s32)(uae_s8)bitval[biti]; break;
614 case 'j': destmode = immi; destreg = bitval[bitj]; break;
615 case 'J': destmode = immi; destreg = bitval[bitJ]; break;
616 case 'k': destmode = immi; destreg = bitval[bitk]; break;
617 case 'K': destmode = immi; destreg = bitval[bitK]; break;
618 default: abort();
619 }
620 break;
621 case 'd':
622 destreg = bitval[bitD];
623 destmode = mode_from_mr(bitval[bitd],bitval[bitD]);
624 if (destmode == am_illg)
625 continue;
626 if (CPU_EMU_SIZE < 1 &&
627 (destmode == Areg || destmode == Dreg || destmode == Aind
628 || destmode == Ad16 || destmode == Ad8r || destmode == Aipi
629 || destmode == Apdi))
630 {
631 dstgather = 1; dstpos = bitpos[bitD];
632 }
633
634 if (opcstr[pos] == '[') {
635 pos++;
636 if (opcstr[pos] == '!') {
637 /* exclusion */
638 do {
639 pos++;
640 if (mode_from_str(opcstr+pos) == destmode)
641 goto nomatch;
642 pos += 4;
643 } while (opcstr[pos] == ',');
644 pos++;
645 } else {
646 if (opcstr[pos+4] == '-') {
647 /* replacement */
648 if (mode_from_str(opcstr+pos) == destmode)
649 destmode = mode_from_str(opcstr+pos+5);
650 else
651 goto nomatch;
652 pos += 10;
653 } else {
654 /* normal */
655 while(mode_from_str(opcstr+pos) != destmode) {
656 pos += 4;
657 if (opcstr[pos] == ']')
658 goto nomatch;
659 pos++;
660 }
661 while(opcstr[pos] != ']') pos++;
662 pos++;
663 break;
664 }
665 }
666 }
667 /* Some addressing modes are invalid as destination */
668 if (destmode == imm || destmode == PC16 || destmode == PC8r)
669 goto nomatch;
670 break;
671 case 's':
672 destreg = bitval[bitS];
673 destmode = mode_from_mr(bitval[bits],bitval[bitS]);
674
675 if (destmode == am_illg)
676 continue;
677 if (CPU_EMU_SIZE < 1 &&
678 (destmode == Areg || destmode == Dreg || destmode == Aind
679 || destmode == Ad16 || destmode == Ad8r || destmode == Aipi
680 || destmode == Apdi))
681 {
682 dstgather = 1; dstpos = bitpos[bitS];
683 }
684
685 if (opcstr[pos] == '[') {
686 pos++;
687 if (opcstr[pos] == '!') {
688 /* exclusion */
689 do {
690 pos++;
691 if (mode_from_str(opcstr+pos) == destmode)
692 goto nomatch;
693 pos += 4;
694 } while (opcstr[pos] == ',');
695 pos++;
696 } else {
697 if (opcstr[pos+4] == '-') {
698 /* replacement */
699 if (mode_from_str(opcstr+pos) == destmode)
700 destmode = mode_from_str(opcstr+pos+5);
701 else
702 goto nomatch;
703 pos += 10;
704 } else {
705 /* normal */
706 while(mode_from_str(opcstr+pos) != destmode) {
707 pos += 4;
708 if (opcstr[pos] == ']')
709 goto nomatch;
710 pos++;
711 }
712 while(opcstr[pos] != ']') pos++;
713 pos++;
714 }
715 }
716 }
717 break;
718 default: abort();
719 }
720 /* safety check - might have changed */
721 if (destmode != Areg && destmode != Dreg && destmode != Aind
722 && destmode != Ad16 && destmode != Ad8r && destmode != Aipi
723 && destmode != Apdi)
724 {
725 dstgather = 0;
726 }
727
728 if (destmode == Areg && sz == sz_byte)
729 goto nomatch;
730 #if 0
731 if (sz == sz_byte && (destmode == Aipi || destmode == Apdi)) {
732 dstgather = 0;
733 }
734 #endif
735 endofline:
736 /* now, we have a match */
737 if (table68k[opc].mnemo != i_ILLG)
738 fprintf(stderr, "Double match: %x: %s\n", opc, opcstr);
739 if (find == -1) {
740 for (find = 0;; find++) {
741 if (strcmp(mnemonic, lookuptab[find].name) == 0) {
742 table68k[opc].mnemo = lookuptab[find].mnemo;
743 break;
744 }
745 if (strlen(lookuptab[find].name) == 0) abort();
746 }
747 }
748 else {
749 table68k[opc].mnemo = lookuptab[find].mnemo;
750 }
751 table68k[opc].cc = bitval[bitc];
752 if (table68k[opc].mnemo == i_BTST
753 || table68k[opc].mnemo == i_BSET
754 || table68k[opc].mnemo == i_BCLR
755 || table68k[opc].mnemo == i_BCHG)
756 {
757 sz = destmode == Dreg ? sz_long : sz_byte;
758 }
759 table68k[opc].size = sz;
760 table68k[opc].sreg = srcreg;
761 table68k[opc].dreg = destreg;
762 table68k[opc].smode = srcmode;
763 table68k[opc].dmode = destmode;
764 table68k[opc].spos = srcgather ? srcpos : -1;
765 table68k[opc].dpos = dstgather ? dstpos : -1;
766 table68k[opc].suse = usesrc;
767 table68k[opc].duse = usedst;
768 table68k[opc].stype = srctype;
769 table68k[opc].plev = id.plevel;
770 table68k[opc].clev = id.cpulevel;
771 #if 0
772 for (i = 0; i < 5; i++) {
773 table68k[opc].flaginfo[i].flagset = id.flaginfo[i].flagset;
774 table68k[opc].flaginfo[i].flaguse = id.flaginfo[i].flaguse;
775 }
776 #endif
777
778 // Fix flags used information for Scc, Bcc, TRAPcc, DBcc instructions
779 if ( table68k[opc].mnemo == i_Scc
780 || table68k[opc].mnemo == i_Bcc
781 || table68k[opc].mnemo == i_DBcc
782 || table68k[opc].mnemo == i_TRAPcc
783 ) {
784 switch (table68k[opc].cc) {
785 // CC mask: XNZVC
786 // 8421
787 case 0: flags_used = 0x00; break; /* T */
788 case 1: flags_used = 0x00; break; /* F */
789 case 2: flags_used = 0x05; break; /* HI */
790 case 3: flags_used = 0x05; break; /* LS */
791 case 4: flags_used = 0x01; break; /* CC */
792 case 5: flags_used = 0x01; break; /* CS */
793 case 6: flags_used = 0x04; break; /* NE */
794 case 7: flags_used = 0x04; break; /* EQ */
795 case 8: flags_used = 0x02; break; /* VC */
796 case 9: flags_used = 0x02; break; /* VS */
797 case 10:flags_used = 0x08; break; /* PL */
798 case 11:flags_used = 0x08; break; /* MI */
799 case 12:flags_used = 0x0A; break; /* GE */
800 case 13:flags_used = 0x0A; break; /* LT */
801 case 14:flags_used = 0x0E; break; /* GT */
802 case 15:flags_used = 0x0E; break; /* LE */
803 }
804 }
805
806 #if 1
807 /* gb-- flagdead and flaglive would not have correct information */
808 table68k[opc].flagdead = flags_set;
809 table68k[opc].flaglive = flags_used;
810 #else
811 table68k[opc].flagdead = flagdead;
812 table68k[opc].flaglive = flaglive;
813 #endif
814 table68k[opc].cflow = cflow;
815 nomatch:
816 /* FOO! */;
817 }
818 }
819
820
handle_merges(long int opcode)821 static void handle_merges (long int opcode)
822 {
823 uae_u16 smsk;
824 uae_u16 dmsk;
825 int sbitdst, dstend;
826 int srcreg, dstreg;
827
828 if (table68k[opcode].spos == -1) {
829 sbitdst = 1; smsk = 0;
830 } else {
831 switch (table68k[opcode].stype) {
832 case 0:
833 smsk = 7; sbitdst = 8; break;
834 case 1:
835 smsk = 255; sbitdst = 256; break;
836 case 2:
837 smsk = 15; sbitdst = 16; break;
838 case 3:
839 smsk = 7; sbitdst = 8; break;
840 case 4:
841 smsk = 7; sbitdst = 8; break;
842 case 5:
843 smsk = 63; sbitdst = 64; break;
844 case 6:
845 smsk = 255; sbitdst = 256; break;
846 case 7:
847 smsk = 3; sbitdst = 4; break;
848 default:
849 smsk = 0; sbitdst = 0;
850 abort();
851 break;
852 }
853 smsk <<= table68k[opcode].spos;
854 }
855 if (table68k[opcode].dpos == -1) {
856 dstend = 1; dmsk = 0;
857 } else {
858 dmsk = 7 << table68k[opcode].dpos;
859 dstend = 8;
860 }
861 for (srcreg=0; srcreg < sbitdst; srcreg++) {
862 for (dstreg=0; dstreg < dstend; dstreg++) {
863 uae_u16 code = opcode;
864
865 code = (code & ~smsk) | (srcreg << table68k[opcode].spos);
866 code = (code & ~dmsk) | (dstreg << table68k[opcode].dpos);
867
868 /* Check whether this is in fact the same instruction.
869 * The instructions should never differ, except for the
870 * Bcc.(BW) case. */
871 if (table68k[code].mnemo != table68k[opcode].mnemo
872 || table68k[code].size != table68k[opcode].size
873 || table68k[code].suse != table68k[opcode].suse
874 || table68k[code].duse != table68k[opcode].duse)
875 {
876 readcpu_mismatch++; continue;
877 }
878 if (table68k[opcode].suse
879 && (table68k[opcode].spos != table68k[code].spos
880 || table68k[opcode].smode != table68k[code].smode
881 || table68k[opcode].stype != table68k[code].stype))
882 {
883 readcpu_mismatch++; continue;
884 }
885 if (table68k[opcode].duse
886 && (table68k[opcode].dpos != table68k[code].dpos
887 || table68k[opcode].dmode != table68k[code].dmode))
888 {
889 readcpu_mismatch++; continue;
890 }
891
892 if (code != opcode)
893 table68k[code].handler = opcode;
894 }
895 }
896 }
897
do_merges(void)898 static void do_merges (void)
899 {
900 long int opcode;
901 int nr = 0;
902 readcpu_mismatch = 0;
903 for (opcode = 0; opcode < 65536; opcode++) {
904 if (table68k[opcode].handler != -1 || table68k[opcode].mnemo == i_ILLG)
905 continue;
906 nr++;
907 handle_merges (opcode);
908 }
909 nr_cpuop_funcs = nr;
910 }
911
912
init_table68k(void)913 void init_table68k (void)
914 {
915 int i;
916
917 free(table68k);
918 table68k = (struct instr *)malloc (65536 * sizeof (struct instr));
919 for (i = 0; i < 65536; i++) {
920 table68k[i].mnemo = i_ILLG;
921 table68k[i].handler = -1;
922 }
923 for (i = 0; i < n_defs68k; i++) {
924 build_insn (i);
925 }
926 do_merges();
927 }
928
929
exit_table68k(void)930 void exit_table68k (void)
931 {
932 free(table68k);
933 table68k = NULL;
934 }
935