1 /// @file xed-operand-storage.h 2 3 // This file was automatically generated. 4 // Do not edit this file. 5 6 #if !defined(XED_OPERAND_STORAGE_H) 7 # define XED_OPERAND_STORAGE_H 8 /*BEGIN_LEGAL 9 10 Copyright (c) 2018 Intel Corporation 11 12 Licensed under the Apache License, Version 2.0 (the "License"); 13 you may not use this file except in compliance with the License. 14 You may obtain a copy of the License at 15 16 http://www.apache.org/licenses/LICENSE-2.0 17 18 Unless required by applicable law or agreed to in writing, software 19 distributed under the License is distributed on an "AS IS" BASIS, 20 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 See the License for the specific language governing permissions and 22 limitations under the License. 23 24 END_LEGAL */ 25 #include "xed-chip-enum.h" 26 #include "xed-error-enum.h" 27 #include "xed-iclass-enum.h" 28 #include "xed-reg-enum.h" 29 #include "xed-operand-element-type-enum.h" 30 typedef struct xed_operand_storage_s { 31 xed_uint8_t agen; 32 xed_uint8_t amd3dnow; 33 xed_uint8_t asz; 34 xed_uint8_t bcrc; 35 xed_uint8_t cet; 36 xed_uint8_t cldemote; 37 xed_uint8_t df32; 38 xed_uint8_t df64; 39 xed_uint8_t dummy; 40 xed_uint8_t encoder_preferred; 41 xed_uint8_t has_sib; 42 xed_uint8_t ild_f2; 43 xed_uint8_t ild_f3; 44 xed_uint8_t imm0; 45 xed_uint8_t imm0signed; 46 xed_uint8_t imm1; 47 xed_uint8_t lock; 48 xed_uint8_t lzcnt; 49 xed_uint8_t mem0; 50 xed_uint8_t mem1; 51 xed_uint8_t modep5; 52 xed_uint8_t modep55c; 53 xed_uint8_t mode_first_prefix; 54 xed_uint8_t mpxmode; 55 xed_uint8_t needrex; 56 xed_uint8_t norex; 57 xed_uint8_t no_scale_disp8; 58 xed_uint8_t osz; 59 xed_uint8_t out_of_bytes; 60 xed_uint8_t p4; 61 xed_uint8_t prefix66; 62 xed_uint8_t ptr; 63 xed_uint8_t realmode; 64 xed_uint8_t relbr; 65 xed_uint8_t rex; 66 xed_uint8_t rexb; 67 xed_uint8_t rexr; 68 xed_uint8_t rexrr; 69 xed_uint8_t rexw; 70 xed_uint8_t rexx; 71 xed_uint8_t sae; 72 xed_uint8_t sib; 73 xed_uint8_t skip_osz; 74 xed_uint8_t tzcnt; 75 xed_uint8_t ubit; 76 xed_uint8_t using_default_segment0; 77 xed_uint8_t using_default_segment1; 78 xed_uint8_t vexdest3; 79 xed_uint8_t vexdest4; 80 xed_uint8_t vex_c4; 81 xed_uint8_t wbnoinvd; 82 xed_uint8_t zeroing; 83 xed_uint8_t default_seg; 84 xed_uint8_t easz; 85 xed_uint8_t eosz; 86 xed_uint8_t first_f2f3; 87 xed_uint8_t has_modrm; 88 xed_uint8_t last_f2f3; 89 xed_uint8_t llrc; 90 xed_uint8_t mod; 91 xed_uint8_t mode; 92 xed_uint8_t rep; 93 xed_uint8_t sibscale; 94 xed_uint8_t smode; 95 xed_uint8_t vex_prefix; 96 xed_uint8_t vl; 97 xed_uint8_t hint; 98 xed_uint8_t mask; 99 xed_uint8_t reg; 100 xed_uint8_t rm; 101 xed_uint8_t roundc; 102 xed_uint8_t seg_ovd; 103 xed_uint8_t sibbase; 104 xed_uint8_t sibindex; 105 xed_uint8_t srm; 106 xed_uint8_t vexdest210; 107 xed_uint8_t vexvalid; 108 xed_uint8_t error; 109 xed_uint8_t esrc; 110 xed_uint8_t map; 111 xed_uint8_t nelem; 112 xed_uint8_t scale; 113 xed_uint8_t type; 114 xed_uint8_t bcast; 115 xed_uint8_t chip; 116 xed_uint8_t need_memdisp; 117 xed_uint8_t brdisp_width; 118 xed_uint8_t disp_width; 119 xed_uint8_t ild_seg; 120 xed_uint8_t imm1_bytes; 121 xed_uint8_t imm_width; 122 xed_uint8_t max_bytes; 123 xed_uint8_t modrm_byte; 124 xed_uint8_t nominal_opcode; 125 xed_uint8_t nprefixes; 126 xed_uint8_t nrexes; 127 xed_uint8_t nseg_prefixes; 128 xed_uint8_t pos_disp; 129 xed_uint8_t pos_imm; 130 xed_uint8_t pos_imm1; 131 xed_uint8_t pos_modrm; 132 xed_uint8_t pos_nominal_opcode; 133 xed_uint8_t pos_sib; 134 xed_uint8_t uimm1; 135 xed_uint16_t base0; 136 xed_uint16_t base1; 137 xed_uint16_t element_size; 138 xed_uint16_t index; 139 xed_uint16_t outreg; 140 xed_uint16_t reg0; 141 xed_uint16_t reg1; 142 xed_uint16_t reg2; 143 xed_uint16_t reg3; 144 xed_uint16_t reg4; 145 xed_uint16_t reg5; 146 xed_uint16_t reg6; 147 xed_uint16_t reg7; 148 xed_uint16_t reg8; 149 xed_uint16_t seg0; 150 xed_uint16_t seg1; 151 xed_uint16_t iclass; 152 xed_uint16_t mem_width; 153 xed_uint64_t disp; 154 xed_uint64_t uimm0; 155 } xed_operand_storage_t; 156 #endif 157