1 /* $OpenBSD: if_fxp_cardbus.c,v 1.39 2024/05/24 06:26:47 jsg Exp $ */
2 /* $NetBSD: if_fxp_cardbus.c,v 1.12 2000/05/08 18:23:36 thorpej Exp $ */
3
4 /*
5 * Copyright (c) 1999 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Johan Danielsson.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * CardBus front-end for the Intel i8255x family of Ethernet chips.
35 */
36
37 #include "bpfilter.h"
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/mbuf.h>
42 #include <sys/timeout.h>
43 #include <sys/device.h>
44
45 #include <net/if.h>
46 #include <net/if_media.h>
47
48 #include <netinet/in.h>
49 #include <netinet/if_ether.h>
50
51 #include <machine/bus.h>
52 #include <machine/intr.h>
53
54 #include <dev/mii/miivar.h>
55
56 #include <dev/ic/fxpreg.h>
57 #include <dev/ic/fxpvar.h>
58
59 #include <dev/pci/pcivar.h>
60 #include <dev/pci/pcireg.h>
61 #include <dev/pci/pcidevs.h>
62
63 #include <dev/cardbus/cardbusvar.h>
64
65 int fxp_cardbus_match(struct device *, void *, void *);
66 void fxp_cardbus_attach(struct device *, struct device *, void *);
67 int fxp_cardbus_detach(struct device *, int);
68 void fxp_cardbus_setup(struct fxp_softc *);
69
70 struct fxp_cardbus_softc {
71 struct fxp_softc sc;
72 cardbus_devfunc_t ct;
73 pcitag_t ct_tag;
74 pcireg_t base0_reg;
75 pcireg_t base1_reg;
76 bus_size_t size;
77 pci_chipset_tag_t pc;
78 };
79
80 const struct cfattach fxp_cardbus_ca = {
81 sizeof(struct fxp_cardbus_softc), fxp_cardbus_match, fxp_cardbus_attach,
82 fxp_cardbus_detach
83 };
84
85 const struct pci_matchid fxp_cardbus_devices[] = {
86 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8255X },
87 };
88
89 #ifdef CBB_DEBUG
90 #define DPRINTF(X) printf X
91 #else
92 #define DPRINTF(X)
93 #endif
94
95 int
fxp_cardbus_match(struct device * parent,void * match,void * aux)96 fxp_cardbus_match(struct device *parent, void *match, void *aux)
97 {
98 return (cardbus_matchbyid((struct cardbus_attach_args *)aux,
99 fxp_cardbus_devices, nitems(fxp_cardbus_devices)));
100 }
101
102 void
fxp_cardbus_attach(struct device * parent,struct device * self,void * aux)103 fxp_cardbus_attach(struct device *parent, struct device *self, void *aux)
104 {
105 char intrstr[16];
106 struct fxp_softc *sc = (struct fxp_softc *) self;
107 struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *) self;
108 struct cardbus_attach_args *ca = aux;
109 struct cardbus_softc *psc =
110 (struct cardbus_softc *)sc->sc_dev.dv_parent;
111 cardbus_chipset_tag_t cc = psc->sc_cc;
112 cardbus_function_tag_t cf = psc->sc_cf;
113 bus_space_tag_t iot, memt;
114 bus_space_handle_t ioh, memh;
115
116 bus_addr_t adr;
117 bus_size_t size;
118
119 csc->ct = ca->ca_ct;
120 csc->pc = ca->ca_pc;
121
122 /*
123 * Map control/status registers.
124 */
125 if (Cardbus_mapreg_map(csc->ct, CARDBUS_BASE1_REG,
126 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, &adr, &size) == 0) {
127 csc->base1_reg = adr | 1;
128 sc->sc_st = iot;
129 sc->sc_sh = ioh;
130 csc->size = size;
131 } else if (Cardbus_mapreg_map(csc->ct, CARDBUS_BASE0_REG,
132 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
133 0, &memt, &memh, &adr, &size) == 0) {
134 csc->base0_reg = adr;
135 sc->sc_st = memt;
136 sc->sc_sh = memh;
137 csc->size = size;
138 } else
139 panic("%s: failed to allocate mem and io space", __func__);
140
141 sc->sc_dmat = ca->ca_dmat;
142 #if 0
143 sc->sc_enable = fxp_cardbus_enable;
144 sc->sc_disable = fxp_cardbus_disable;
145 sc->sc_enabled = 0;
146 #endif
147
148 Cardbus_function_enable(csc->ct);
149
150 fxp_cardbus_setup(sc);
151
152 /* Map and establish the interrupt. */
153 sc->sc_ih = cardbus_intr_establish(cc, cf, psc->sc_intrline, IPL_NET,
154 fxp_intr, sc, sc->sc_dev.dv_xname);
155 if (NULL == sc->sc_ih) {
156 printf(": couldn't establish interrupt");
157 printf("at %d\n", ca->ca_intrline);
158 return;
159 }
160 snprintf(intrstr, sizeof(intrstr), "irq %d", ca->ca_intrline);
161
162 sc->sc_revision = PCI_REVISION(ca->ca_class);
163
164 fxp_attach(sc, intrstr);
165 }
166
167 void
fxp_cardbus_setup(struct fxp_softc * sc)168 fxp_cardbus_setup(struct fxp_softc *sc)
169 {
170 struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *) sc;
171 struct cardbus_softc *psc =
172 (struct cardbus_softc *) sc->sc_dev.dv_parent;
173 cardbus_chipset_tag_t cc = psc->sc_cc;
174 pci_chipset_tag_t pc = csc->pc;
175 cardbus_function_tag_t cf = psc->sc_cf;
176 pcireg_t command;
177
178 csc->ct_tag = pci_make_tag(pc, csc->ct->ct_bus,
179 csc->ct->ct_dev, csc->ct->ct_func);
180
181 command = pci_conf_read(pc, csc->ct_tag, PCI_COMMAND_STATUS_REG);
182 if (csc->base0_reg) {
183 pci_conf_write(pc, csc->ct_tag, CARDBUS_BASE0_REG, csc->base0_reg);
184 (cf->cardbus_ctrl) (cc, CARDBUS_MEM_ENABLE);
185 command |= PCI_COMMAND_MEM_ENABLE |
186 PCI_COMMAND_MASTER_ENABLE;
187 } else if (csc->base1_reg) {
188 pci_conf_write(pc, csc->ct_tag, CARDBUS_BASE1_REG, csc->base1_reg);
189 (cf->cardbus_ctrl) (cc, CARDBUS_IO_ENABLE);
190 command |= (PCI_COMMAND_IO_ENABLE |
191 PCI_COMMAND_MASTER_ENABLE);
192 }
193
194 (cf->cardbus_ctrl) (cc, CARDBUS_BM_ENABLE);
195
196 /* enable the card */
197 pci_conf_write(pc, csc->ct_tag, PCI_COMMAND_STATUS_REG, command);
198 }
199
200 int
fxp_cardbus_detach(struct device * self,int flags)201 fxp_cardbus_detach(struct device *self, int flags)
202 {
203 struct fxp_softc *sc = (struct fxp_softc *) self;
204 struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *) self;
205 struct cardbus_devfunc *ct = csc->ct;
206 int reg;
207
208 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih);
209 fxp_detach(sc);
210
211 if (csc->base0_reg)
212 reg = CARDBUS_BASE0_REG;
213 else
214 reg = CARDBUS_BASE1_REG;
215 Cardbus_mapreg_unmap(ct, reg, sc->sc_st, sc->sc_sh, csc->size);
216 return (0);
217 }
218