1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #ifndef __MT7915_H
5 #define __MT7915_H
6
7 #include <linux/interrupt.h>
8 #include <linux/ktime.h>
9 #if defined(__FreeBSD__)
10 #include <linux/uuid.h>
11 #endif
12 #include "../mt76_connac.h"
13 #include "regs.h"
14
15 #define MT7915_MAX_INTERFACES 19
16 #define MT7915_WTBL_SIZE 288
17 #define MT7916_WTBL_SIZE 544
18 #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1)
19 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \
20 MT7915_MAX_INTERFACES)
21
22 #define MT7915_WATCHDOG_TIME (HZ / 10)
23 #define MT7915_RESET_TIMEOUT (30 * HZ)
24
25 #define MT7915_TX_RING_SIZE 2048
26 #define MT7915_TX_MCU_RING_SIZE 256
27 #define MT7915_TX_FWDL_RING_SIZE 128
28
29 #define MT7915_RX_RING_SIZE 1536
30 #define MT7915_RX_MCU_RING_SIZE 512
31
32 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin"
33 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin"
34 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin"
35
36 #define MT7916_FIRMWARE_WA "mediatek/mt7916_wa.bin"
37 #define MT7916_FIRMWARE_WM "mediatek/mt7916_wm.bin"
38 #define MT7916_ROM_PATCH "mediatek/mt7916_rom_patch.bin"
39
40 #define MT7981_FIRMWARE_WA "mediatek/mt7981_wa.bin"
41 #define MT7981_FIRMWARE_WM "mediatek/mt7981_wm.bin"
42 #define MT7981_ROM_PATCH "mediatek/mt7981_rom_patch.bin"
43
44 #define MT7986_FIRMWARE_WA "mediatek/mt7986_wa.bin"
45 #define MT7986_FIRMWARE_WM "mediatek/mt7986_wm.bin"
46 #define MT7986_FIRMWARE_WM_MT7975 "mediatek/mt7986_wm_mt7975.bin"
47 #define MT7986_ROM_PATCH "mediatek/mt7986_rom_patch.bin"
48 #define MT7986_ROM_PATCH_MT7975 "mediatek/mt7986_rom_patch_mt7975.bin"
49
50 #define MT7915_EEPROM_DEFAULT "mediatek/mt7915_eeprom.bin"
51 #define MT7915_EEPROM_DEFAULT_DBDC "mediatek/mt7915_eeprom_dbdc.bin"
52 #define MT7916_EEPROM_DEFAULT "mediatek/mt7916_eeprom.bin"
53
54 #define MT7981_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7981_eeprom_mt7976_dbdc.bin"
55
56 #define MT7986_EEPROM_MT7975_DEFAULT "mediatek/mt7986_eeprom_mt7975.bin"
57 #define MT7986_EEPROM_MT7975_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7975_dual.bin"
58 #define MT7986_EEPROM_MT7976_DEFAULT "mediatek/mt7986_eeprom_mt7976.bin"
59 #define MT7986_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7986_eeprom_mt7976_dbdc.bin"
60 #define MT7986_EEPROM_MT7976_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7976_dual.bin"
61
62 #define MT7915_EEPROM_SIZE 3584
63 #define MT7916_EEPROM_SIZE 4096
64
65 #define MT7915_EEPROM_BLOCK_SIZE 16
66 #define MT7915_HW_TOKEN_SIZE 4096
67 #define MT7915_TOKEN_SIZE 8192
68
69 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
70 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
71
72 #define MT7915_THERMAL_THROTTLE_MAX 100
73 #define MT7915_CDEV_THROTTLE_MAX 99
74
75 #define MT7915_SKU_RATE_NUM 161
76
77 #define MT7915_MAX_TWT_AGRT 16
78 #define MT7915_MAX_STA_TWT_AGRT 8
79 #define MT7915_MIN_TWT_DUR 64
80 #define MT7915_MAX_QUEUE (MT_RXQ_BAND2 + __MT_MCUQ_MAX + 2)
81
82 #define MT7915_WED_RX_TOKEN_SIZE 12288
83
84 #define MT7915_CRIT_TEMP_IDX 0
85 #define MT7915_MAX_TEMP_IDX 1
86 #define MT7915_CRIT_TEMP 110
87 #define MT7915_MAX_TEMP 120
88
89 struct mt7915_vif;
90 struct mt7915_sta;
91 struct mt7915_dfs_pulse;
92 struct mt7915_dfs_pattern;
93
94 enum mt7915_txq_id {
95 MT7915_TXQ_FWDL = 16,
96 MT7915_TXQ_MCU_WM,
97 MT7915_TXQ_BAND0,
98 MT7915_TXQ_BAND1,
99 MT7915_TXQ_MCU_WA,
100 };
101
102 enum mt7915_rxq_id {
103 MT7915_RXQ_BAND0 = 0,
104 MT7915_RXQ_BAND1,
105 MT7915_RXQ_MCU_WM = 0,
106 MT7915_RXQ_MCU_WA,
107 MT7915_RXQ_MCU_WA_EXT,
108 };
109
110 enum mt7916_rxq_id {
111 MT7916_RXQ_MCU_WM = 0,
112 MT7916_RXQ_MCU_WA,
113 MT7916_RXQ_MCU_WA_MAIN,
114 MT7916_RXQ_MCU_WA_EXT,
115 MT7916_RXQ_BAND0,
116 MT7916_RXQ_BAND1,
117 };
118
119 struct mt7915_twt_flow {
120 struct list_head list;
121 u64 start_tsf;
122 u64 tsf;
123 u32 duration;
124 u16 wcid;
125 __le16 mantissa;
126 u8 exp;
127 u8 table_id;
128 u8 id;
129 u8 protection:1;
130 u8 flowtype:1;
131 u8 trigger:1;
132 u8 sched:1;
133 };
134
135 DECLARE_EWMA(avg_signal, 10, 8)
136
137 struct mt7915_sta {
138 struct mt76_wcid wcid; /* must be first */
139
140 struct mt7915_vif *vif;
141
142 struct list_head rc_list;
143 u32 airtime_ac[8];
144
145 int ack_signal;
146 struct ewma_avg_signal avg_ack_signal;
147
148 unsigned long changed;
149 unsigned long jiffies;
150 struct mt76_connac_sta_key_conf bip;
151
152 struct {
153 u8 flowid_mask;
154 struct mt7915_twt_flow flow[MT7915_MAX_STA_TWT_AGRT];
155 } twt;
156 };
157
158 struct mt7915_vif_cap {
159 bool ht_ldpc:1;
160 bool vht_ldpc:1;
161 bool he_ldpc:1;
162 bool vht_su_ebfer:1;
163 bool vht_su_ebfee:1;
164 bool vht_mu_ebfer:1;
165 bool vht_mu_ebfee:1;
166 bool he_su_ebfer:1;
167 bool he_su_ebfee:1;
168 bool he_mu_ebfer:1;
169 };
170
171 struct mt7915_vif {
172 struct mt76_vif mt76; /* must be first */
173
174 struct mt7915_vif_cap cap;
175 struct mt7915_sta sta;
176 struct mt7915_phy *phy;
177
178 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
179 struct cfg80211_bitrate_mask bitrate_mask;
180 };
181
182 /* crash-dump */
183 struct mt7915_crash_data {
184 guid_t guid;
185 struct timespec64 timestamp;
186
187 u8 *memdump_buf;
188 size_t memdump_buf_len;
189 };
190
191 struct mt7915_hif {
192 struct list_head list;
193
194 struct device *dev;
195 void __iomem *regs;
196 int irq;
197 };
198
199 struct mt7915_phy {
200 struct mt76_phy *mt76;
201 struct mt7915_dev *dev;
202
203 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
204
205 struct ieee80211_vif *monitor_vif;
206
207 struct thermal_cooling_device *cdev;
208 u8 cdev_state;
209 u8 throttle_state;
210 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */
211
212 u32 rxfilter;
213 u64 omac_mask;
214
215 u16 noise;
216
217 s16 coverage_class;
218 u8 slottime;
219
220 u8 rdd_state;
221
222 u32 trb_ts;
223
224 u32 rx_ampdu_ts;
225 u32 ampdu_ref;
226
227 struct mt76_mib_stats mib;
228 struct mt76_channel_state state_ts;
229
230 #ifdef CONFIG_NL80211_TESTMODE
231 struct {
232 u32 *reg_backup;
233
234 s32 last_freq_offset;
235 u8 last_rcpi[4];
236 s8 last_ib_rssi[4];
237 s8 last_wb_rssi[4];
238 u8 last_snr;
239
240 u8 spe_idx;
241 } test;
242 #endif
243 };
244
245 struct mt7915_dev {
246 union { /* must be first */
247 struct mt76_dev mt76;
248 struct mt76_phy mphy;
249 };
250
251 struct mt7915_hif *hif2;
252 struct mt7915_reg_desc reg;
253 u8 q_id[MT7915_MAX_QUEUE];
254 u32 q_int_mask[MT7915_MAX_QUEUE];
255 u32 wfdma_mask;
256
257 const struct mt76_bus_ops *bus_ops;
258 struct mt7915_phy phy;
259
260 /* monitor rx chain configured channel */
261 struct cfg80211_chan_def rdd2_chandef;
262 struct mt7915_phy *rdd2_phy;
263
264 u16 chainmask;
265 u16 chainshift;
266 u32 hif_idx;
267
268 struct work_struct init_work;
269 struct work_struct rc_work;
270 struct work_struct dump_work;
271 struct work_struct reset_work;
272 wait_queue_head_t reset_wait;
273
274 struct {
275 u32 state;
276 u32 wa_reset_count;
277 u32 wm_reset_count;
278 bool hw_full_reset:1;
279 bool hw_init_done:1;
280 bool restart:1;
281 } recovery;
282
283 /* protects coredump data */
284 struct mutex dump_mutex;
285 #ifdef CONFIG_DEV_COREDUMP
286 struct {
287 struct mt7915_crash_data *crash_data;
288 } coredump;
289 #endif
290
291 struct list_head sta_rc_list;
292 struct list_head twt_list;
293
294 u32 hw_pattern;
295
296 bool dbdc_support;
297 bool flash_mode;
298 bool muru_debug;
299 bool ibf;
300
301 struct dentry *debugfs_dir;
302 struct rchan *relay_fwlog;
303
304 void *cal;
305
306 struct {
307 u8 debug_wm;
308 u8 debug_wa;
309 u8 debug_bin;
310 } fw;
311
312 struct {
313 u16 table_mask;
314 u8 n_agrt;
315 } twt;
316
317 struct reset_control *rstc;
318 void __iomem *dcm;
319 void __iomem *sku;
320 };
321
322 enum {
323 WFDMA0 = 0x0,
324 WFDMA1,
325 WFDMA_EXT,
326 __MT_WFDMA_MAX,
327 };
328
329 enum {
330 MT_RX_SEL0,
331 MT_RX_SEL1,
332 MT_RX_SEL2, /* monitor chain */
333 };
334
335 enum mt7915_rdd_cmd {
336 RDD_STOP,
337 RDD_START,
338 RDD_DET_MODE,
339 RDD_RADAR_EMULATE,
340 RDD_START_TXQ = 20,
341 RDD_SET_WF_ANT = 30,
342 RDD_CAC_START = 50,
343 RDD_CAC_END,
344 RDD_NORMAL_START,
345 RDD_DISABLE_DFS_CAL,
346 RDD_PULSE_DBG,
347 RDD_READ_PULSE,
348 RDD_RESUME_BF,
349 RDD_IRQ_OFF,
350 };
351
352 static inline struct mt7915_phy *
mt7915_hw_phy(struct ieee80211_hw * hw)353 mt7915_hw_phy(struct ieee80211_hw *hw)
354 {
355 struct mt76_phy *phy = hw->priv;
356
357 return phy->priv;
358 }
359
360 static inline struct mt7915_dev *
mt7915_hw_dev(struct ieee80211_hw * hw)361 mt7915_hw_dev(struct ieee80211_hw *hw)
362 {
363 struct mt76_phy *phy = hw->priv;
364
365 return container_of(phy->dev, struct mt7915_dev, mt76);
366 }
367
368 static inline struct mt7915_phy *
mt7915_ext_phy(struct mt7915_dev * dev)369 mt7915_ext_phy(struct mt7915_dev *dev)
370 {
371 struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];
372
373 if (!phy)
374 return NULL;
375
376 return phy->priv;
377 }
378
mt7915_check_adie(struct mt7915_dev * dev,bool sku)379 static inline u32 mt7915_check_adie(struct mt7915_dev *dev, bool sku)
380 {
381 u32 mask = sku ? MT_CONNINFRA_SKU_MASK : MT_ADIE_TYPE_MASK;
382 if (!is_mt798x(&dev->mt76))
383 return 0;
384
385 return mt76_rr(dev, MT_CONNINFRA_SKU_DEC_ADDR) & mask;
386 }
387
388 extern const struct ieee80211_ops mt7915_ops;
389 extern const struct mt76_testmode_ops mt7915_testmode_ops;
390 extern struct pci_driver mt7915_pci_driver;
391 extern struct pci_driver mt7915_hif_driver;
392 extern struct platform_driver mt798x_wmac_driver;
393
394 #ifdef CONFIG_MT798X_WMAC
395 int mt7986_wmac_enable(struct mt7915_dev *dev);
396 void mt7986_wmac_disable(struct mt7915_dev *dev);
397 #else
mt7986_wmac_enable(struct mt7915_dev * dev)398 static inline int mt7986_wmac_enable(struct mt7915_dev *dev)
399 {
400 return 0;
401 }
402
mt7986_wmac_disable(struct mt7915_dev * dev)403 static inline void mt7986_wmac_disable(struct mt7915_dev *dev)
404 {
405 }
406 #endif
407 struct mt7915_dev *mt7915_mmio_probe(struct device *pdev,
408 void __iomem *mem_base, u32 device_id);
409 void mt7915_wfsys_reset(struct mt7915_dev *dev);
410 irqreturn_t mt7915_irq_handler(int irq, void *dev_instance);
411 u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif);
412 u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
413
414 int mt7915_register_device(struct mt7915_dev *dev);
415 void mt7915_unregister_device(struct mt7915_dev *dev);
416 int mt7915_eeprom_init(struct mt7915_dev *dev);
417 void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev,
418 struct mt7915_phy *phy);
419 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev,
420 struct ieee80211_channel *chan,
421 u8 chain_idx);
422 s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band);
423 int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2);
424 void mt7915_dma_prefetch(struct mt7915_dev *dev);
425 void mt7915_dma_cleanup(struct mt7915_dev *dev);
426 int mt7915_dma_reset(struct mt7915_dev *dev, bool force);
427 int mt7915_dma_start(struct mt7915_dev *dev, bool reset, bool wed_reset);
428 int mt7915_txbf_init(struct mt7915_dev *dev);
429 void mt7915_init_txpower(struct mt7915_dev *dev,
430 struct ieee80211_supported_band *sband);
431 void mt7915_reset(struct mt7915_dev *dev);
432 int mt7915_run(struct ieee80211_hw *hw);
433 int mt7915_mcu_init(struct mt7915_dev *dev);
434 int mt7915_mcu_init_firmware(struct mt7915_dev *dev);
435 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
436 struct mt7915_vif *mvif,
437 struct mt7915_twt_flow *flow,
438 int cmd);
439 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
440 struct ieee80211_vif *vif, bool enable);
441 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
442 struct ieee80211_vif *vif, int enable);
443 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
444 struct ieee80211_sta *sta, bool enable);
445 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
446 struct ieee80211_ampdu_params *params,
447 bool add);
448 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
449 struct ieee80211_ampdu_params *params,
450 bool add);
451 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
452 struct cfg80211_he_bss_color *he_bss_color);
453 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
454 int enable, u32 changed);
455 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,
456 struct ieee80211_he_obss_pd *he_obss_pd);
457 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
458 struct ieee80211_sta *sta, bool changed);
459 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
460 struct ieee80211_sta *sta);
461 int mt7915_set_channel(struct mt7915_phy *phy);
462 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd);
463 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif);
464 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *req);
465 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
466 struct ieee80211_vif *vif,
467 struct ieee80211_sta *sta,
468 void *data, u32 field);
469 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev);
470 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset);
471 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num);
472 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable,
473 bool hdr_trans);
474 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
475 u8 en);
476 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band);
477 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable);
478 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy);
479 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len);
480 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower);
481 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,
482 struct ieee80211_vif *vif,
483 struct ieee80211_sta *sta, s8 txpower);
484 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action);
485 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val);
486 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
487 const struct mt7915_dfs_pulse *pulse);
488 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
489 const struct mt7915_dfs_pattern *pattern);
490 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val);
491 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev);
492 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy);
493 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch);
494 int mt7915_mcu_get_temperature(struct mt7915_phy *phy);
495 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state);
496 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy);
497 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
498 struct ieee80211_sta *sta, struct rate_info *rate);
499 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
500 struct cfg80211_chan_def *chandef);
501 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wcid);
502 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set);
503 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
504 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
505 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
506 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb);
507 void mt7915_mcu_exit(struct mt7915_dev *dev);
508
mt7915_wtbl_size(struct mt7915_dev * dev)509 static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev)
510 {
511 return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE;
512 }
513
mt7915_eeprom_size(struct mt7915_dev * dev)514 static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev)
515 {
516 return is_mt7915(&dev->mt76) ? MT7915_EEPROM_SIZE : MT7916_EEPROM_SIZE;
517 }
518
519 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg,
520 u32 clear, u32 set);
521
mt7915_irq_enable(struct mt7915_dev * dev,u32 mask)522 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask)
523 {
524 if (dev->hif2)
525 mt7915_dual_hif_set_irq_mask(dev, false, 0, mask);
526 else
527 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
528
529 tasklet_schedule(&dev->mt76.irq_tasklet);
530 }
531
mt7915_irq_disable(struct mt7915_dev * dev,u32 mask)532 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask)
533 {
534 if (dev->hif2)
535 mt7915_dual_hif_set_irq_mask(dev, true, mask, 0);
536 else
537 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
538 }
539
540 void mt7915_memcpy_fromio(struct mt7915_dev *dev, void *buf, u32 offset,
541 size_t len);
542
543 void mt7915_mac_init(struct mt7915_dev *dev);
544 u32 mt7915_mac_wtbl_lmac_addr(struct mt7915_dev *dev, u16 wcid, u8 dw);
545 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask);
546 void mt7915_mac_reset_counters(struct mt7915_phy *phy);
547 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy);
548 void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy);
549 void mt7915_mac_enable_rtscts(struct mt7915_dev *dev,
550 struct ieee80211_vif *vif, bool enable);
551 void mt7915_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
552 struct sk_buff *skb, struct mt76_wcid *wcid, int pid,
553 struct ieee80211_key_conf *key,
554 enum mt76_txq_id qid, u32 changed);
555 void mt7915_mac_set_timing(struct mt7915_phy *phy);
556 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
557 struct ieee80211_sta *sta);
558 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
559 struct ieee80211_sta *sta);
560 void mt7915_mac_work(struct work_struct *work);
561 void mt7915_mac_reset_work(struct work_struct *work);
562 void mt7915_mac_dump_work(struct work_struct *work);
563 void mt7915_mac_sta_rc_work(struct work_struct *work);
564 void mt7915_mac_update_stats(struct mt7915_phy *phy);
565 void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev,
566 struct mt7915_sta *msta,
567 u8 flowid);
568 void mt7915_mac_add_twt_setup(struct ieee80211_hw *hw,
569 struct ieee80211_sta *sta,
570 struct ieee80211_twt_setup *twt);
571 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
572 enum mt76_txq_id qid, struct mt76_wcid *wcid,
573 struct ieee80211_sta *sta,
574 struct mt76_tx_info *tx_info);
575 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
576 struct sk_buff *skb, u32 *info);
577 bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len);
578 void mt7915_stats_work(struct work_struct *work);
579 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force);
580 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy);
581 void mt7915_set_stream_he_caps(struct mt7915_phy *phy);
582 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy);
583 void mt7915_update_channel(struct mt76_phy *mphy);
584 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enable);
585 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy);
586 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev);
587 int mt7915_init_debugfs(struct mt7915_phy *phy);
588 void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len);
589 bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len);
590 #ifdef CONFIG_MAC80211_DEBUGFS
591 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
592 struct ieee80211_sta *sta, struct dentry *dir);
593 #endif
594 int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
595 bool pci, int *irq);
596
597 #endif
598