/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 267 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 276 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 285 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 288 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 297 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 267 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 276 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 285 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 288 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 297 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 267 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 276 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 285 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 288 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 297 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 267 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 276 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 285 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 288 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 297 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | mv_ddr_topology.h | 269 #define IS_IF_ACTIVE(if_mask, if_id) \ argument 278 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument 287 #define DDR3_IS_ECC_PUP3_MODE(if_mask) \ argument 290 #define DDR3_IS_ECC_PUP4_MODE(if_mask) \ argument 299 #define DDR3_IS_ECC_PUP8_MODE(if_mask) \ argument
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