| /dports/www/chromium-legacy/chromium-88.0.4324.182/native_client/src/trusted/validator_arm/ |
| H A D | arm_helpers.h | 51 inline uint32_t ARMExpandImm(uint32_t imm12) { in ARMExpandImm()
62 inline uint32_t ARMExpandImm_C(uint32_t imm12) { in ARMExpandImm_C()
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| /dports/emulators/yuzu/yuzu-0b47f7a46/externals/dynarmic/src/frontend/A64/translate/impl/ |
| H A D | load_store_register_immediate.cpp | 87 bool TranslatorVisitor::STRx_LDRx_imm_2(Imm<2> size, Imm<2> opc, Imm<12> imm12, Reg Rn, Reg Rt) { in STRx_LDRx_imm_2()
105 bool TranslatorVisitor::PRFM_imm([[maybe_unused]] Imm<12> imm12, [[maybe_unused]] Reg Rn, [[maybe_u… in PRFM_imm()
184 bool TranslatorVisitor::STR_imm_fpsimd_2(Imm<2> size, Imm<1> opc_1, Imm<12> imm12, Reg Rn, Vec Vt) { in STR_imm_fpsimd_2()
210 bool TranslatorVisitor::LDR_imm_fpsimd_2(Imm<2> size, Imm<1> opc_1, Imm<12> imm12, Reg Rn, Vec Vt) { in LDR_imm_fpsimd_2()
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| H A D | data_processing_addsub.cpp | 10 bool TranslatorVisitor::ADD_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in ADD_imm()
37 bool TranslatorVisitor::ADDS_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in ADDS_imm()
61 bool TranslatorVisitor::SUB_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in SUB_imm()
88 bool TranslatorVisitor::SUBS_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in SUBS_imm()
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| /dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/frontend/A64/translate/impl/ |
| H A D | load_store_register_immediate.cpp | 87 bool TranslatorVisitor::STRx_LDRx_imm_2(Imm<2> size, Imm<2> opc, Imm<12> imm12, Reg Rn, Reg Rt) { in STRx_LDRx_imm_2()
105 bool TranslatorVisitor::PRFM_imm([[maybe_unused]] Imm<12> imm12, [[maybe_unused]] Reg Rn, [[maybe_u… in PRFM_imm()
184 bool TranslatorVisitor::STR_imm_fpsimd_2(Imm<2> size, Imm<1> opc_1, Imm<12> imm12, Reg Rn, Vec Vt) { in STR_imm_fpsimd_2()
210 bool TranslatorVisitor::LDR_imm_fpsimd_2(Imm<2> size, Imm<1> opc_1, Imm<12> imm12, Reg Rn, Vec Vt) { in LDR_imm_fpsimd_2()
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| H A D | data_processing_addsub.cpp | 10 bool TranslatorVisitor::ADD_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in ADD_imm()
37 bool TranslatorVisitor::ADDS_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in ADDS_imm()
61 bool TranslatorVisitor::SUB_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in SUB_imm()
88 bool TranslatorVisitor::SUBS_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in SUBS_imm()
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| /dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/frontend/A64/translate/impl/ |
| H A D | load_store_register_immediate.cpp | 87 bool TranslatorVisitor::STRx_LDRx_imm_2(Imm<2> size, Imm<2> opc, Imm<12> imm12, Reg Rn, Reg Rt) { in STRx_LDRx_imm_2()
105 bool TranslatorVisitor::PRFM_imm([[maybe_unused]] Imm<12> imm12, [[maybe_unused]] Reg Rn, [[maybe_u… in PRFM_imm()
184 bool TranslatorVisitor::STR_imm_fpsimd_2(Imm<2> size, Imm<1> opc_1, Imm<12> imm12, Reg Rn, Vec Vt) { in STR_imm_fpsimd_2()
210 bool TranslatorVisitor::LDR_imm_fpsimd_2(Imm<2> size, Imm<1> opc_1, Imm<12> imm12, Reg Rn, Vec Vt) { in LDR_imm_fpsimd_2()
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| H A D | data_processing_addsub.cpp | 10 bool TranslatorVisitor::ADD_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in ADD_imm()
37 bool TranslatorVisitor::ADDS_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in ADDS_imm()
61 bool TranslatorVisitor::SUB_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in SUB_imm()
88 bool TranslatorVisitor::SUBS_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) { in SUBS_imm()
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/lld/ELF/Arch/ |
| H A D | ARM.cpp | 705 int64_t imm12 = val; in relocate() local
819 uint32_t imm12 = read32le(buf) & 0xfff; in getImplicitAddend() local
843 uint64_t imm12 = read16le(buf + 2) & 0x0fff; in getImplicitAddend() local
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/lld/ELF/Arch/ |
| H A D | ARM.cpp | 690 int64_t imm12 = val; in relocate() local
813 uint32_t imm12 = read32le(buf) & 0xfff; in getImplicitAddend() local
837 uint64_t imm12 = read16le(buf + 2) & 0x0fff; in getImplicitAddend() local
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| /dports/devel/llvm11/llvm-11.0.1.src/tools/lld/ELF/Arch/ |
| H A D | ARM.cpp | 705 int64_t imm12 = val; in relocate() local
819 uint32_t imm12 = read32le(buf) & 0xfff; in getImplicitAddend() local
843 uint64_t imm12 = read16le(buf + 2) & 0x0fff; in getImplicitAddend() local
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| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/lld/ELF/Arch/ |
| H A D | ARM.cpp | 705 int64_t imm12 = val; in relocate() local
819 uint32_t imm12 = read32le(buf) & 0xfff; in getImplicitAddend() local
843 uint64_t imm12 = read16le(buf + 2) & 0x0fff; in getImplicitAddend() local
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| /dports/devel/llvm12/llvm-project-12.0.1.src/lld/ELF/Arch/ |
| H A D | ARM.cpp | 705 int64_t imm12 = val; in relocate() local
819 uint32_t imm12 = read32le(buf) & 0xfff; in getImplicitAddend() local
843 uint64_t imm12 = read16le(buf + 2) & 0x0fff; in getImplicitAddend() local
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| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/lld/ELF/Arch/ |
| H A D | ARM.cpp | 688 int64_t imm12 = val; in relocate() local
811 uint32_t imm12 = read32le(buf) & 0xfff; in getImplicitAddend() local
835 uint64_t imm12 = read16le(buf + 2) & 0x0fff; in getImplicitAddend() local
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| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/lld/ELF/Arch/ |
| H A D | ARM.cpp | 690 int64_t imm12 = val; in relocate() local
813 uint32_t imm12 = read32le(buf) & 0xfff; in getImplicitAddend() local
837 uint64_t imm12 = read16le(buf + 2) & 0x0fff; in getImplicitAddend() local
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| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/lld/ELF/Arch/ |
| H A D | ARM.cpp | 690 int64_t imm12 = val; in relocate() local
813 uint32_t imm12 = read32le(buf) & 0xfff; in getImplicitAddend() local
837 uint64_t imm12 = read16le(buf + 2) & 0x0fff; in getImplicitAddend() local
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| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/lld/ELF/Arch/ |
| H A D | ARM.cpp | 705 int64_t imm12 = val; in relocate() local
819 uint32_t imm12 = read32le(buf) & 0xfff; in getImplicitAddend() local
843 uint64_t imm12 = read16le(buf + 2) & 0x0fff; in getImplicitAddend() local
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| /dports/emulators/yuzu/yuzu-0b47f7a46/externals/dynarmic/src/frontend/A32/translate/impl/ |
| H A D | hint.cpp | 14 [[maybe_unused]] Imm<12> imm12) { in arm_PLD_imm()
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| H A D | misc.cpp | 74 bool ArmTranslatorVisitor::arm_MOVT(Cond cond, Imm<4> imm4, Reg d, Imm<12> imm12) { in arm_MOVT()
91 bool ArmTranslatorVisitor::arm_MOVW(Cond cond, Imm<4> imm4, Reg d, Imm<12> imm12) { in arm_MOVW()
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| /dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/frontend/A32/translate/impl/ |
| H A D | hint.cpp | 14 [[maybe_unused]] Imm<12> imm12) { in arm_PLD_imm()
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| H A D | misc.cpp | 74 bool ArmTranslatorVisitor::arm_MOVT(Cond cond, Imm<4> imm4, Reg d, Imm<12> imm12) { in arm_MOVT()
91 bool ArmTranslatorVisitor::arm_MOVW(Cond cond, Imm<4> imm4, Reg d, Imm<12> imm12) { in arm_MOVW()
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| /dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/frontend/A32/translate/impl/ |
| H A D | hint.cpp | 14 [[maybe_unused]] Imm<12> imm12) { in arm_PLD_imm()
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| H A D | misc.cpp | 74 bool ArmTranslatorVisitor::arm_MOVT(Cond cond, Imm<4> imm4, Reg d, Imm<12> imm12) { in arm_MOVT()
91 bool ArmTranslatorVisitor::arm_MOVW(Cond cond, Imm<4> imm4, Reg d, Imm<12> imm12) { in arm_MOVW()
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| /dports/lang/v8/v8-9.6.180.12/src/codegen/riscv64/ |
| H A D | assembler-riscv64.cc | 396 int32_t imm12 = instr >> 20; in target_at() local
456 int32_t imm12 = ((imm & 0x800) >> 4) | // bit 11 in SetBranchOffset() local
468 int32_t imm12 = offset << kImm12Shift; in SetLdOffset() local
483 int32_t imm12 = offset << kImm12Shift; in SetJalrOffset() local
919 Register rs1, int16_t imm12) { in GenInstrI()
1269 int16_t imm12) { in GenInstrLoad_ri()
1274 int16_t imm12) { in GenInstrStore_rri()
1279 int16_t imm12) { in GenInstrALU_ri()
1319 int16_t imm12) { in GenInstrLoadFP_ri()
1657 uint16_t imm12 = succ | (pred << 4) | (0b0000 << 8); in fence() local
[all …]
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm64/net/ |
| H A D | bpf_jit.h | 97 #define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \ argument
101 #define A64_ADD_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD) argument
102 #define A64_SUB_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB) argument
103 #define A64_ADDS_I(sf, Rd, Rn, imm12) \ argument
105 #define A64_SUBS_I(sf, Rd, Rn, imm12) \ argument
108 #define A64_CMN_I(sf, Rn, imm12) A64_ADDS_I(sf, A64_ZR, Rn, imm12) argument
110 #define A64_CMP_I(sf, Rn, imm12) A64_SUBS_I(sf, A64_ZR, Rn, imm12) argument
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm64/net/ |
| H A D | bpf_jit.h | 97 #define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \ argument
101 #define A64_ADD_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD) argument
102 #define A64_SUB_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB) argument
103 #define A64_ADDS_I(sf, Rd, Rn, imm12) \ argument
105 #define A64_SUBS_I(sf, Rd, Rn, imm12) \ argument
108 #define A64_CMN_I(sf, Rn, imm12) A64_ADDS_I(sf, A64_ZR, Rn, imm12) argument
110 #define A64_CMP_I(sf, Rn, imm12) A64_SUBS_I(sf, A64_ZR, Rn, imm12) argument
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