1 /* $OpenBSD: mongoosereg.h,v 1.2 2008/08/24 18:53:36 miod Exp $ */ 2 3 /* 4 * Copyright (c) 1998-2003 Michael Shalayeff 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 * THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* EISA Bus Adapter registers definitions */ 30 #define MONGOOSE_MONGOOSE 0x10000 31 struct mongoose_regs { 32 u_int8_t version; 33 u_int8_t lock; 34 u_int8_t liowait; 35 u_int8_t clock; 36 u_int8_t reserved[0xf000 - 4]; 37 u_int8_t intack; 38 }; 39 40 #define MONGOOSE_CTRL 0x00000 41 #define MONGOOSE_NINTS 16 42 struct mongoose_ctrl { 43 struct dma0 { 44 struct { 45 u_int16_t addr : 8; 46 u_int16_t count: 8; 47 } ch[4]; 48 u_int8_t command; 49 u_int8_t request; 50 u_int8_t mask_channel; 51 u_int8_t mode; 52 u_int8_t clr_byte_ptr; 53 u_int8_t master_clear; 54 u_int8_t mask_clear; 55 u_int8_t master_write; 56 u_int8_t pad[15]; 57 } dma0; 58 59 u_int8_t irr0; /* 0x20 */ 60 u_int8_t imr0; 61 u_int8_t iack; /* 0x22 -- 2 b2b reads generate 62 (e)isa Iack cycle & returns int level */ 63 u_int8_t pad0[29]; 64 65 struct timers { 66 u_int8_t sysclk; 67 u_int8_t refresh; 68 u_int8_t spkr; 69 u_int8_t ctrl; 70 u_int32_t pad; 71 } tmr[2]; /* 0x40 -- timers control */ 72 u_int8_t pad1[16]; 73 74 u_int16_t inmi; /* 0x60 NMI control */ 75 u_int8_t pad2[30]; 76 struct { 77 u_int8_t pad0; 78 u_int8_t ch2; 79 u_int8_t ch3; 80 u_int8_t ch1; 81 u_int8_t pad1; 82 u_int8_t pad2[3]; 83 u_int8_t ch0; 84 u_int8_t pad4; 85 u_int8_t ch6; 86 u_int8_t ch7; 87 u_int8_t ch5; 88 u_int8_t pad5[3]; 89 u_int8_t pad6[16]; 90 } pr; /* 0x80 */ 91 92 u_int8_t irr1; /* 0xa0 */ 93 u_int8_t imr1; 94 u_int8_t pad3[30]; 95 96 struct dma1 { 97 struct { 98 u_int32_t addr : 16; 99 u_int32_t count: 16; 100 } ch[4]; 101 u_int16_t command; 102 u_int16_t request; 103 u_int16_t mask_channel; 104 u_int16_t mode; 105 u_int16_t clr_byte_ptr; 106 u_int16_t master_clear; 107 u_int16_t mask_clear; 108 u_int16_t master_write; 109 } dma1; /* 0xc0 */ 110 111 u_int8_t master_req; /* 0xe0 master request register */ 112 u_int8_t pad4[31]; 113 114 u_int8_t pad5[0x3d0]; /* 0x4d0 */ 115 u_int8_t pic0; /* 0 - edge, 1 - level */ 116 u_int8_t pic1; 117 u_int8_t pad6[0x460]; 118 u_int8_t nmi; 119 u_int8_t nmi_ext; 120 #define MONGOOSE_NMI_BUSRESET 0x01 121 #define MONGOOSE_NMI_IOPORT_EN 0x02 122 #define MONGOOSE_NMI_EN 0x04 123 #define MONGOOSE_NMI_MTMO_EN 0x08 124 #define MONGOOSE_NMI_RES4 0x10 125 #define MONGOOSE_NMI_IOPORT_INT 0x20 126 #define MONGOOSE_NMI_MASTER_INT 0x40 127 #define MONGOOSE_NMI_INT 0x80 128 }; 129 130 #define MONGOOSE_IOMAP 0x100000 131