1 /* $OpenBSD: ixgbe_vf.c,v 1.1 2024/11/02 04:37:20 yasuoka Exp $ */
2
3 /******************************************************************************
4
5 Copyright (c) 2001-2017, Intel Corporation
6 All rights reserved.
7
8 Redistribution and use in source and binary forms, with or without
9 modification, are permitted provided that the following conditions are met:
10
11 1. Redistributions of source code must retain the above copyright notice,
12 this list of conditions and the following disclaimer.
13
14 2. Redistributions in binary form must reproduce the above copyright
15 notice, this list of conditions and the following disclaimer in the
16 documentation and/or other materials provided with the distribution.
17
18 3. Neither the name of the Intel Corporation nor the names of its
19 contributors may be used to endorse or promote products derived from
20 this software without specific prior written permission.
21
22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 POSSIBILITY OF SUCH DAMAGE.
33
34 ******************************************************************************/
35
36 #include <dev/pci/ixgbe.h>
37 #include <dev/pci/ixgbe_type.h>
38
39 #ifndef IXGBE_VFWRITE_REG
40 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
41 #endif
42 #ifndef IXGBE_VFREAD_REG
43 #define IXGBE_VFREAD_REG IXGBE_READ_REG
44 #endif
45
46 /**
47 Dummy handlers.
48 They are called from ix driver code,
49 and there is nothing to do for VF.
50 */
51 static uint64_t
ixgbe_dummy_uint64_handler_vf(struct ixgbe_hw * hw)52 ixgbe_dummy_uint64_handler_vf(struct ixgbe_hw *hw)
53 {
54 return 0;
55 }
56
57 static int32_t
ixgbe_dummy_handler_vf(struct ixgbe_hw * hw)58 ixgbe_dummy_handler_vf(struct ixgbe_hw *hw)
59 {
60 return 0;
61 }
62
63 static void
ixgbe_dummy_void_handler_vf(struct ixgbe_hw * hw)64 ixgbe_dummy_void_handler_vf(struct ixgbe_hw *hw)
65 {
66 return;
67 }
68
69 /**
70 * ixgbe_init_ops_vf - Initialize the pointers for vf
71 * @hw: pointer to hardware structure
72 *
73 * This will assign function pointers, adapter-specific functions can
74 * override the assignment of generic function pointers by assigning
75 * their own adapter-specific function pointers.
76 * Does not touch the hardware.
77 **/
ixgbe_init_ops_vf(struct ixgbe_hw * hw)78 int32_t ixgbe_init_ops_vf(struct ixgbe_hw *hw)
79 {
80 /* MAC */
81 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
82 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
83 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
84 /* Cannot clear stats on VF */
85 hw->mac.ops.clear_hw_cntrs = NULL;
86 hw->mac.ops.get_media_type = NULL;
87 hw->mac.ops.get_supported_physical_layer =
88 ixgbe_dummy_uint64_handler_vf;
89 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
90 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
91 hw->mac.ops.get_bus_info = NULL;
92 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;
93
94 /* Link */
95 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
96 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
97 hw->mac.ops.get_link_capabilities = NULL;
98
99 /* RAR, Multicast, VLAN */
100 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
101 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
102 hw->mac.ops.init_rx_addrs = NULL;
103 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
104 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
105 hw->mac.ops.get_link_state = ixgbe_get_link_state_vf;
106 hw->mac.ops.enable_mc = NULL;
107 hw->mac.ops.disable_mc = NULL;
108 hw->mac.ops.clear_vfta = NULL;
109 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
110 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;
111
112 /* Flow Control */
113 hw->mac.ops.fc_enable = ixgbe_dummy_handler_vf;
114 hw->mac.ops.setup_fc = ixgbe_dummy_handler_vf;
115 hw->mac.ops.fc_autoneg = ixgbe_dummy_void_handler_vf;
116
117 hw->mac.max_tx_queues = 1;
118 hw->mac.max_rx_queues = 1;
119
120 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
121
122 return IXGBE_SUCCESS;
123 }
124
125 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
126 * @hw: pointer to hardware structure
127 */
ixgbe_virt_clr_reg(struct ixgbe_hw * hw)128 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
129 {
130 int i;
131 uint32_t vfsrrctl;
132 uint32_t vfdca_rxctrl;
133 uint32_t vfdca_txctrl;
134
135 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
136 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
137 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
138
139 /* DCA_RXCTRL default value */
140 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
141 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
142 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
143
144 /* DCA_TXCTRL default value */
145 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
146 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
147 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
148
149 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
150
151 for (i = 0; i < 7; i++) {
152 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
153 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
154 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
155 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
156 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
157 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
158 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
159 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
160 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
161 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
162 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
163 }
164
165 IXGBE_WRITE_FLUSH(hw);
166 }
167
168 /**
169 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
170 * @hw: pointer to hardware structure
171 *
172 * Starts the hardware by filling the bus info structure and media type, clears
173 * all on chip counters, initializes receive address registers, multicast
174 * table, VLAN filter table, calls routine to set up link and flow control
175 * settings, and leaves transmit and receive units disabled and uninitialized
176 **/
ixgbe_start_hw_vf(struct ixgbe_hw * hw)177 int32_t ixgbe_start_hw_vf(struct ixgbe_hw *hw)
178 {
179 /* Clear adapter stopped flag */
180 hw->adapter_stopped = FALSE;
181
182 return IXGBE_SUCCESS;
183 }
184
185 /**
186 * ixgbe_init_hw_vf - virtual function hardware initialization
187 * @hw: pointer to hardware structure
188 *
189 * Initialize the hardware by resetting the hardware and then starting
190 * the hardware
191 **/
ixgbe_init_hw_vf(struct ixgbe_hw * hw)192 int32_t ixgbe_init_hw_vf(struct ixgbe_hw *hw)
193 {
194 int32_t status = hw->mac.ops.start_hw(hw);
195
196 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
197
198 return status;
199 }
200
201 /**
202 * ixgbe_reset_hw_vf - Performs hardware reset
203 * @hw: pointer to hardware structure
204 *
205 * Resets the hardware by resetting the transmit and receive units, masks and
206 * clears all interrupts.
207 **/
ixgbe_reset_hw_vf(struct ixgbe_hw * hw)208 int32_t ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
209 {
210 struct ixgbe_mbx_info *mbx = &hw->mbx;
211 uint32_t timeout = IXGBE_VF_INIT_TIMEOUT;
212 int32_t ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
213 uint32_t msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
214 uint8_t *addr = (uint8_t *)(&msgbuf[1]);
215
216 DEBUGFUNC("ixgbevf_reset_hw_vf");
217
218 /* Call adapter stop to disable tx/rx and clear interrupts */
219 hw->mac.ops.stop_adapter(hw);
220
221 /* reset the api version */
222 hw->api_version = ixgbe_mbox_api_10;
223 ixgbe_init_mbx_params_vf(hw);
224
225 DEBUGOUT("Issuing a function level reset to MAC\n");
226
227 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
228 IXGBE_WRITE_FLUSH(hw);
229
230 msec_delay(50);
231
232 /* we cannot reset while the RSTI / RSTD bits are asserted */
233 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
234 timeout--;
235 usec_delay(5);
236 }
237
238 if (!timeout)
239 return IXGBE_ERR_RESET_FAILED;
240
241 /* Reset VF registers to initial values */
242 ixgbe_virt_clr_reg(hw);
243
244 /* mailbox timeout can now become active */
245 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
246
247 msgbuf[0] = IXGBE_VF_RESET;
248 ixgbe_write_mbx(hw, msgbuf, 1, 0);
249
250 msec_delay(10);
251
252 /*
253 * set our "perm_addr" based on info provided by PF
254 * also set up the mc_filter_type which is piggy backed
255 * on the mac address in word 3
256 */
257 ret_val = ixgbe_poll_mbx(hw, msgbuf,
258 IXGBE_VF_PERMADDR_MSG_LEN, 0);
259 if (ret_val)
260 return ret_val;
261
262 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS) &&
263 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_FAILURE))
264 return IXGBE_ERR_INVALID_MAC_ADDR;
265
266 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS))
267 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
268
269 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
270
271 return ret_val;
272 }
273
274 /**
275 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
276 * @hw: pointer to hardware structure
277 *
278 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
279 * disables transmit and receive units. The adapter_stopped flag is used by
280 * the shared code and drivers to determine if the adapter is in a stopped
281 * state and should not touch the hardware.
282 **/
ixgbe_stop_adapter_vf(struct ixgbe_hw * hw)283 int32_t ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
284 {
285 uint32_t reg_val;
286 uint16_t i;
287
288 /*
289 * Set the adapter_stopped flag so other driver functions stop touching
290 * the hardware
291 */
292 hw->adapter_stopped = TRUE;
293
294 /* Clear interrupt mask to stop from interrupts being generated */
295 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
296
297 /* Clear any pending interrupts, flush previous writes */
298 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
299
300 /* Disable the transmit unit. Each queue must be disabled. */
301 for (i = 0; i < hw->mac.max_tx_queues; i++)
302 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
303
304 /* Disable the receive unit by stopping each queue */
305 for (i = 0; i < hw->mac.max_rx_queues; i++) {
306 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
307 reg_val &= ~IXGBE_RXDCTL_ENABLE;
308 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
309 }
310 /* Clear packet split and pool config */
311 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
312
313 /* flush all queues disables */
314 IXGBE_WRITE_FLUSH(hw);
315 msec_delay(2);
316
317 return IXGBE_SUCCESS;
318 }
319
ixgbevf_write_msg_read_ack(struct ixgbe_hw * hw,uint32_t * msg,uint32_t * retmsg,uint16_t size)320 static int32_t ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, uint32_t *msg,
321 uint32_t *retmsg, uint16_t size)
322 {
323 int32_t retval = ixgbe_write_mbx(hw, msg, size, 0);
324
325 if (retval)
326 return retval;
327
328 return ixgbe_poll_mbx(hw, retmsg, size, 0);
329 }
330
331 /**
332 * ixgbe_set_rar_vf - set device MAC address
333 * @hw: pointer to hardware structure
334 * @index: Receive address register to write
335 * @addr: Address to put into receive address register
336 * @vmdq: VMDq "set" or "pool" index
337 * @enable_addr: set flag that address is active
338 **/
ixgbe_set_rar_vf(struct ixgbe_hw * hw,uint32_t index,uint8_t * addr,uint32_t vmdq,uint32_t enable_addr)339 int32_t ixgbe_set_rar_vf(struct ixgbe_hw *hw, uint32_t index, uint8_t *addr,
340 uint32_t vmdq, uint32_t enable_addr)
341 {
342 uint32_t msgbuf[3];
343 uint8_t *msg_addr = (uint8_t *)(&msgbuf[1]);
344 int32_t ret_val;
345
346 memset(msgbuf, 0, 12);
347 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
348 memcpy(msg_addr, addr, 6);
349 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
350
351 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
352
353 /* if nacked the address was rejected, use "perm_addr" */
354 if (!ret_val &&
355 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_FAILURE))) {
356 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
357 return IXGBE_ERR_MBX;
358 }
359
360 return ret_val;
361 }
362
363 /**
364 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
365 * @hw: pointer to the HW structure
366 * @mc_addr_list: array of multicast addresses to program
367 * @mc_addr_count: number of multicast addresses to program
368 * @next: caller supplied function to return next address in list
369 * @clear: unused
370 *
371 * Updates the Multicast Table Array.
372 **/
ixgbe_update_mc_addr_list_vf(struct ixgbe_hw * hw,uint8_t * mc_addr_list,uint32_t mc_addr_count,ixgbe_mc_addr_itr next,bool clear)373 int32_t ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, uint8_t *mc_addr_list,
374 uint32_t mc_addr_count, ixgbe_mc_addr_itr next,
375 bool clear)
376 {
377 uint32_t msgbuf[IXGBE_VFMAILBOX_SIZE];
378 uint16_t *vector_list = (uint16_t *)&msgbuf[1];
379 uint32_t vector;
380 uint32_t cnt, i;
381 uint32_t vmdq;
382
383 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
384
385 /* Each entry in the list uses 1 16 bit word. We have 30
386 * 16 bit words available in our HW msg buffer (minus 1 for the
387 * msg type). That's 30 hash values if we pack 'em right. If
388 * there are more than 30 MC addresses to add then punt the
389 * extras for now and then add code to handle more than 30 later.
390 * It would be unusual for a server to request that many multi-cast
391 * addresses except for in large enterprise network environments.
392 */
393
394 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
395
396 cnt = (mc_addr_count > IXGBE_MAX_MULTICAST_ADDRESSES_VF) ? IXGBE_MAX_MULTICAST_ADDRESSES_VF : mc_addr_count;
397 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
398 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
399
400 for (i = 0; i < cnt; i++) {
401 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
402 DEBUGOUT1("Hash value = 0x%03X\n", vector);
403 vector_list[i] = (uint16_t)vector;
404 }
405
406 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, IXGBE_VFMAILBOX_SIZE);
407 }
408
409 /**
410 * ixgbevf_update_xcast_mode - Update Multicast mode
411 * @hw: pointer to the HW structure
412 * @xcast_mode: new multicast mode
413 *
414 * Updates the Multicast Mode of VF.
415 **/
ixgbevf_update_xcast_mode(struct ixgbe_hw * hw,int xcast_mode)416 int32_t ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
417 {
418 uint32_t msgbuf[2];
419 int32_t err;
420
421 switch (hw->api_version) {
422 case ixgbe_mbox_api_12:
423 /* New modes were introduced in 1.3 version */
424 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI)
425 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
426 /* Fall through */
427 case ixgbe_mbox_api_13:
428 case ixgbe_mbox_api_15:
429 break;
430 default:
431 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
432 }
433
434 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
435 msgbuf[1] = xcast_mode;
436
437 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
438 if (err)
439 return err;
440
441 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
442 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_FAILURE))
443 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
444 return IXGBE_SUCCESS;
445 }
446
447 /**
448 * ixgbe_get_link_state_vf - Get VF link state from PF
449 * @hw: pointer to the HW structure
450 * @link_state: link state storage
451 *
452 * Returns state of the operation error or success.
453 **/
ixgbe_get_link_state_vf(struct ixgbe_hw * hw,bool * link_state)454 int32_t ixgbe_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state)
455 {
456 uint32_t msgbuf[2];
457 int32_t err;
458 int32_t ret_val;
459
460 msgbuf[0] = IXGBE_VF_GET_LINK_STATE;
461 msgbuf[1] = 0x0;
462
463 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
464
465 if (err || (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE)) {
466 ret_val = IXGBE_ERR_MBX;
467 } else {
468 ret_val = IXGBE_SUCCESS;
469 *link_state = msgbuf[1];
470 }
471
472 return ret_val;
473 }
474
475 /**
476 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
477 * @hw: pointer to the HW structure
478 * @vlan: 12 bit VLAN ID
479 * @vind: unused by VF drivers
480 * @vlan_on: if TRUE then set bit, else clear bit
481 * @vlvf_bypass: boolean flag indicating updating default pool is okay
482 *
483 * Turn on/off specified VLAN in the VLAN filter table.
484 **/
ixgbe_set_vfta_vf(struct ixgbe_hw * hw,uint32_t vlan,uint32_t vind,bool vlan_on,bool vlvf_bypass)485 int32_t ixgbe_set_vfta_vf(struct ixgbe_hw *hw, uint32_t vlan, uint32_t vind,
486 bool vlan_on, bool vlvf_bypass)
487 {
488 uint32_t msgbuf[2];
489 int32_t ret_val;
490
491 msgbuf[0] = IXGBE_VF_SET_VLAN;
492 msgbuf[1] = vlan;
493 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
494 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
495
496 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
497 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_SUCCESS))
498 return IXGBE_SUCCESS;
499
500 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE);
501 }
502
503 /**
504 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
505 * @hw: pointer to hardware structure
506 *
507 * Returns the number of transmit queues for the given adapter.
508 **/
ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw * hw)509 uint32_t ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
510 {
511 return IXGBE_VF_MAX_TX_QUEUES;
512 }
513
514 /**
515 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
516 * @hw: pointer to hardware structure
517 *
518 * Returns the number of receive queues for the given adapter.
519 **/
ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw * hw)520 uint32_t ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
521 {
522 return IXGBE_VF_MAX_RX_QUEUES;
523 }
524
525 /**
526 * ixgbe_get_mac_addr_vf - Read device MAC address
527 * @hw: pointer to the HW structure
528 * @mac_addr: the MAC address
529 **/
ixgbe_get_mac_addr_vf(struct ixgbe_hw * hw,uint8_t * mac_addr)530 int32_t ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, uint8_t *mac_addr)
531 {
532 int i;
533
534 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
535 mac_addr[i] = hw->mac.perm_addr[i];
536
537 return IXGBE_SUCCESS;
538 }
539
ixgbevf_set_uc_addr_vf(struct ixgbe_hw * hw,uint32_t index,uint8_t * addr)540 int32_t ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, uint32_t index, uint8_t *addr)
541 {
542 uint32_t msgbuf[3], msgbuf_chk;
543 uint8_t *msg_addr = (uint8_t *)(&msgbuf[1]);
544 int32_t ret_val;
545
546 memset(msgbuf, 0, sizeof(msgbuf));
547 /*
548 * If index is one then this is the start of a new list and needs
549 * indication to the PF so it can do it's own list management.
550 * If it is zero then that tells the PF to just clear all of
551 * this VF's macvlans and there is no new list.
552 */
553 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
554 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
555 msgbuf_chk = msgbuf[0];
556 if (addr)
557 memcpy(msg_addr, addr, 6);
558
559 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
560 if (!ret_val) {
561 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
562
563 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_FAILURE))
564 return IXGBE_ERR_OUT_OF_MEM;
565 }
566
567 return ret_val;
568 }
569
570 /**
571 * ixgbe_setup_mac_link_vf - Setup MAC link settings
572 * @hw: pointer to hardware structure
573 * @speed: new link speed
574 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
575 *
576 * Set the link speed in the AUTOC register and restarts link.
577 **/
ixgbe_setup_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed speed,bool autoneg_wait_to_complete)578 int32_t ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
579 bool autoneg_wait_to_complete)
580 {
581 return IXGBE_SUCCESS;
582 }
583
584 /**
585 * ixgbe_check_mac_link_vf - Get link/speed status
586 * @hw: pointer to hardware structure
587 * @speed: pointer to link speed
588 * @link_up: TRUE is link is up, FALSE otherwise
589 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
590 *
591 * Reads the links register to determine if link is up and the current speed
592 **/
ixgbe_check_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed * speed,bool * link_up,bool autoneg_wait_to_complete)593 int32_t ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
594 bool *link_up, bool autoneg_wait_to_complete)
595 {
596 struct ixgbe_mbx_info *mbx = &hw->mbx;
597 struct ixgbe_mac_info *mac = &hw->mac;
598 int32_t ret_val = IXGBE_SUCCESS;
599 uint32_t in_msg = 0;
600 uint32_t links_reg;
601
602 /* If we were hit with a reset drop the link */
603 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
604 mac->get_link_status = TRUE;
605
606 if (!mac->get_link_status)
607 goto out;
608
609 /* if link status is down no point in checking to see if pf is up */
610 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
611 if (!(links_reg & IXGBE_LINKS_UP))
612 goto out;
613
614 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
615 * before the link status is correct
616 */
617 if (mac->type == ixgbe_mac_82599_vf) {
618 int i;
619
620 for (i = 0; i < 5; i++) {
621 usec_delay(100);
622 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
623
624 if (!(links_reg & IXGBE_LINKS_UP))
625 goto out;
626 }
627 }
628
629 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
630 case IXGBE_LINKS_SPEED_10G_82599:
631 *speed = IXGBE_LINK_SPEED_10GB_FULL;
632 if (hw->mac.type >= ixgbe_mac_X550_vf) {
633 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
634 *speed = IXGBE_LINK_SPEED_2_5GB_FULL;
635 }
636 break;
637 case IXGBE_LINKS_SPEED_1G_82599:
638 *speed = IXGBE_LINK_SPEED_1GB_FULL;
639 break;
640 case IXGBE_LINKS_SPEED_100_82599:
641 *speed = IXGBE_LINK_SPEED_100_FULL;
642 if (hw->mac.type == ixgbe_mac_X550_vf) {
643 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
644 *speed = IXGBE_LINK_SPEED_5GB_FULL;
645 }
646 break;
647 case IXGBE_LINKS_SPEED_10_X550EM_A:
648 *speed = IXGBE_LINK_SPEED_UNKNOWN;
649 /* Since Reserved in older MAC's */
650 if (hw->mac.type >= ixgbe_mac_X550_vf)
651 *speed = IXGBE_LINK_SPEED_10_FULL;
652 break;
653 default:
654 *speed = IXGBE_LINK_SPEED_UNKNOWN;
655 }
656
657 /* if the read failed it could just be a mailbox collision, best wait
658 * until we are called again and don't report an error
659 */
660 if (ixgbe_read_mbx(hw, &in_msg, 1, 0)) {
661 if (hw->api_version >= ixgbe_mbox_api_15)
662 mac->get_link_status = FALSE;
663 goto out;
664 }
665
666 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
667 /* msg is not CTS and is NACK we must have lost CTS status */
668 if (in_msg & IXGBE_VT_MSGTYPE_FAILURE)
669 ret_val = IXGBE_ERR_MBX;
670 goto out;
671 }
672
673 /* the pf is talking, if we timed out in the past we reinit */
674 if (!mbx->timeout) {
675 ret_val = IXGBE_ERR_TIMEOUT;
676 goto out;
677 }
678
679 /* if we passed all the tests above then the link is up and we no
680 * longer need to check for link
681 */
682 mac->get_link_status = FALSE;
683
684 out:
685 *link_up = !mac->get_link_status;
686 return ret_val;
687 }
688
689 /**
690 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
691 * @hw: pointer to the HW structure
692 * @max_size: value to assign to max frame size
693 **/
ixgbevf_rlpml_set_vf(struct ixgbe_hw * hw,uint16_t max_size)694 int32_t ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, uint16_t max_size)
695 {
696 uint32_t msgbuf[2];
697 int32_t retval;
698
699 msgbuf[0] = IXGBE_VF_SET_LPE;
700 msgbuf[1] = max_size;
701
702 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
703 if (retval)
704 return retval;
705 if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
706 (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE))
707 return IXGBE_ERR_MBX;
708
709 return 0;
710 }
711
712 /**
713 * ixgbevf_negotiate_api_version - Negotiate supported API version
714 * @hw: pointer to the HW structure
715 * @api: integer containing requested API version
716 **/
ixgbevf_negotiate_api_version(struct ixgbe_hw * hw,int api)717 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
718 {
719 int err;
720 uint32_t msg[3];
721
722 /* Negotiate the mailbox API version */
723 msg[0] = IXGBE_VF_API_NEGOTIATE;
724 msg[1] = api;
725 msg[2] = 0;
726
727 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);
728 if (!err) {
729 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
730
731 /* Store value and return 0 on success */
732 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_SUCCESS)) {
733 hw->api_version = api;
734 return 0;
735 }
736
737 err = IXGBE_ERR_INVALID_ARGUMENT;
738 }
739
740 return err;
741 }
742
ixgbevf_get_queues(struct ixgbe_hw * hw,unsigned int * num_tcs,unsigned int * default_tc)743 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
744 unsigned int *default_tc)
745 {
746 int err;
747 uint32_t msg[5];
748
749 /* do nothing if API doesn't support ixgbevf_get_queues */
750 switch (hw->api_version) {
751 case ixgbe_mbox_api_11:
752 case ixgbe_mbox_api_12:
753 case ixgbe_mbox_api_13:
754 case ixgbe_mbox_api_15:
755 break;
756 default:
757 return 0;
758 }
759
760 /* Fetch queue configuration from the PF */
761 msg[0] = IXGBE_VF_GET_QUEUES;
762 msg[1] = msg[2] = msg[3] = msg[4] = 0;
763
764 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);
765 if (!err) {
766 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
767
768 /*
769 * if we didn't get a SUCCESS there must have been
770 * some sort of mailbox error so we should treat it
771 * as such
772 */
773 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_SUCCESS))
774 return IXGBE_ERR_MBX;
775
776 /* record and validate values from message */
777 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
778 if (hw->mac.max_tx_queues == 0 ||
779 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
780 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
781
782 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
783 if (hw->mac.max_rx_queues == 0 ||
784 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
785 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
786
787 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
788 /* in case of unknown state assume we cannot tag frames */
789 if (*num_tcs > hw->mac.max_rx_queues)
790 *num_tcs = 1;
791
792 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
793 /* default to queue 0 on out-of-bounds queue number */
794 if (*default_tc >= hw->mac.max_tx_queues)
795 *default_tc = 0;
796 }
797
798 return err;
799 }
800