| /dports/cad/sumo/sumo-1.2.0/src/netimport/vissim/typeloader/ |
| H A D | NIVissimSingleTypeParser_Streckendefinition.cpp | 107 int laneNo; in parse() local
|
| H A D | NIVissimSingleTypeParser_Verbindungsdefinition.cpp | 136 int laneNo; in parse() local
|
| /dports/cad/sumo/sumo-1.2.0/src/guisim/ |
| H A D | GUIEdge.cpp | 82 GUIEdge::getLane(int laneNo) { in getLane()
|
| /dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/VEX/priv/ |
| H A D | guest_arm64_toIR.c | 1416 static Int offsetQRegLane ( UInt qregNo, IRType laneTy, UInt laneNo ) in offsetQRegLane()
1541 static void putQRegLane ( UInt qregNo, UInt laneNo, IRExpr* e ) in putQRegLane()
1558 static IRExpr* getQRegLane ( UInt qregNo, UInt laneNo, IRType laneTy ) in getQRegLane()
7947 IRTemp math_DUP_VEC_ELEM ( IRExpr* src, UInt size, UInt laneNo ) in math_DUP_VEC_ELEM()
8003 IRTemp handle_DUP_VEC_ELEM ( /*OUT*/UInt* laneNo, in handle_DUP_VEC_ELEM()
8940 UInt laneNo = 0; in dis_AdvSIMD_copy() local
9018 UInt laneNo = 16; in dis_AdvSIMD_copy() local
9082 UInt laneNo = 16; /* invalid */ in dis_AdvSIMD_copy() local
9378 UInt laneNo = 16; /* invalid */ in dis_AdvSIMD_scalar_copy() local
|
| H A D | host_arm64_defs.c | 1325 ARM64Instr* ARM64Instr_VXfromQ ( HReg rX, HReg rQ, UInt laneNo ) { in ARM64Instr_VXfromQ()
5375 UInt laneNo = i->ARM64in.VXfromQ.laneNo; in emit_ARM64Instr() local
|
| H A D | host_arm64_isel.c | 1865 UInt laneNo = (e->Iex.Unop.op == Iop_V128HIto64) ? 1 : 0; in iselIntExpr_R_wrk() local
|
| H A D | host_arm64_defs.h | 887 UInt laneNo; /* either 0 or 1 */ member
|
| /dports/devel/valgrind/valgrind-dragonfly-dragonfly/VEX/priv/ |
| H A D | guest_arm64_toIR.c | 1416 static Int offsetQRegLane ( UInt qregNo, IRType laneTy, UInt laneNo ) in offsetQRegLane()
1541 static void putQRegLane ( UInt qregNo, UInt laneNo, IRExpr* e ) in putQRegLane()
1558 static IRExpr* getQRegLane ( UInt qregNo, UInt laneNo, IRType laneTy ) in getQRegLane()
7947 IRTemp math_DUP_VEC_ELEM ( IRExpr* src, UInt size, UInt laneNo ) in math_DUP_VEC_ELEM()
8003 IRTemp handle_DUP_VEC_ELEM ( /*OUT*/UInt* laneNo, in handle_DUP_VEC_ELEM()
8940 UInt laneNo = 0; in dis_AdvSIMD_copy() local
9018 UInt laneNo = 16; in dis_AdvSIMD_copy() local
9082 UInt laneNo = 16; /* invalid */ in dis_AdvSIMD_copy() local
9378 UInt laneNo = 16; /* invalid */ in dis_AdvSIMD_scalar_copy() local
|
| H A D | host_arm64_defs.c | 1325 ARM64Instr* ARM64Instr_VXfromQ ( HReg rX, HReg rQ, UInt laneNo ) { in ARM64Instr_VXfromQ()
5375 UInt laneNo = i->ARM64in.VXfromQ.laneNo; in emit_ARM64Instr() local
|
| H A D | host_arm64_isel.c | 1865 UInt laneNo = (e->Iex.Unop.op == Iop_V128HIto64) ? 1 : 0; in iselIntExpr_R_wrk() local
|
| H A D | host_arm64_defs.h | 887 UInt laneNo; /* either 0 or 1 */ member
|
| /dports/security/py-pyvex/pyvex-9.0.5405/vex/priv/ |
| H A D | host_arm64_defs.c | 1318 ARM64Instr* ARM64Instr_VXfromQ ( HReg rX, HReg rQ, UInt laneNo ) { in ARM64Instr_VXfromQ()
5299 UInt laneNo = i->ARM64in.VXfromQ.laneNo; in emit_ARM64Instr() local
|
| H A D | host_arm64_isel.c | 1837 UInt laneNo = (e->Iex.Unop.op == Iop_V128HIto64) ? 1 : 0; in iselIntExpr_R_wrk() local
|
| H A D | host_arm64_defs.h | 862 UInt laneNo; /* either 0 or 1 */ member
|