1 /* 2 * Copyright (c) 2011-2021, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_hw.h 24 //! \brief This modules implements HW interface layer to be used on all platforms on all operating systems/DDIs, across CODECHAL components. 25 //! 26 27 #ifndef __CODECHAL_HW_H__ 28 #define __CODECHAL_HW_H__ 29 30 #include "codechal.h" 31 #include "renderhal.h" 32 #include "mhw_mi.h" 33 #include "mhw_render.h" 34 #include "mhw_state_heap.h" 35 #include "mhw_vdbox.h" 36 #include "mhw_vebox.h" 37 #include "mhw_sfc.h" 38 #include "mhw_cp_interface.h" 39 40 #include "mhw_vdbox_mfx_interface.h" 41 #include "mhw_vdbox_hcp_interface.h" 42 #include "mhw_vdbox_avp_interface.h" 43 #include "mhw_vdbox_huc_interface.h" 44 #include "mhw_vdbox_vdenc_interface.h" 45 #include "mhw_vdbox_hcp_itf.h" 46 47 #include "media_interfaces_mhw.h" 48 49 #include "gfxmacro.h" 50 51 #ifdef IGFX_MHW_INTERFACES_NEXT_SUPPORT 52 #include "codec_hw_next.h" 53 #endif 54 55 //------------------------------------------------------------------------------ 56 // Macros specific to MOS_CODEC_SUBCOMP_HW sub-comp 57 //------------------------------------------------------------------------------ 58 #define CODECHAL_HW_ASSERT(_expr) \ 59 MOS_ASSERT(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _expr) 60 61 #define CODECHAL_HW_ASSERTMESSAGE(_message, ...) \ 62 MOS_ASSERTMESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _message, ##__VA_ARGS__) 63 64 #define CODECHAL_HW_NORMALMESSAGE(_message, ...) \ 65 MOS_NORMALMESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _message, ##__VA_ARGS__) 66 67 #define CODECHAL_HW_VERBOSEMESSAGE(_message, ...) \ 68 MOS_VERBOSEMESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _message, ##__VA_ARGS__) 69 70 #define CODECHAL_HW_FUNCTION_ENTER \ 71 MOS_FUNCTION_ENTER(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW) 72 73 #define CODECHAL_HW_CHK_STATUS(_stmt) \ 74 MOS_CHK_STATUS(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _stmt) 75 76 #define CODECHAL_HW_CHK_STATUS_RETURN(_stmt) \ 77 MOS_CHK_STATUS_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _stmt) 78 79 #define CODECHAL_HW_CHK_STATUS_MESSAGE(_stmt, _message, ...) \ 80 MOS_CHK_STATUS_MESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _stmt, _message, ##__VA_ARGS__) 81 82 #define CODECHAL_HW_CHK_NULL(_ptr) \ 83 MOS_CHK_NULL(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _ptr) 84 85 #define CODECHAL_HW_CHK_NULL_RETURN(_ptr) \ 86 MOS_CHK_NULL_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _ptr) 87 88 #define CODECHAL_HW_CHK_NULL_NO_STATUS(_ptr) \ 89 MOS_CHK_NULL_NO_STATUS(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW, _ptr) 90 91 #define CODECHAL_HW_CHK_COND_RETURN(_expr, _message, ...) \ 92 MOS_CHK_COND_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_HW,_expr,_message, ##__VA_ARGS__) 93 94 #define CODECHAL_CACHELINE_SIZE 64 95 #define CODECHAL_PAGE_SIZE 0x1000 96 #define CODECHAL_PAK_OBJ_EACH_CU 66 97 98 #define CODECHAL_SURFACE_PITCH_ALIGNMENT 128 99 100 #define CODECHAL_MEDIA_WALKER_MAX_COLORS 16 // 4 Bits for color field gives max 16 colors 101 102 #define CODECHAL_VDIRECTION_FRAME 2 103 #define CODECHAL_VDIRECTION_TOP_FIELD 1 104 #define CODECHAL_VDIRECTION_BOT_FIELD 3 105 #define CODECHAL_VLINESTRIDE_FRAME 0 106 #define CODECHAL_VLINESTRIDE_FIELD 1 107 #define CODECHAL_VLINESTRIDEOFFSET_TOP_FIELD 0 108 #define CODECHAL_VLINESTRIDEOFFSET_BOT_FIELD 1 109 110 // Params for Huc 111 #define HUC_DMEM_OFFSET_RTOS_GEMS 0x2000 112 113 #define CODECHAL_MAX_DEPENDENCY_COUNT 8 114 115 #define CODECHAL_INVALID_BINDING_TABLE_IDX 0xFFFFFFFF 116 117 //! 118 //! \enum MoTargetCache 119 //! \brief Mo target cache 120 //! 121 enum MoTargetCache 122 { 123 CODECHAL_MO_TARGET_CACHE_ELLC = 0x0, 124 CODECHAL_MO_TARGET_CACHE_LLC = 0x1, 125 CODECHAL_MO_TARGET_CACHE_LLC_ELLC = 0x2, 126 CODECHAL_MO_TARGET_CACHE_L3_LLC_ELLC = 0x3 127 }; 128 129 //! 130 //! \enum CodechalCacheabilityType 131 //! \brief Codechal cacheability type 132 //! 133 enum CodechalCacheabilityType 134 { 135 codechalUncacheable = 0, 136 codechalLLC = 1, 137 codechalL3 = 2, 138 codechalUncacheableWa = 8 139 }; 140 141 //! 142 //! \enum CodechalWalkingPattern 143 //! \brief Codechal walking pattern 144 //! 145 enum CodechalWalkingPattern 146 { 147 codechalHorizontal26DegreeScan = 0, 148 codechalHorizontal45DegreeScan = 1, 149 codechalHorizontal26DegreeScanMbaff = 2, 150 codechalHorizontalRasterScan = 3, 151 codechalVerticalRasterScan = 4 152 }; 153 154 typedef enum _CODECHAL_MEDIA_STATE_TYPE 155 { 156 CODECHAL_MEDIA_STATE_OLP = 0, 157 CODECHAL_MEDIA_STATE_ENC_NORMAL = 1, 158 CODECHAL_MEDIA_STATE_ENC_PERFORMANCE = 2, 159 CODECHAL_MEDIA_STATE_ENC_QUALITY = 3, 160 CODECHAL_MEDIA_STATE_ENC_I_FRAME_DIST = 4, 161 CODECHAL_MEDIA_STATE_32X_SCALING = 5, 162 CODECHAL_MEDIA_STATE_16X_SCALING = 6, 163 CODECHAL_MEDIA_STATE_4X_SCALING = 7, 164 CODECHAL_MEDIA_STATE_32X_ME = 8, 165 CODECHAL_MEDIA_STATE_16X_ME = 9, 166 CODECHAL_MEDIA_STATE_4X_ME = 10, 167 CODECHAL_MEDIA_STATE_BRC_INIT_RESET = 11, 168 CODECHAL_MEDIA_STATE_BRC_UPDATE = 12, 169 CODECHAL_MEDIA_STATE_BRC_BLOCK_COPY = 13, 170 CODECHAL_MEDIA_STATE_HYBRID_PAK_P1 = 14, 171 CODECHAL_MEDIA_STATE_HYBRID_PAK_P2 = 15, 172 CODECHAL_MEDIA_STATE_ENC_I_FRAME_CHROMA = 16, 173 CODECHAL_MEDIA_STATE_ENC_I_FRAME_LUMA = 17, 174 CODECHAL_MEDIA_STATE_MPU_FHB = 18, 175 CODECHAL_MEDIA_STATE_TPU_FHB = 19, 176 CODECHAL_MEDIA_STATE_PA_COPY = 20, 177 CODECHAL_MEDIA_STATE_PL2_COPY = 21, 178 CODECHAL_MEDIA_STATE_ENC_ADV = 22, 179 CODECHAL_MEDIA_STATE_2X_SCALING = 23, 180 CODECHAL_MEDIA_STATE_32x32_PU_MODE_DECISION = 24, 181 CODECHAL_MEDIA_STATE_16x16_PU_SAD = 25, 182 CODECHAL_MEDIA_STATE_16x16_PU_MODE_DECISION = 26, 183 CODECHAL_MEDIA_STATE_8x8_PU = 27, 184 CODECHAL_MEDIA_STATE_8x8_PU_FMODE = 28, 185 CODECHAL_MEDIA_STATE_32x32_B_INTRA_CHECK = 29, 186 CODECHAL_MEDIA_STATE_HEVC_B_MBENC = 30, 187 CODECHAL_MEDIA_STATE_RESET_VLINE_STRIDE = 31, 188 CODECHAL_MEDIA_STATE_HEVC_B_PAK = 32, 189 CODECHAL_MEDIA_STATE_HEVC_BRC_LCU_UPDATE = 33, 190 CODECHAL_MEDIA_STATE_ME_VDENC_STREAMIN = 34, 191 CODECHAL_MEDIA_STATE_VP9_ENC_I_32x32 = 35, 192 CODECHAL_MEDIA_STATE_VP9_ENC_I_16x16 = 36, 193 CODECHAL_MEDIA_STATE_VP9_ENC_P = 37, 194 CODECHAL_MEDIA_STATE_VP9_ENC_TX = 38, 195 CODECHAL_MEDIA_STATE_VP9_DYS = 39, 196 CODECHAL_MEDIA_STATE_VP9_PAK_LUMA_RECON = 40, 197 CODECHAL_MEDIA_STATE_VP9_PAK_CHROMA_RECON = 41, 198 CODECHAL_MEDIA_STATE_VP9_PAK_DEBLOCK_MASK = 42, 199 CODECHAL_MEDIA_STATE_VP9_PAK_LUMA_DEBLOCK = 43, 200 CODECHAL_MEDIA_STATE_VP9_PAK_CHROMA_DEBLOCK = 44, 201 CODECHAL_MEDIA_STATE_VP9_PAK_MC_PRED = 45, 202 CODECHAL_MEDIA_STATE_VP9_PAK_P_FRAME_LUMA_RECON = 46, 203 CODECHAL_MEDIA_STATE_VP9_PAK_P_FRAME_LUMA_RECON_32x32 = 47, 204 CODECHAL_MEDIA_STATE_VP9_PAK_P_FRAME_CHROMA_RECON = 48, 205 CODECHAL_MEDIA_STATE_VP9_PAK_P_FRAME_INTRA_LUMA_RECON = 49, 206 CODECHAL_MEDIA_STATE_VP9_PAK_P_FRAME_INTRA_CHROMA_RECON = 50, 207 CODECHAL_MEDIA_STATE_PREPROC = 51, 208 CODECHAL_MEDIA_STATE_ENC_WP = 52, 209 CODECHAL_MEDIA_STATE_HEVC_I_MBENC = 53, 210 CODECHAL_MEDIA_STATE_CSC_DS_COPY = 54, 211 CODECHAL_MEDIA_STATE_2X_4X_SCALING = 55, 212 CODECHAL_MEDIA_STATE_HEVC_LCU64_B_MBENC = 56, 213 CODECHAL_MEDIA_STATE_MB_BRC_UPDATE = 57, 214 CODECHAL_MEDIA_STATE_STATIC_FRAME_DETECTION = 58, 215 CODECHAL_MEDIA_STATE_HEVC_ROI = 59, 216 CODECHAL_MEDIA_STATE_SW_SCOREBOARD_INIT = 60, 217 CODECHAL_NUM_MEDIA_STATES = 61 218 } CODECHAL_MEDIA_STATE_TYPE; 219 C_ASSERT(CODECHAL_NUM_MEDIA_STATES == CODECHAL_MEDIA_STATE_SW_SCOREBOARD_INIT + 1); //!< update this and add new entry in the default SSEU table for each platform() 220 221 typedef enum _CODECHAL_SLICE_STATE 222 { 223 CODECHAL_SLICE_SHUTDOWN_DEFAULT = 0, 224 CODECHAL_SLICE_SHUTDOWN_ONE_SLICE = 1, 225 CODECHAL_SLICE_SHUTDOWN_TWO_SLICES = 2 226 } CODECHAL_SLICE_STATE; 227 228 //! 229 //! \struct CodechalQpStatusCount 230 //! \brief Codechal qp status count 231 //! 232 struct CodechalQpStatusCount 233 { 234 union{ 235 struct{ 236 uint32_t cumulativeQP : 24; 237 uint32_t cumulativeQPAdjust : 8; 238 }; 239 240 struct 241 { 242 // DW0 243 uint32_t hcpCumulativeQP : 24; 244 uint32_t : 8; 245 246 // DW1 247 uint32_t hcpFrameMinCUQp : 6; 248 uint32_t hcpFrameMaxCUQp : 6; 249 uint32_t : 20; 250 }; 251 252 struct 253 { 254 uint32_t value[2]; 255 }; 256 }; 257 }; 258 259 //! 260 //! \struct CodechalHucStreamoutParams 261 //! \brief Codechal Huc streamout parameters 262 //! 263 struct CodechalHucStreamoutParams 264 { 265 CODECHAL_MODE mode; 266 267 // Indirect object addr command params 268 PMOS_RESOURCE dataBuffer; 269 uint32_t dataSize; // 4k aligned 270 uint32_t dataOffset; // 4k aligned 271 PMOS_RESOURCE streamOutObjectBuffer; 272 uint32_t streamOutObjectSize; // 4k aligned 273 uint32_t streamOutObjectOffset; //4k aligned 274 275 // Stream object params 276 uint32_t indStreamInLength; 277 uint32_t inputRelativeOffset; 278 uint32_t outputRelativeOffset; 279 280 // Segment Info 281 void *segmentInfo; 282 283 // Indirect Security State 284 MOS_RESOURCE hucIndState; 285 uint32_t curIndEntriesNum; 286 uint32_t curNumSegments; 287 }; 288 289 //! 290 //! \struct CodechalDataCopyParams 291 //! \brief Codechal data copy parameters 292 //! 293 struct CodechalDataCopyParams 294 { 295 // Src params 296 PMOS_RESOURCE srcResource; 297 uint32_t srcSize; 298 uint32_t srcOffset; 299 300 // Dst params 301 PMOS_RESOURCE dstResource; 302 uint32_t dstSize; 303 uint32_t dstOffset; 304 }; 305 306 //! 307 //! \struct EncodeStatusReadParams 308 //! \brief Read encode states parameters 309 //! 310 struct EncodeStatusReadParams 311 { 312 bool vdencBrcEnabled; 313 bool waReadVDEncOverflowStatus; 314 uint32_t mode ; 315 316 uint32_t vdencBrcNumOfSliceOffset; 317 PMOS_RESOURCE *resVdencBrcUpdateDmemBufferPtr; 318 319 PMOS_RESOURCE resBitstreamByteCountPerFrame; 320 uint32_t bitstreamByteCountPerFrameOffset; 321 322 PMOS_RESOURCE resBitstreamSyntaxElementOnlyBitCount; 323 uint32_t bitstreamSyntaxElementOnlyBitCountOffset; 324 325 PMOS_RESOURCE resQpStatusCount; 326 uint32_t qpStatusCountOffset; 327 328 PMOS_RESOURCE resNumSlices; 329 uint32_t numSlicesOffset; 330 331 PMOS_RESOURCE resImageStatusMask; 332 uint32_t imageStatusMaskOffset; 333 334 PMOS_RESOURCE resImageStatusCtrl; 335 uint32_t imageStatusCtrlOffset; 336 }; 337 338 //! 339 //! \struct BrcPakStatsReadParams 340 //! \brief Read brc pak states parameters 341 //! 342 struct BrcPakStatsReadParams 343 { 344 PMOS_RESOURCE presBrcPakStatisticBuffer; 345 uint32_t bitstreamBytecountFrameOffset; 346 uint32_t bitstreamBytecountFrameNoHeaderOffset; 347 uint32_t imageStatusCtrlOffset; 348 349 PMOS_RESOURCE presStatusBuffer; 350 uint32_t dwStatusBufNumPassesOffset; 351 uint8_t ucPass; 352 MOS_GPU_CONTEXT VideoContext; 353 }; 354 355 //! Codechal hw interface 356 /*! 357 This class defines the interfaces for hardware dependent settings and functions used in Codechal 358 */ 359 class CodechalHwInterface 360 { 361 protected: 362 // Slice Shutdown Threshold 363 static const uint32_t m_sliceShutdownAvcTargetUsageThreshold = 2; //!< slice shutdown AVC target usage threshold 364 static const uint32_t m_sliceShutdownAvcResolutionThreshold = 2073600; //!< slice shutdown AVC resolution threshold: 1080p - 1920x1080 365 static const uint32_t m_sliceShutdownMpeg2ResolutionThreshold = 8294400; //!< slice shutdown MPEG2 resolution threshold: 4K - 3840x2160 366 367 // States 368 PMOS_INTERFACE m_osInterface; //!< Pointer to OS interface 369 370 // Auxiliary 371 PLATFORM m_platform; //!< Platform information 372 MEDIA_FEATURE_TABLE *m_skuTable = nullptr; //!< Pointer to SKU table 373 MEDIA_WA_TABLE *m_waTable = nullptr; //!< Pointer to WA table 374 375 MHW_STATE_HEAP_SETTINGS m_stateHeapSettings; //!< State heap Mhw settings 376 MhwMiInterface *m_miInterface = nullptr; //!< Pointer to Mhw mi interface 377 MhwCpInterface *m_cpInterface = nullptr; //!< Pointer to Mhw cp interface 378 MhwRenderInterface *m_renderInterface = nullptr; //!< Pointer to Mhw render interface 379 RENDERHAL_INTERFACE *m_renderHal = nullptr; //!< RenderHal interface 380 MhwCpInterface *m_renderHalCpInterface = nullptr;//!< Pointer to RenderHal cp interface 381 MhwVeboxInterface *m_veboxInterface = nullptr; //!< Pointer to Mhw vebox interface 382 MhwSfcInterface *m_sfcInterface = nullptr; //!< Pointer to Mhw sfc interface 383 MhwVdboxMfxInterface *m_mfxInterface = nullptr; //!< Pointer to Mhw mfx interface 384 MhwVdboxHcpInterface *m_hcpInterface = nullptr; //!< Pointer to Mhw hcp interface 385 MhwVdboxAvpInterface *m_avpInterface = nullptr; //!< Pointer to Mhw avp interface 386 MhwVdboxHucInterface *m_hucInterface = nullptr; //!< Pointer to Mhw huc interface 387 MhwVdboxVdencInterface *m_vdencInterface = nullptr; //!< Pointer to Mhw vdenc interface 388 std::shared_ptr<mhw::vdbox::hcp::Itf> m_hcpItf = nullptr; 389 std::shared_ptr<mhw::vdbox::vdenc::Itf> m_vdencItf = nullptr; 390 391 CODECHAL_SSEU_SETTING const *m_ssEuTable = nullptr; //!< Pointer to the default SSEU settings table 392 uint16_t m_numMediaStates = CODECHAL_NUM_MEDIA_STATES; //!< number of media states 393 394 MHW_MEMORY_OBJECT_CONTROL_PARAMS m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_END_CODEC]; //!< Cacheability Settings list 395 396 // HuC WA implementation 397 MOS_RESOURCE m_dummyStreamIn; //!> Resource of dummy stream in 398 MOS_RESOURCE m_dummyStreamOut; //!> Resource of dummy stream out 399 MOS_RESOURCE m_hucDmemDummy; //!> Resource of Huc DMEM for dummy streamout WA 400 uint32_t m_dmemBufSize = 0; //!> 401 402 // COND BBE WA 403 MOS_RESOURCE m_conditionalBbEndDummy; //!> Dummy Resource for conditional batch buffer end WA 404 405 uint32_t m_maxKernelLoadCmdSize = 0; //!> Max kernel load cmd size 406 bool m_checkTargetCache = false; //!> Used to check L3 cache enable 407 bool m_checkBankCount = false; //!> Used to check L3 cache enable 408 409 uint32_t m_sizeOfCmdMediaObject = 0; //!> Size of media object cmd 410 uint32_t m_sizeOfCmdMediaStateFlush = 0; //!> Size of media state flush cmd 411 412 bool m_noSeparateL3LlcCacheabilitySettings = false; // No separate L3 LLC cacheability settings 413 414 bool m_disableScalability = false; //!> Flag to indicate if disable scalability by default 415 416 public: 417 // Hardware dependent parameters 418 bool m_turboMode = false; //!> Turbo mode info to pass in cmdBuf 419 bool m_isVdencSuperSliceEnabled = false; //!> Flag indicating Vdenc super slice is enabled 420 bool m_noHuC = false; //!> This flag to indicate HuC present on Linux 421 uint16_t m_sizeOfCmdBatchBufferEnd = 0; //!> Size of batch buffer end cmd 422 uint16_t m_sizeOfCmdMediaReset = 0; //!> Size of media reset cmd 423 uint32_t m_vdencBrcImgStateBufferSize = 0; //!> vdenc brc img state buffer size 424 uint32_t m_vdencBatchBuffer1stGroupSize = 0; //!> vdenc batch buffer 1st group size 425 uint32_t m_vdencBatchBuffer2ndGroupSize = 0; //!> vdenc batch buffer 2nd group size 426 uint32_t m_vdencReadBatchBufferSize = 0; //!> vdenc read batch buffer size for group1 and group2 427 uint32_t m_vdencGroup3BatchBufferSize = 0; //!> vdenc read batch buffer size for group3 428 uint32_t m_vdencCopyBatchBufferSize = 0; //!> vdenc copy batch buffer size 429 uint32_t m_vdenc2ndLevelBatchBufferSize = 0; //!> vdenc 2nd level batch buffer size 430 uint32_t m_vdencBatchBufferPerSliceConstSize = 0; //!> vdenc batch buffer per slice const size 431 uint32_t m_HucStitchCmdBatchBufferSize = 0; //!> huc stitch cmd 2nd level batch buffer size 432 uint32_t m_mpeg2BrcConstantSurfaceWidth = 64; //!> mpeg2 brc constant surface width 433 uint32_t m_mpeg2BrcConstantSurfaceHeight = 43; //!> mpeg2 brc constant surface height 434 uint32_t m_avcMbStatBufferSize = 0; //!> AVC Mb status buffer size 435 uint32_t m_pakIntTileStatsSize = 0; //!> Size of combined statistics across all tiles 436 uint32_t m_pakIntAggregatedFrameStatsSize = 0; //!> Size of HEVC/ VP9 PAK Stats, HEVC Slice Streamout, VDEnc Stats 437 uint32_t m_tileRecordSize = 0; //!> Tile record size 438 uint32_t m_hucCommandBufferSize = 0; //!> Size of a single HuC command buffer 439 440 // Slice/Sub-slice/EU Shutdown Parameters 441 uint32_t m_numRequestedEuSlices = 0; //!> Number of requested Slices 442 uint32_t m_numRequestedSubSlices = 0; //!> Number of requested Sub-slices 443 uint32_t m_numRequestedEus = 0; //!> Number of requested EUs 444 #if (_DEBUG || _RELEASE_INTERNAL) 445 bool m_numRequestedOverride = false; //!> Flag to indicate whether these params are set by Reg 446 uint32_t m_numRequestedEuSlicesOverride = 0; //!> Number of requested Slices set by Reg 447 uint32_t m_numRequestedSubSlicesOverride = 0; //!> Number of requested Sub-slices set by Reg 448 uint32_t m_numRequestedEusOverride = 0; //!> Number of requested EUs set by Reg 449 #endif 450 451 uint32_t m_ssdResolutionThreshold = 0; //!> Slice shutdown resolution threshold 452 uint32_t m_ssdTargetUsageThreshold = 0; //!> Slice shutdown target usage threshold 453 uint32_t m_mpeg2SSDResolutionThreshold = 0; //!> Slice shutdown resolution threshold for MPEG2 454 455 bool m_slicePowerGate = false; //!> Slice power gate 456 457 bool m_enableCodecMmc = false; //!> Flag to indicate if enable codec MMC by default or not 458 459 //! 460 //! \brief Constructor 461 //! 462 CodechalHwInterface( 463 PMOS_INTERFACE osInterface, 464 CODECHAL_FUNCTION codecFunction, 465 MhwInterfaces *mhwInterfaces, 466 bool disableScalability = false); 467 468 #ifdef IGFX_MHW_INTERFACES_NEXT_SUPPORT 469 CodechalHwInterface( 470 PMOS_INTERFACE osInterface, 471 CODECHAL_FUNCTION codecFunction, 472 MhwInterfacesNext *mhwInterfacesNext, 473 bool disableScalability = false); 474 475 //! 476 //! \brief Get avp interface 477 //! \details Get avp interface in codechal hw interface next 478 //! 479 //! \return pointer to new AVP interface 480 //! GetAvpInterfaceNext()481 inline std::shared_ptr<mhw::vdbox::avp::Itf> GetAvpInterfaceNext() 482 { 483 if (m_hwInterfaceNext) 484 { 485 return m_hwInterfaceNext->GetAvpInterfaceNext(); 486 } 487 else 488 { 489 return nullptr; 490 } 491 } 492 493 //! 494 //! \brief Get vdenc interface 495 //! \details Get vdenc interface in codechal hw interface next 496 //! 497 //! \return pointer to new Vdenc interface 498 //! GetVdencInterfaceNext()499 inline std::shared_ptr<mhw::vdbox::vdenc::Itf> GetVdencInterfaceNext() 500 { 501 if (m_hwInterfaceNext) 502 { 503 return m_hwInterfaceNext->GetVdencInterfaceNext(); 504 } 505 else 506 { 507 return nullptr; 508 } 509 } 510 511 //! \brief Get huc interface 512 //! \details Get huc interface in codechal hw interface next 513 //! 514 //! \return pointer to new HUC interface 515 //! GetHucInterfaceNext()516 inline std::shared_ptr<mhw::vdbox::huc::Itf> GetHucInterfaceNext() 517 { 518 if (m_hwInterfaceNext) 519 { 520 return m_hwInterfaceNext->GetHucInterfaceNext(); 521 } 522 else 523 { 524 return nullptr; 525 } 526 } 527 528 //! 529 //! \brief Get mi interface 530 //! \details Get mi interface in codechal hw interface next 531 //! 532 //! \return pointer to new MI interface 533 //! GetMiInterfaceNext()534 inline std::shared_ptr<mhw::mi::Itf> GetMiInterfaceNext() 535 { 536 if (m_hwInterfaceNext) 537 { 538 return m_hwInterfaceNext->GetMiInterfaceNext(); 539 } 540 else 541 { 542 return nullptr; 543 } 544 } 545 546 //! 547 //! \brief Get hcp interface 548 //! \details Get hcp interface in codechal hw interface next 549 //! 550 //! \return pointer to new HCP interface 551 //! GetHcpInterfaceNext()552 inline std::shared_ptr<mhw::vdbox::hcp::Itf> GetHcpInterfaceNext() 553 { 554 if (m_hwInterfaceNext) 555 { 556 return m_hwInterfaceNext->GetHcpInterfaceNext(); 557 } 558 else 559 { 560 return nullptr; 561 } 562 } 563 #endif 564 565 //! 566 //! \brief Copy constructor 567 //! 568 CodechalHwInterface(const CodechalHwInterface&) = delete; 569 570 //! 571 //! \brief Copy assignment operator 572 //! 573 CodechalHwInterface& operator=(const CodechalHwInterface&) = delete; 574 575 //! 576 //! \brief Destructor 577 //! ~CodechalHwInterface()578 virtual ~CodechalHwInterface() 579 { 580 CODECHAL_HW_FUNCTION_ENTER; 581 582 if (MEDIA_IS_WA(m_waTable, WaHucStreamoutEnable)) 583 { 584 m_osInterface->pfnFreeResource( 585 m_osInterface, 586 &m_hucDmemDummy); 587 m_osInterface->pfnFreeResource( 588 m_osInterface, 589 &m_dummyStreamIn); 590 m_osInterface->pfnFreeResource( 591 m_osInterface, 592 &m_dummyStreamOut); 593 } 594 595 m_osInterface->pfnFreeResource(m_osInterface, &m_conditionalBbEndDummy); 596 597 Delete_MhwCpInterface(m_cpInterface); 598 m_cpInterface = nullptr; 599 600 if (m_miInterface) 601 { 602 MOS_Delete(m_miInterface); 603 m_miInterface = nullptr; 604 } 605 606 if (m_renderInterface) 607 { 608 MOS_Delete(m_renderInterface); 609 m_renderInterface = nullptr; 610 } 611 612 if (m_veboxInterface) 613 { 614 m_veboxInterface->DestroyHeap(); 615 MOS_Delete(m_veboxInterface); 616 m_veboxInterface = nullptr; 617 } 618 619 if (m_mfxInterface) 620 { 621 MOS_Delete(m_mfxInterface); 622 m_mfxInterface = nullptr; 623 } 624 if (m_hcpInterface) 625 { 626 MOS_Delete(m_hcpInterface); 627 m_hcpInterface = nullptr; 628 } 629 if (m_hucInterface) 630 { 631 MOS_Delete(m_hucInterface); 632 m_hucInterface = nullptr; 633 } 634 if (m_vdencInterface) 635 { 636 MOS_Delete(m_vdencInterface); 637 m_vdencInterface = nullptr; 638 } 639 640 if (m_sfcInterface) 641 { 642 MOS_Delete(m_sfcInterface); 643 m_sfcInterface = nullptr; 644 } 645 #ifdef IGFX_MHW_INTERFACES_NEXT_SUPPORT 646 if (m_hwInterfaceNext) 647 { 648 MOS_Delete(m_hwInterfaceNext); 649 m_hwInterfaceNext = nullptr; 650 } 651 #endif 652 653 #if MHW_HWCMDPARSER_ENABLED 654 mhw::HwcmdParser::DestroyInstance(); 655 #endif 656 } 657 658 //! 659 //! \brief Get Os interface 660 //! \details Get Os interface in codechal hw interface 661 //! 662 //! \return [out] PMOS_INTERFACE 663 //! Interface got. 664 //! GetOsInterface()665 inline PMOS_INTERFACE GetOsInterface() 666 { 667 return m_osInterface; 668 } 669 670 //! 671 //! \brief Get State Heap Settings 672 //! \details Get State Heap Settings in codechal hw interface 673 //! 674 //! \return [out] MHW_STATE_HEAP_SETTINGS* 675 //! Settings got. 676 //! GetStateHeapSettings()677 inline MHW_STATE_HEAP_SETTINGS *GetStateHeapSettings() 678 { 679 return &m_stateHeapSettings; 680 } 681 682 //! 683 //! \brief Get mi interface 684 //! \details Get mi interface in codechal hw interface 685 //! 686 //! \return [out] MhwMiInterface* 687 //! Interface got. 688 //! GetMiInterface()689 inline MhwMiInterface *GetMiInterface() 690 { 691 return m_miInterface; 692 } 693 694 //! 695 //! \brief Get cp interface 696 //! \details Get cp interface in codechal hw interface 697 //! 698 //! \return [out] MhwCpInterface* 699 //! Interface got. 700 //! GetCpInterface()701 inline MhwCpInterface *GetCpInterface() 702 { 703 return m_cpInterface; 704 } 705 706 //! 707 //! \brief Get render interface 708 //! \details Get render interface in codechal hw interface 709 //! 710 //! \return [out] MhwRenderInterface* 711 //! Interface got. 712 //! GetRenderInterface()713 inline MhwRenderInterface *GetRenderInterface() 714 { 715 return m_renderInterface; 716 } 717 718 //! 719 //! \brief Get renderHal interface 720 //! \details Get renderHal interface in codechal hw interface 721 //! 722 //! \return [out] RENDERHAL_INTERFACE* 723 //! Interface got. 724 //! GetRenderHalInterface()725 inline RENDERHAL_INTERFACE *GetRenderHalInterface() 726 { 727 return m_renderHal; 728 } 729 730 //! 731 //! \brief Get vebox interface 732 //! \details Get vebox interface in codechal hw interface 733 //! 734 //! \return [out] MhwVeboxInterface* 735 //! Interface got. 736 //! GetVeboxInterface()737 inline MhwVeboxInterface *GetVeboxInterface() 738 { 739 return m_veboxInterface; 740 } 741 742 //! 743 //! \brief Get SFC interface 744 //! \details Get SFC interface in codechal hw interface 745 //! 746 //! \return [out] MhwSfcInterface* 747 //! Interface got. 748 //! GetSfcInterface()749 inline MhwSfcInterface *GetSfcInterface() 750 { 751 return m_sfcInterface; 752 } 753 754 //! 755 //! \brief Get mfx interface 756 //! \details Get mfx interface in codechal hw interface 757 //! 758 //! \return [out] MhwVdboxMfxInterface* 759 //! Interface got. 760 //! GetMfxInterface()761 inline MhwVdboxMfxInterface *GetMfxInterface() 762 { 763 return m_mfxInterface; 764 } 765 766 //! 767 //! \brief Get hcp interface 768 //! \details Get hcp interface in codechal hw interface 769 //! 770 //! \return [out] MhwVdboxHcpInterface* 771 //! Interface got. 772 //! GetHcpInterface()773 inline MhwVdboxHcpInterface *GetHcpInterface() 774 { 775 return m_hcpInterface; 776 } 777 778 //! 779 //! \brief Get avp interface 780 //! \details Get avp interface in codechal hw interface 781 //! 782 //! \return [out] MhwVdboxAvpInterface* 783 //! Interface got. 784 //! GetAvpInterface()785 MhwVdboxAvpInterface *GetAvpInterface() 786 { 787 return m_avpInterface; 788 } 789 790 //! 791 //! \brief Get huc interface 792 //! \details Get huc interface in codechal hw interface 793 //! 794 //! \return [out] MhwVdboxHucInterface* 795 //! Interface got. 796 //! GetHucInterface()797 inline MhwVdboxHucInterface *GetHucInterface() 798 { 799 return m_hucInterface; 800 } 801 802 //! 803 //! \brief Get vdenc interface 804 //! \details Get vdenc interface in codechal hw interface 805 //! 806 //! \return [out] MhwVdboxVdencInterface* 807 //! Interface got. 808 //! GetVdencInterface()809 inline MhwVdboxVdencInterface *GetVdencInterface() 810 { 811 return m_vdencInterface; 812 } 813 814 //! 815 //! \brief Get platform 816 //! \details Get platform in codechal hw interface 817 //! 818 //! \return [out] PLATFORM 819 //! Platform got. 820 //! GetPlatform()821 inline PLATFORM GetPlatform() 822 { 823 return m_platform; 824 } 825 826 //! 827 //! \brief Get Sku table 828 //! \details Get Sku table in codechal hw interface 829 //! 830 //! \return [out] MEDIA_FEATURE_TABLE * 831 //! Sku table got. 832 //! GetSkuTable()833 inline MEDIA_FEATURE_TABLE *GetSkuTable() 834 { 835 return m_skuTable; 836 } 837 838 //! 839 //! \brief Get Wa table 840 //! \details Get Wa table in codechal hw interface 841 //! 842 //! \return [out] MEDIA_WA_TABLE 843 //! Wa table got. 844 //! GetWaTable()845 inline MEDIA_WA_TABLE *GetWaTable() 846 { 847 return m_waTable; 848 } 849 850 //! 851 //! \brief Get Cacheability Settings 852 //! \details Get Cacheability Settings in codechal hw interface 853 //! 854 //! \return [out] MHW_MEMORY_OBJECT_CONTROL_PARAMS* 855 //! Cachebility Settings got. 856 //! GetCacheabilitySettings()857 inline MHW_MEMORY_OBJECT_CONTROL_PARAMS *GetCacheabilitySettings() 858 { 859 return m_cacheabilitySettings; 860 } 861 862 //! 863 //! \brief Set Cacheability Settings 864 //! \details Set Cacheability Settings in sub interfaces in codechal hw interface 865 //! 866 //! \param [in] cacheabilitySettings 867 //! cacheability Settings to set into sub mhw intefaces in hw interface 868 //! 869 //! \return MOS_STATUS 870 //! MOS_STATUS_SUCCESS if success, else fail reason 871 //! 872 virtual MOS_STATUS SetCacheabilitySettings( 873 MHW_MEMORY_OBJECT_CONTROL_PARAMS cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_END_CODEC]); 874 875 //! 876 //! \brief Set Rowstore Cache offsets 877 //! \details Set Rowstore Cache offsets in sub interfaces in codechal hw interface 878 //! 879 //! \param [in] rowstoreParams 880 //! parameters to set rowstore cache offsets 881 //! 882 //! \return MOS_STATUS 883 //! MOS_STATUS_SUCCESS if success, else fail reason 884 //! 885 virtual MOS_STATUS SetRowstoreCachingOffsets( 886 PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams); 887 888 //! 889 //! \brief Init Cacheability Control Settings 890 //! \details Init Cacheability Control Settings in codechal hw interface 891 //! 892 //! \param [in] codecFunction 893 //! codec function used to judge how to setup cacheability control settings 894 //! 895 //! \return MOS_STATUS 896 //! MOS_STATUS_SUCCESS if success, else fail reason 897 //! 898 MOS_STATUS InitCacheabilityControlSettings( 899 CODECHAL_FUNCTION codecFunction); 900 901 //! 902 //! \brief Init L3 Cache Settings 903 //! 904 //! \return MOS_STATUS 905 //! MOS_STATUS_SUCCESS if success, else fail reason 906 //! 907 virtual MOS_STATUS InitL3CacheSettings(); 908 909 //! 910 //! \brief Get memory object of GMM Cacheability control settings 911 //! \details Internal function to get memory object of GMM Cacheability control settings 912 //! 913 //! \param [in] mosUsage 914 //! Codec usages in mos type 915 //! 916 //! \return MOS_STATUS 917 //! MOS_STATUS_SUCCESS if success, else fail reason 918 //! 919 MOS_STATUS CachePolicyGetMemoryObject( 920 MOS_HW_RESOURCE_DEF mosUsage); 921 922 //! 923 //! \brief Calculates the maximum size for all picture level commands 924 //! \details Client facing function to calculate the maximum size for all picture level commands in mfx pipline 925 //! 926 //! \param [in] mode 927 //! codec mode 928 //! \param [out] commandsSize 929 //! The maximum command buffer size 930 //! \param [out] patchListSize 931 //! The maximum command patch list size 932 //! \param [in] shortFormat 933 //! True if short format, false long format 934 //! 935 //! \return MOS_STATUS 936 //! MOS_STATUS_SUCCESS if success, else fail reason 937 //! 938 MOS_STATUS GetMfxStateCommandsDataSize( 939 uint32_t mode, 940 uint32_t *commandsSize, 941 uint32_t *patchListSize, 942 bool shortFormat); 943 944 //! 945 //! \brief Calculates maximum size for all slice/MB level commands 946 //! \details Client facing function to calculate maximum size for all slice/MB level commands in mfx pipeline 947 //! 948 //! \param [in] mode 949 //! Codec mode 950 //! \param [out] commandsSize 951 //! The maximum command buffer size 952 //! \param [out] patchListSize 953 //! The maximum command patch list size 954 //! \param [in] modeSpecific 955 //! Indicate the long or short format for decoder or single take phase for encoder 956 //! 957 //! \return MOS_STATUS 958 //! MOS_STATUS_SUCCESS if success, else fail reason 959 //! 960 MOS_STATUS GetMfxPrimitiveCommandsDataSize( 961 uint32_t mode, 962 uint32_t *commandsSize, 963 uint32_t *patchListSize, 964 bool modeSpecific); 965 966 //! 967 //! \brief Calculates the maximum size for HCP/HUC picture level commands 968 //! \details Client facing function to calculate the maximum size for HCP/HUC picture level commands 969 //! \param [in] mode 970 //! Indicate the codec mode 971 //! \param [out] commandsSize 972 //! The maximum command buffer size 973 //! \param [out] patchListSize 974 //! The maximum command patch list size 975 //! \param [in] params 976 //! Indicate the command size parameters 977 //! \return MOS_STATUS 978 //! MOS_STATUS_SUCCESS if success, else fail reason 979 //! 980 MOS_STATUS GetHxxStateCommandSize( 981 uint32_t mode, 982 uint32_t *commandsSize, 983 uint32_t *patchListSize, 984 PMHW_VDBOX_STATE_CMDSIZE_PARAMS params); 985 986 //! 987 //! \brief Calculates maximum size for HCP/HUC slice/MB level commands 988 //! \details Client facing function to calculate maximum size for HCP/HUC slice/MB level commands 989 //! \param [in] mode 990 //! Indicate the codec mode 991 //! \param [out] commandsSize 992 //! The maximum command buffer size 993 //! \param [out] patchListSize 994 //! The maximum command patch list size 995 //! \param [in] modeSpecific 996 //! Indicate the long or short format 997 //! \return MOS_STATUS 998 //! MOS_STATUS_SUCCESS if success, else fail reason 999 //! 1000 MOS_STATUS GetHxxPrimitiveCommandSize( 1001 uint32_t mode, 1002 uint32_t *commandsSize, 1003 uint32_t *patchListSize, 1004 bool modeSpecific); 1005 1006 //! 1007 //! \brief Calculates the maximum size for HCP picture level commands 1008 //! \details Client facing function to calculate the maximum size for HCP picture level commands 1009 //! \param [in] mode 1010 //! Indicate the codec mode 1011 //! \param [out] commandsSize 1012 //! The maximum command buffer size 1013 //! \param [out] patchListSize 1014 //! The maximum command patch list size 1015 //! \param [in] params 1016 //! Indicate the command size parameters 1017 //! \return MOS_STATUS 1018 //! MOS_STATUS_SUCCESS if success, else fail reason 1019 //! 1020 MOS_STATUS GetHcpStateCommandSize( 1021 uint32_t mode, 1022 uint32_t * commandsSize, 1023 uint32_t * patchListSize, 1024 PMHW_VDBOX_STATE_CMDSIZE_PARAMS params); 1025 1026 //! 1027 //! \brief Calculates maximum size for HCP slice/MB level commands 1028 //! \details Client facing function to calculate maximum size for HCP slice/MB level commands 1029 //! \param [in] mode 1030 //! Indicate the codec mode 1031 //! \param [out] commandsSize 1032 //! The maximum command buffer size 1033 //! \param [out] patchListSize 1034 //! The maximum command patch list size 1035 //! \param [in] modeSpecific 1036 //! Indicate the long or short format 1037 //! \return MOS_STATUS 1038 //! MOS_STATUS_SUCCESS if success, else fail reason 1039 //! 1040 MOS_STATUS GetHcpPrimitiveCommandSize( 1041 uint32_t mode, 1042 uint32_t *commandsSize, 1043 uint32_t *patchListSize, 1044 bool modeSpecific); 1045 1046 //! 1047 //! \brief Calculates the maximum size for Huc picture level commands 1048 //! \details Client facing function to calculate the maximum size for HUC picture level commands 1049 //! \param [in] mode 1050 //! Indicate the codec mode 1051 //! \param [out] commandsSize 1052 //! The maximum command buffer size 1053 //! \param [out] patchListSize 1054 //! The maximum command patch list size 1055 //! \param [in] params 1056 //! Indicate the command size parameters 1057 //! \return MOS_STATUS 1058 //! MOS_STATUS_SUCCESS if success, else fail reason 1059 //! 1060 MOS_STATUS GetHucStateCommandSize( 1061 uint32_t mode, 1062 uint32_t *commandsSize, 1063 uint32_t *patchListSize, 1064 PMHW_VDBOX_STATE_CMDSIZE_PARAMS params); 1065 1066 //! 1067 //! \brief Calculates maximum size for Huc slice/MB level commands 1068 //! \details Client facing function to calculate maximum size for Huc slice/MB level commands 1069 //! \param [in] mode 1070 //! Indicate the codec mode 1071 //! \param [out] commandsSize 1072 //! The maximum command buffer size 1073 //! \param [out] patchListSize 1074 //! The maximum command patch list size 1075 //! \return MOS_STATUS 1076 //! MOS_STATUS_SUCCESS if success, else fail reason 1077 //! 1078 MOS_STATUS GetHucPrimitiveCommandSize( 1079 uint32_t mode, 1080 uint32_t *commandsSize, 1081 uint32_t *patchListSize); 1082 1083 //! 1084 //! \brief Calculates the maximum size for Vdenc state level commands 1085 //! \details Client facing function to calculate the maximum size for Vdenc state level commands 1086 //! \param [in] mode 1087 //! Indicate the codec mode 1088 //! \param [out] commandsSize 1089 //! The maximum command buffer size 1090 //! \param [out] patchListSize 1091 //! The maximum command patch list size 1092 //! \return MOS_STATUS 1093 //! MOS_STATUS_SUCCESS if success, else fail reason 1094 //! 1095 MOS_STATUS GetVdencStateCommandsDataSize( 1096 uint32_t mode, 1097 uint32_t *commandsSize, 1098 uint32_t *patchListSize); 1099 1100 //! 1101 //! \brief Calculates maximum size for all slice level VDEnc commands 1102 //! \details Client facing function to calculate the maximum size for Vdenc slice level commands 1103 //! \param [in] mode 1104 //! Indicate the codec mode 1105 //! \param [out] commandsSize 1106 //! The maximum command buffer size 1107 //! \param [out] patchListSize 1108 //! The maximum command patch list size 1109 //! \return MOS_STATUS 1110 //! MOS_STATUS_SUCCESS if success, else fail reason 1111 //! 1112 MOS_STATUS GetVdencPrimitiveCommandsDataSize( 1113 uint32_t mode, 1114 uint32_t *commandsSize, 1115 uint32_t *patchListSize); 1116 1117 //! 1118 //! \brief Calculates the maximum size for Vdenc picture 2nd level commands 1119 //! \details Client facing function to calculate the maximum size for Vdenc picture 2nd level commands 1120 //! \param [in] mode 1121 //! Indicate the codec mode 1122 //! \param [out] commandsSize 1123 //! The maximum command buffer size 1124 //! \return MOS_STATUS 1125 //! MOS_STATUS_SUCCESS if success, else fail reason 1126 //! 1127 virtual MOS_STATUS GetVdencPictureSecondLevelCommandsSize( 1128 uint32_t mode, 1129 uint32_t *commandsSize); 1130 1131 //! 1132 //! \brief Calculates the maximum size for Huc Streamout commands 1133 //! \details Client facing function to calculate the maximum size for Huc Streamout commands 1134 //! \param [out] commandsSize 1135 //! The maximum command buffer size 1136 //! \param [out] patchListSize 1137 //! The maximum command patch list size 1138 //! \return MOS_STATUS 1139 //! MOS_STATUS_SUCCESS if success, else fail reason 1140 //! 1141 virtual MOS_STATUS GetStreamoutCommandSize( 1142 uint32_t *commandsSize, 1143 uint32_t *patchListSize); 1144 1145 //! 1146 //! \brief Initialize the codechal hw interface 1147 //! \details Initialize the interface before using 1148 //! 1149 //! \param [in] settings 1150 //! Settings for initialization 1151 //! 1152 //! \return MOS_STATUS 1153 //! MOS_STATUS_SUCCESS if success, else fail reason 1154 //! 1155 virtual MOS_STATUS Initialize( 1156 CodechalSetting *settings); 1157 1158 //! 1159 //! \brief Get meida object buffer size 1160 //! \details Calculate the 2nd level BB size for media object BBs used with kernels 1161 //! 1162 //! \param [in] numMbs 1163 //! Number of MBs for calculation 1164 //! \param [in] inlineDataSize 1165 //! Inline data size used 1166 //! 1167 //! \return uint32_t 1168 //! Buffer size got. 1169 //! 1170 uint32_t GetMediaObjectBufferSize( 1171 uint32_t numMbs, 1172 uint32_t inlineDataSize); 1173 1174 //! 1175 //! \brief Add vdenc brc img buffer 1176 //! \details Add vdenc bitrate control image buffer into cmdbuffer 1177 //! 1178 //! \param [in] vdencBrcImgBuffer 1179 //! Resource of vdenc brc img buffer 1180 //! \param [in] params 1181 //! parameter used for AVC img parameters 1182 //! 1183 //! \return MOS_STATUS 1184 //! MOS_STATUS_SUCCESS if success, else fail reason 1185 //! 1186 MOS_STATUS AddVdencBrcImgBuffer( 1187 PMOS_RESOURCE vdencBrcImgBuffer, 1188 PMHW_VDBOX_AVC_IMG_PARAMS params); 1189 1190 //! 1191 //! \brief Add vdenc sfd img buffer 1192 //! \details Add vdenc static frame detection image buffer into cmdbuffer 1193 //! 1194 //! \param [in] vdencSfdImgBuffer 1195 //! Resource of vdenc brc img buffer 1196 //! \param [in] params 1197 //! parameter used for AVC img parameters 1198 //! 1199 //! \return MOS_STATUS 1200 //! MOS_STATUS_SUCCESS if success, else fail reason 1201 //! 1202 MOS_STATUS AddVdencSfdImgBuffer( 1203 PMOS_RESOURCE vdencSfdImgBuffer, 1204 PMHW_VDBOX_AVC_IMG_PARAMS params); 1205 1206 //! 1207 //! \brief Calculates the maximum size for all kernel loading commands 1208 //! \details Client facing function to calculate the maximum size for all kernel loading commands 1209 //! \param [in] maxNumSurfaces 1210 //! maximum surface number 1211 //! \return uint32_t 1212 //! Returns the maximum size for all kernel loading commands 1213 //! 1214 uint32_t GetKernelLoadCommandSize( 1215 uint32_t maxNumSurfaces); 1216 1217 //! 1218 //! \brief Resizes the cmd buffer and patch list 1219 //! \details Resizes the buffer to be used for rendering GPU commands 1220 //! 1221 //! \param [in] requestedCommandBufferSize 1222 //! Requested resize command buffer size 1223 //! \param [in] requestedPatchListSize 1224 //! Requested resize patchlist size 1225 //! 1226 //! \return MOS_STATUS 1227 //! MOS_STATUS_SUCCESS if success, else fail reason 1228 //! 1229 MOS_STATUS ResizeCommandBufferAndPatchList( 1230 uint32_t requestedCommandBufferSize, 1231 uint32_t requestedPatchListSize); 1232 1233 //! 1234 //! \brief Resizes the cmd buffer and patch list with cmd buffer header 1235 //! \details Resizes the buffer to be used for rendering GPU commands with cmd buffer header 1236 //! 1237 //! \param [in] requestedCommandBufferSize 1238 //! Requested resize command buffer size 1239 //! \param [in] requestedPatchListSize 1240 //! Requested resize patchlist size 1241 //! 1242 //! \return MOS_STATUS 1243 //! MOS_STATUS_SUCCESS if success, else fail reason 1244 //! 1245 MOS_STATUS ResizeCommandBufferAndPatchListCmd( 1246 uint32_t requestedCommandBufferSize, 1247 uint32_t requestedPatchListSize); 1248 1249 //! 1250 //! \brief Resizes the cmd buffer and patch list without cmd buffer header 1251 //! \details Resizes the buffer to be used for rendering GPU commands without cmd buffer header 1252 //! 1253 //! \param [in] requestedCommandBufferSize 1254 //! Requested resize command buffer size 1255 //! \param [in] requestedPatchListSize 1256 //! Requested resize patchlist size 1257 //! 1258 //! \return MOS_STATUS 1259 //! MOS_STATUS_SUCCESS if success, else fail reason 1260 //! 1261 MOS_STATUS ResizeCommandBufferAndPatchListOs( 1262 uint32_t requestedCommandBufferSize, 1263 uint32_t requestedPatchListSize); 1264 1265 // Synchronization Functions 1266 1267 //! 1268 //! \brief Write sync tag to resource 1269 //! 1270 //! \param [in,out] cmdBuffer 1271 //! command buffer used 1272 //! \param [in] syncParams 1273 //! sync parameters used to add tag 1274 //! 1275 //! \return MOS_STATUS 1276 //! MOS_STATUS_SUCCESS if success, else fail reason 1277 //! 1278 MOS_STATUS WriteSyncTagToResource( 1279 PMOS_COMMAND_BUFFER cmdBuffer, 1280 PMOS_SYNC_PARAMS syncParams); 1281 1282 //! 1283 //! \brief Helper function composes SURFACE_STATE cacheability settings 1284 //! \details Helper function composes SURFACE_STATE cacheability settings with LLC and L3 values 1285 //! 1286 //! \param [in] cacheabiltySettingIdx 1287 //! which module needs to be set caching control 1288 //! \param [in] cacheabilityTypeRequested 1289 //! cacheability type 1290 //! 1291 //! \return uint32_t 1292 //! cacheability settings result 1293 //! 1294 uint32_t ComposeSurfaceCacheabilityControl( 1295 uint32_t cacheabiltySettingIdx, 1296 uint32_t cacheabilityTypeRequested); 1297 1298 //! 1299 //! \brief Add Huc stream out copy cmds 1300 //! \details Prepare and add Huc stream out copy cmds 1301 //! 1302 //! \param [in,out] cmdBuffer 1303 //! Command buffer 1304 //! 1305 //! \return MOS_STATUS 1306 //! MOS_STATUS_SUCCESS if success, else fail reason 1307 //! 1308 MOS_STATUS AddHucDummyStreamOut( 1309 PMOS_COMMAND_BUFFER cmdBuffer); 1310 1311 //! 1312 //! \brief Perform Huc stream out copy 1313 //! \details Implement the copy using huc stream out 1314 //! 1315 //! \param [in] hucStreamOutParams 1316 //! Huc stream out parameters 1317 //! \param [in,out] cmdBuffer 1318 //! Command buffer 1319 //! 1320 //! \return MOS_STATUS 1321 //! MOS_STATUS_SUCCESS if success, else fail reason 1322 //! 1323 MOS_STATUS PerformHucStreamOut( 1324 CodechalHucStreamoutParams *hucStreamOutParams, 1325 PMOS_COMMAND_BUFFER cmdBuffer); 1326 1327 //! 1328 //! \brief Update the number of Slices, Sub-slices and EUs in the command buffer 1329 //! \details Update the number of Slices, Sub-slices and EUs in the command buffer 1330 //! with the final value from the HwInterface structure 1331 //! 1332 //! \param [in,out] cmdBuffer 1333 //! Command buffer 1334 //! \param [in] singleTaskPhaseSupported 1335 //! Indicate if single task phase supported 1336 //! \param [in] lastTaskInPhase 1337 //! Indicate if it is last task phase 1338 //! 1339 //! \return MOS_STATUS 1340 //! MOS_STATUS_SUCCESS if success, else fail reason 1341 //! 1342 MOS_STATUS UpdateSSEuForCmdBuffer( 1343 PMOS_COMMAND_BUFFER cmdBuffer, 1344 bool singleTaskPhaseSupported, 1345 bool lastTaskInPhase); 1346 1347 //! 1348 //! \brief Set the default number of Slice, Sub-slice, EUs 1349 //! \details Set the default number of Slice, Sub-slice, EUs recommended for 1350 //! the given kernel type in the HwInterface structure 1351 //! 1352 //! \param [in] mediaStateType 1353 //! Media state type 1354 //! \param [in] setRequestedSlices 1355 //! Slices requested to set 1356 //! \param [in] setRequestedSubSlices 1357 //! SubSlices requested to set 1358 //! \param [in] setRequestedEus 1359 //! Eu numbers requested to set 1360 //! 1361 //! \return MOS_STATUS 1362 //! MOS_STATUS_SUCCESS if success, else fail reason 1363 //! 1364 MOS_STATUS GetDefaultSSEuSetting( 1365 CODECHAL_MEDIA_STATE_TYPE mediaStateType, 1366 bool setRequestedSlices, 1367 bool setRequestedSubSlices, 1368 bool setRequestedEus); 1369 1370 //! 1371 //! \brief Copy data source with drv 1372 //! 1373 //! \param [in] dataCopyParams 1374 //! Parameters for data copy 1375 //! 1376 //! \return MOS_STATUS 1377 //! MOS_STATUS_SUCCESS if success, else fail reason 1378 //! 1379 MOS_STATUS CopyDataSourceWithDrv( 1380 CodechalDataCopyParams *dataCopyParams); 1381 1382 #if (_DEBUG || _RELEASE_INTERNAL) 1383 //! 1384 //! \brief Initialize L3 control user feature settings 1385 //! 1386 //! \param [in] l3CacheConfig 1387 //! L3 cache configuration 1388 //! \param [in] l3Overrides 1389 //! L3 overrides 1390 //! 1391 //! \return MOS_STATUS 1392 //! MOS_STATUS_SUCCESS if success, else fail reason 1393 //! 1394 MOS_STATUS InitL3ControlUserFeatureSettings( 1395 MHW_RENDER_ENGINE_L3_CACHE_CONFIG *l3CacheConfig, 1396 MHW_RENDER_ENGINE_L3_CACHE_SETTINGS *l3Overrides); 1397 #endif // _DEBUG || _RELEASE_INTERNAL 1398 1399 //! 1400 //! \brief Send hw semphore wait cmd 1401 //! \details Send hw semphore wait cmd for sync perpose 1402 //! 1403 //! \param [in] semaMem 1404 //! Reource of Hw semphore 1405 //! \param [in] semaData 1406 //! Data of Hw semphore 1407 //! \param [in] opCode 1408 //! Operation code 1409 //! \param [in,out] cmdBuffer 1410 //! command buffer 1411 //! 1412 //! \return MOS_STATUS 1413 //! MOS_STATUS_SUCCESS if success, else fail reason 1414 //! 1415 MOS_STATUS SendHwSemaphoreWaitCmd( 1416 PMOS_RESOURCE semaMem, 1417 uint32_t semaData, 1418 MHW_COMMON_MI_SEMAPHORE_COMPARE_OPERATION opCode, 1419 PMOS_COMMAND_BUFFER cmdBuffer, 1420 uint32_t semaMemOffset = 0); 1421 1422 //! 1423 //! \brief Send mi atomic dword cmd 1424 //! \details Send mi atomic dword cmd for sync perpose 1425 //! 1426 //! \param [in] resource 1427 //! Reource used in mi atomic dword cmd 1428 //! \param [in] immData 1429 //! Immediate data 1430 //! \param [in] opCode 1431 //! Operation code 1432 //! \param [in,out] cmdBuffer 1433 //! command buffer 1434 //! 1435 //! \return MOS_STATUS 1436 //! MOS_STATUS_SUCCESS if success, else fail reason 1437 //! 1438 MOS_STATUS SendMiAtomicDwordCmd( 1439 PMOS_RESOURCE resource, 1440 uint32_t immData, 1441 MHW_COMMON_MI_ATOMIC_OPCODE opCode, 1442 PMOS_COMMAND_BUFFER cmdBuffer); 1443 1444 //! 1445 //! \brief Send conditional batch buffer end cmd 1446 //! \details Send conditional batch buffer end cmd 1447 //! 1448 //! \param [in] resource 1449 //! Reource used in conditional batch buffer end cmd 1450 //! \param [in] offset 1451 //! Reource offset used in mi atomic dword cmd 1452 //! \param [in] compData 1453 //! Compare data 1454 //! \param [in] disableCompMask 1455 //! Indicate disabling compare mask 1456 //! \param [in,out] cmdBuffer 1457 //! command buffer 1458 //! 1459 //! \return MOS_STATUS 1460 //! MOS_STATUS_SUCCESS if success, else fail reason 1461 //! 1462 MOS_STATUS SendCondBbEndCmd( 1463 PMOS_RESOURCE resource, 1464 uint32_t offset, 1465 uint32_t compData, 1466 bool disableCompMask, 1467 PMOS_COMMAND_BUFFER cmdBuffer); 1468 1469 //! 1470 //! \brief Loads kernel data into the ISH 1471 //! \details Uses the data described in the kernel state to assign an ISH block and load the kernel data into it 1472 //! \param stateHeapInterface 1473 //! [in] State heap interface 1474 //! \param kernelState 1475 //! [in] Kernel state describing the kernel data to be loaded 1476 //! \return MOS_STATUS 1477 //! MOS_STATUS_SUCCESS if success, else fail reason 1478 //! 1479 static MOS_STATUS MhwInitISH( 1480 PMHW_STATE_HEAP_INTERFACE stateHeapInterface, 1481 PMHW_KERNEL_STATE kernelState); 1482 1483 //! 1484 //! \brief Assigns space in both DSH and SSH to the kernel state 1485 //! \details Uses input parameters to assign DSH/SSH regions to the kernel state 1486 //! \param stateHeapInterface 1487 //! [in] State heap interface 1488 //! \param kernelState 1489 //! [in] The kernel state to assign the new DSH/ISH regions 1490 //! \param noDshSpaceRequested 1491 //! [in] No DSH space should be assigned in this call 1492 //! \param forcedDshSize 1493 //! [in] The size of the DSH space required for this kernel state. 1494 //! If this value is 0, the size is calculated from the kernel state. 1495 //! \param noSshSpaceRequested 1496 //! [in] No SSH space should be assigned in this call 1497 //! \param currCmdBufId 1498 //! [in] Command buffer Id to keep track of the state heap resource 1499 //! \return MOS_STATUS 1500 //! MOS_STATUS_SUCCESS if success, else fail reason 1501 //! 1502 static MOS_STATUS AssignDshAndSshSpace( 1503 PMHW_STATE_HEAP_INTERFACE stateHeapInterface, 1504 PMHW_KERNEL_STATE kernelState, 1505 bool noDshSpaceRequested, 1506 uint32_t forcedDshSize, 1507 bool noSshSpaceRequested, 1508 uint32_t currCmdBufId); 1509 //! 1510 //! \brief Select Vdbox by index and get MMIO register 1511 //! \details Uses input parameters to Select VDBOX from KMD and get MMIO register 1512 //! \param index 1513 //! [in] vdbox index interface 1514 //! \param pCmdBuffer 1515 //! [in] get mos vdbox id from cmd buffer 1516 //! \return MmioRegistersMfx 1517 //! return the vdbox mmio register 1518 //! 1519 MmioRegistersMfx * SelectVdboxAndGetMmioRegister( 1520 MHW_VDBOX_NODE_IND index, 1521 PMOS_COMMAND_BUFFER pCmdBuffer); 1522 1523 //! 1524 //! \brief Send mi store data imm cmd 1525 //! \param [in] resource 1526 //! Reource used in mi store data imm cmd 1527 //! \param [in] immData 1528 //! Immediate data 1529 //! \param [in,out] cmdBuffer 1530 //! command buffer 1531 //! 1532 //! \return MOS_STATUS 1533 //! MOS_STATUS_SUCCESS if success, else fail reason 1534 //! 1535 MOS_STATUS SendMiStoreDataImm( 1536 PMOS_RESOURCE resource, 1537 uint32_t immData, 1538 PMOS_COMMAND_BUFFER cmdBuffer); 1539 1540 //! 1541 //! \brief Read MFC status for status report 1542 //! \param vdboxIndex 1543 //! [in] the vdbox index 1544 //! \param params 1545 //! [in] the parameters for Mfc status read 1546 //! \param cmdBuffer 1547 //! [in, out] the command buffer 1548 //! \return MOS_STATUS 1549 //! MOS_STATUS_SUCCESS if success, else fail reason 1550 //! 1551 MOS_STATUS ReadMfcStatus( 1552 MHW_VDBOX_NODE_IND vdboxIndex, 1553 const EncodeStatusReadParams ¶ms, 1554 PMOS_COMMAND_BUFFER cmdBuffer); 1555 1556 //! 1557 //! \brief Read Image status for status report 1558 //! \param vdboxIndex 1559 //! [in] the vdbox index 1560 //! \param params 1561 //! [in] the parameters for Image status read 1562 //! \param cmdBuffer 1563 //! [in, out] the command buffer 1564 //! \return MOS_STATUS 1565 //! MOS_STATUS_SUCCESS if success, else fail reason 1566 //! 1567 MOS_STATUS ReadImageStatus( 1568 MHW_VDBOX_NODE_IND vdboxIndex, 1569 const EncodeStatusReadParams ¶ms, 1570 PMOS_COMMAND_BUFFER cmdBuffer); 1571 1572 //! 1573 //! \brief Read BRC PAK statistics for status report 1574 //! \param vdboxIndex 1575 //! [in] the vdbox index 1576 //! \param params 1577 //! [in] the parameters for BRC PAK statistics specific 1578 //! \param cmdBuffer 1579 //! [in, out] the command buffer 1580 //! \return MOS_STATUS 1581 //! MOS_STATUS_SUCCESS if success, else fail reason 1582 //! 1583 MOS_STATUS ReadBrcPakStatistics( 1584 MHW_VDBOX_NODE_IND vdboxIndex, 1585 const BrcPakStatsReadParams ¶ms, 1586 PMOS_COMMAND_BUFFER cmdBuffer); 1587 1588 //! 1589 //! \brief Read HCP status for status report 1590 //! \param vdboxIndex 1591 //! [in] the vdbox index 1592 //! \param params 1593 //! [in] the parameters for HCP status read 1594 //! \param cmdBuffer 1595 //! [in, out] the command buffer 1596 //! \return MOS_STATUS 1597 //! MOS_STATUS_SUCCESS if success, else fail reason 1598 //! 1599 MOS_STATUS ReadHcpStatus( 1600 MHW_VDBOX_NODE_IND vdboxIndex, 1601 const EncodeStatusReadParams ¶ms, 1602 PMOS_COMMAND_BUFFER cmdBuffer); 1603 1604 //! 1605 //! \brief Read HCP specific image status for status report 1606 //! \param vdboxIndex 1607 //! [in] the vdbox index 1608 //! \param params 1609 //! [in] the parameters for HCP IMG status read 1610 //! \param cmdBuffer 1611 //! [in, out] the command buffer 1612 //! \return MOS_STATUS 1613 //! MOS_STATUS_SUCCESS if success, else fail reason 1614 //! 1615 MOS_STATUS ReadImageStatusForHcp( 1616 MHW_VDBOX_NODE_IND vdboxIndex, 1617 const EncodeStatusReadParams ¶ms, 1618 PMOS_COMMAND_BUFFER cmdBuffer); 1619 1620 //! 1621 //! \brief Read HCP specific BRC PAK statistics for status report 1622 //! \param vdboxIndex 1623 //! [in] the vdbox index 1624 //! \param params 1625 //! [in] the parameters for BRC PAK statistics specific 1626 //! \param cmdBuffer 1627 //! [in, out] the command buffer 1628 //! \return MOS_STATUS 1629 //! MOS_STATUS_SUCCESS if success, else fail reason 1630 //! 1631 MOS_STATUS ReadBrcPakStatisticsForHcp( 1632 MHW_VDBOX_NODE_IND vdboxIndex, 1633 const BrcPakStatsReadParams ¶ms, 1634 PMOS_COMMAND_BUFFER cmdBuffer); 1635 1636 //! 1637 //! \brief Set the status tag(start/end) for status report by PIPE contol command, 1638 //! this function is for render engine. 1639 //! \param osResource 1640 //! [in] Reource used in the cmd 1641 //! \param offset 1642 //! [in] Reource offset used the cmd 1643 //! \param tag 1644 //! [in] queryStart/queryEnd defined in the media_status_report.h 1645 //! \param needFlushCache 1646 //! [in] whether need to flush the cache or not. For queryStart, need to flush cache, otherwise 1647 //! don't need. 1648 //! \param cmdBuffer 1649 //! [in, out] the command buffer 1650 //! \return MOS_STATUS 1651 //! MOS_STATUS_SUCCESS if success, else fail reason 1652 //! 1653 MOS_STATUS SetStatusTagByPipeCtrl( 1654 PMOS_RESOURCE osResource, 1655 uint32_t offset, 1656 uint32_t tag, 1657 bool needFlushCache, 1658 PMOS_COMMAND_BUFFER cmdBuffer); 1659 1660 //! 1661 //! \brief Set the status tag(start/end) for status report by MI command 1662 //! this function is for vdbox. 1663 //! \param osResource 1664 //! [in] Reource used in the cmd 1665 //! \param offset 1666 //! [in] Reource offset used the cmd 1667 //! \param tag 1668 //! [in] queryStart/queryEnd defined in the media_status_report.h 1669 //! \param cmdBuffer 1670 //! [in, out] the command buffer 1671 //! \return MOS_STATUS 1672 //! MOS_STATUS_SUCCESS if success, else fail reason 1673 //! 1674 MOS_STATUS SetStatusTagByMiCommand( 1675 MOS_RESOURCE *osResource, 1676 uint32_t offset, 1677 uint32_t tag, 1678 PMOS_COMMAND_BUFFER cmdBuffer); 1679 1680 //! 1681 //! \brief Check if simulation/emulation is active 1682 //! \return bool 1683 //! True if simulation/emulation is active, else false. 1684 //! IsSimActive()1685 bool IsSimActive() 1686 { 1687 return m_osInterface ? m_osInterface->bSimIsActive : false; 1688 } 1689 1690 //! 1691 //! \brief Check if disable scalability by default 1692 //! \return bool 1693 //! True if it is to disable scalability by default, else it is not. 1694 //! IsDisableScalability()1695 bool IsDisableScalability() 1696 { 1697 return m_disableScalability; 1698 } 1699 1700 virtual bool UsesRenderEngine(CODECHAL_FUNCTION codecFunction, uint32_t standard); 1701 Uses2PlanesInputSurfaceFilmGrain()1702 virtual bool Uses2PlanesInputSurfaceFilmGrain() 1703 { 1704 return false; 1705 } 1706 1707 //! 1708 //! \brief Get film grain kernel info 1709 //! \details Get kernel base and size 1710 //! 1711 //! \param [out] kernelBase 1712 //! base addr of film grain kernels 1713 //! 1714 //! \param [out] kernelSize 1715 //! size of film grain kernels 1716 //! 1717 //! \return MOS_STATUS 1718 //! MOS_STATUS_SUCCESS if success, else fail reason 1719 //! 1720 virtual MOS_STATUS GetFilmGrainKernelInfo( 1721 uint8_t* &kernelBase, 1722 uint32_t &kernelSize); 1723 1724 //! 1725 //! \brief Calculates the maximum size for AVP picture level commands 1726 //! \details Client facing function to calculate the maximum size for AVP picture level commands 1727 //! \param [in] mode 1728 //! Indicate the codec mode 1729 //! \param [out] commandsSize 1730 //! The maximum command buffer size 1731 //! \param [out] patchListSize 1732 //! The maximum command patch list size 1733 //! \param [in] params 1734 //! Indicate the command size parameters 1735 //! \return MOS_STATUS 1736 //! MOS_STATUS_SUCCESS if success, else fail reason 1737 //! GetAvpStateCommandSize(uint32_t mode,uint32_t * commandsSize,uint32_t * patchListSize,PMHW_VDBOX_STATE_CMDSIZE_PARAMS params)1738 virtual MOS_STATUS GetAvpStateCommandSize( 1739 uint32_t mode, 1740 uint32_t *commandsSize, 1741 uint32_t *patchListSize, 1742 PMHW_VDBOX_STATE_CMDSIZE_PARAMS params) 1743 { 1744 return MOS_STATUS_SUCCESS; 1745 }; 1746 1747 //! 1748 //! \brief Calculates maximum size for AVP tile level commands 1749 //! \details Client facing function to calculate maximum size for AVP tile level commands 1750 //! \param [in] mode 1751 //! Indicate the codec mode 1752 //! \param [out] commandsSize 1753 //! The maximum command buffer size 1754 //! \param [out] patchListSize 1755 //! The maximum command patch list size 1756 //! \return MOS_STATUS 1757 //! MOS_STATUS_SUCCESS if success, else fail reason 1758 //! GetAvpPrimitiveCommandSize(uint32_t mode,uint32_t * commandsSize,uint32_t * patchListSize)1759 virtual MOS_STATUS GetAvpPrimitiveCommandSize( 1760 uint32_t mode, 1761 uint32_t *commandsSize, 1762 uint32_t *patchListSize) 1763 { 1764 return MOS_STATUS_SUCCESS; 1765 }; 1766 1767 1768 //! \brief default disable vdbox balancing by UMD 1769 bool bEnableVdboxBalancingbyUMD = false; 1770 1771 //! \brief default disable the get vdbox node by UMD, decided by MHW and MOS 1772 bool m_getVdboxNodeByUMD = false; 1773 1774 #ifdef IGFX_MHW_INTERFACES_NEXT_SUPPORT 1775 CodechalHwInterfaceNext *m_hwInterfaceNext = nullptr; 1776 #endif 1777 }; 1778 1779 extern const MOS_SYNC_PARAMS g_cInitSyncParams; 1780 1781 #endif // __CODECHAL_HW_H__ 1782