xref: /netbsd/sys/arch/mips/mips/sys_machdep.c (revision c8d61b77)
1 /*	$NetBSD: sys_machdep.c,v 1.35 2021/12/08 20:50:02 andvar Exp $	*/
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * Ralph Campbell.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)sys_machdep.c	8.1 (Berkeley) 6/10/93
35  */
36 
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: sys_machdep.c,v 1.35 2021/12/08 20:50:02 andvar Exp $");
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/ioctl.h>
43 #include <sys/file.h>
44 #include <sys/time.h>
45 #include <sys/proc.h>
46 #include <sys/uio.h>
47 #include <sys/kernel.h>
48 #include <sys/buf.h>
49 #include <sys/mount.h>
50 #include <sys/syscallargs.h>
51 
52 #include <mips/cache.h>
53 #include <mips/sysarch.h>
54 #include <mips/cachectl.h>
55 #include <mips/locore.h>
56 
57 #include <uvm/uvm_extern.h>
58 
59 int
sys_sysarch(struct lwp * l,const struct sys_sysarch_args * uap,register_t * retval)60 sys_sysarch(struct lwp *l, const struct sys_sysarch_args *uap, register_t *retval)
61 {
62 	/* {
63 		syscallarg(int) op;
64 		syscallarg(void *) parms;
65 	} */
66 	struct proc *p = l->l_proc;
67 	int error = 0;
68 
69 	switch(SCARG(uap, op)) {
70 	case MIPS_CACHEFLUSH: {
71 		struct mips_cacheflush_args cfua;
72 
73 		error = copyin(SCARG(uap, parms), &cfua, sizeof(cfua));
74 		if (error != 0)
75 			return (error);
76 		error =  mips_user_cacheflush(p, cfua.va, cfua.nbytes,
77 		     cfua.whichcache);
78 		break;
79 	}
80 	case MIPS_CACHECTL: {
81 		struct mips_cachectl_args ccua;
82 
83 		error = copyin(SCARG(uap, parms), &ccua, sizeof(ccua));
84 		if (error != 0)
85 			return (error);
86 		error = mips_user_cachectl(p, ccua.va, ccua.nbytes, ccua.ctl);
87 		break;
88 	}
89 	default:
90 		error = ENOSYS;
91 		break;
92 	}
93 	return (error);
94 }
95 
96 
97 /*
98  * Handle a request to flush a given user virtual address
99  * range from the i-cache, d-cache, or both.
100  */
101 int
mips_user_cacheflush(struct proc * p,vaddr_t va,size_t nbytes,int whichcache)102 mips_user_cacheflush(struct proc *p, vaddr_t va, size_t nbytes, int whichcache)
103 {
104 
105 	/* validate the cache we're going to flush. */
106 	switch (whichcache) {
107 	    case ICACHE:
108 	    case DCACHE:
109 	    case BCACHE:
110 		break;
111 	    default:
112 		return (EINVAL);
113 	}
114 
115 #ifndef notyet
116 	/* For now, just flush all of both caches. */
117 	mips_icache_sync_all();
118 	mips_dcache_wbinv_all();
119 	return (0);
120 
121 #else
122 	void *uncached_physaddr;
123 	size_t len;
124 
125 	/*
126 	 * Invalidate each page in the virtual-address range,
127 	 * by manually mapping to a physical address and
128 	 * invalidating the PA.
129 	 */
130 	for (base = (void*) addr; nbytes > 0; base += len, nbytes -= len) {
131 		/*
132 		 * XXX: still to be done:
133 		 *   Check that base is user-space.
134 		 *   Check that we have a mapping, calculate physaddr.
135 		 *   Flush relevant cache(s).
136 		 */
137 		if (whichcache & ICACHE) {
138 			MachFlushCache(uncached_physaddr, len);
139 		}
140 		if (whichcache & DCACHE) {
141 			MachFlushDCache(uncached_physaddr, len);
142 		}
143 	}
144 #endif
145 }
146 
147 /*
148  * Handle a request to make a given user virtual address range
149  * non-cacheable.
150  */
151 int
mips_user_cachectl(struct proc * p,vaddr_t va,size_t nbytes,int cachectlval)152 mips_user_cachectl(struct proc *p, vaddr_t va, size_t nbytes, int cachectlval)
153 {
154 	/* validate the cache we're going to flush. */
155 	switch (cachectlval) {
156 	case CACHEABLE:
157 	case UNCACHEABLE:
158 		break;
159 	default:
160 		return (EINVAL);
161 	}
162 
163 #ifndef notyet
164 	return(EOPNOTSUPP);
165 #else
166 	/*
167 	 * Use the merged mips3 pmap cache-control functions to change
168 	 * the cache attributes of each page in the virtual-address range,
169 	 * by manually mapping to a physical address and changing the
170 	 * pmap attributes of the PA of each page in the range.
171 	 * Force misses on non-present pages to be sure the cacheable bits
172 	 * get set.
173 	 */
174 #endif
175 }
176